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APPLICATION NOTE

The GTV1000Global TV Receiver

AN98051

Abstract

The GTV1000 Global TV Receiver

3KLOLSV6HPLFRQGXFWRUV

Application NoteAN98051

2

” Philips Electronics N.V. 1999

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copy-right owner.

The information presented in this document does not form part of any quotation or contract, is believed to beaccurate and reliable and may be changed without notice. No liability will be accepted by the publisher for anyconsequence of its use. Publication thereof does not convey nor imply any license under patent- or other indus-trial or intellectual property rights.

The GTV1000 receiver has been designed around the TDA884X TV signal processor. The large signal part is suited for 90° picture tubes and build on one board with the small signal part.The board design is such that it can easily be adapted for use in the following markets:USA, South America, Europe and most of the Far East countries.The board can be fitted with different external AV connectors and sound modules.When a video processor with YUV interface is used, it is possible to insert feature modules.

The GTV1000 was designed as a demonstration receiver and has been tested on picture, sound and EMC performance, but has not been released for production.

Purchase of Philips I2C components conveys a license under the Philips I2C patent to use the components in the I2C system, provided the system conforms to the I2C specifications defined by Philips.

Keywords


Author(s)

The GTV1000 Global TV Receiver Application NoteAN98051

3

APPLICATION NOTE

The GTV1000Global TV Receiver

Ton HummelinkTon Smits

Philips Semiconductors Systems Laboratory Eindhoven,The Netherlands

TDA884XLow-end TV receiver for 90° picture tube

Global conceptPAL/SECAM/NTSC

external CVBS, Y/C and RGB inputs

Date: 27-01-1999

AN98051

Number of pages: 76

Summary




4

This application note describes the GTV1000 global demonstration colour TV receiver, which is based on a TDA884X “one chip” TV processor.

The global concept allows the board to be adapted to the TV standards in different countries all over the world by adding or changing components and connecting or disconnecting solder jumpers.

The micro controller socket is suited for use of non-text micro controllers as well as types with integrated text and types with integrated close caption.

The board contains the small signal part, control and all the large signal circuitry to drive a 90° picture tube.

On the board connectors are available to insert the different types of external input signal connectors needed in the different areas.

The basic board is equipped with mono FM sound, but two connectors are available to add AM sound or different stereo options corresponding to the desired area of use. In case of stereo, a stereo power amplifier can be added on the main board.

In case a video processor type with YUV interface is used, a YUV connector can be mounted where picture improvement options can be inserted.

On the board leaded components are used.



5


TABLE OF CONTENTS

1. INTRODUCTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2. SMALL SIGNAL.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112.1 TV processor TDA884X. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112.2 Functional description of the small signal part. . . . . . . . . . . . . . . . . . . . . . . . . . . .15

2.2.1 Tuner and IF circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .162.2.2 Intercarrier sound and sound options. . . . . . . . . . . . . . . . . . . . . . . . . . .182.2.3 CVBS path. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .212.2.4 RGB input/switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .232.2.5 Colour decoder. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .242.2.6 YUV interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .262.2.7 RGB outputs & CRT board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

3. MICRO CONTROLLER. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .273.1 Universal micro controller interface description. . . . . . . . . . . . . . . . . . . . . . . . . . . .273.2 VST-Tuning voltage control output (Micro-controller pin1 application). . . . . . . . . . . . . . . .283.3 Service connector and Factory mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .293.4 Standby command line “On_Off”. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .293.5 OSD outputs FBL, R, G and B. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .293.6 I2C-bus control input/outputs SDA, SCL, SDA1 and SCL1. . . . . . . . . . . . . . . . . . . . . .293.7 Reset and supply-voltage-guard circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .303.8 Micro hardware environment configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31

3.8.1 Stereo-playback hardware configuration. . . . . . . . . . . . . . . . . . . . . . . . .313.8.2 P83C053 (MTV) Micro controller configuration. . . . . . . . . . . . . . . . . . . . . .323.8.3 P83Cx66 Micro controller configuration. . . . . . . . . . . . . . . . . . . . . . . . . .333.8.4 P83Cx70 Micro controller configuration. . . . . . . . . . . . . . . . . . . . . . . . . .343.8.5 SAA549x (ETT) Micro controller configuration.. . . . . . . . . . . . . . . . . . . . . .35

3.9 Software package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35

4. LARGE SIGNAL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .374.1 Power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37

4.1.1 Circuit description of power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . .384.2 Horizontal deflection.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

4.2.1 Low voltage horizontal deflection driver circuit. . . . . . . . . . . . . . . . . . . . . .424.2.2 Horizontal flyback feedback circuit.. . . . . . . . . . . . . . . . . . . . . . . . . . . .444.2.3 Horizontal deflection corrections.. . . . . . . . . . . . . . . . . . . . . . . . . . . . .45

/LQHDULW\FRUUHFWLRQ 6FRUUHFWLRQ '\QDPLFKRUL]RQWDOSKDVHFRUUHFWLRQ

4.3 TDA8351/56 vertical deflection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .464.4 Beam current information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49

5. LAY-OUT & EMC RECOMMENDATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .505.1 Lay-out. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .505.2 EMC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50

6. ALIGNMENTS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .506.1 Front end IF-PLL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .506.2 Tuner AGC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50

6




6.3 Vertical geometry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .506.4 Horizontal geometry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .516.5 Video amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .516.6 Luminance-Chrominance delay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51

7. MODIFICATIONS WITH RESPECT TO PRINTED CIRCUIT PR31602. . . . . . . . . . . . . . . . . . .51

8. REFERENCES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54

APPENDIX 1 Main diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56

APPENDIX 2 GTV pin-compatibility of Philips TV micro controllers . . . . . . . . . . . . . . . . . . .57

APPENDIX 3 Control diagramdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58

APPENDIX 4 Tuner diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59

APPENDIX 5 Peri interface cinch diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60

APPENDIX 6 Peri interface Scart diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61

APPENDIX 7 Audio amplifier diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62

APPENDIX 8 AM Audio diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63

APPENDIX 9 NICAM Audio diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64

APPENDIX 10 BTSC Audio diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65

APPENDIX 11 RGB output and CRT panel diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66

APPENDIX 12 Vertical Deflection diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67

APPENDIX 13 Power Supply diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68

APPENDIX 14 Horizontal Deflection diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69

APPENDIX 15 EMC test results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70

APPENDIX 16 “Bill Of Materials” of Project: PR31602 Last Update: 1999/02/04 . . . . . . . . . . . . .71

APPENDIX 17 Component layout for the NTSC-Only configuration. . . . . . . . . . . . . . . . . . . . .76

APPENDIX 18 Component layout for the South America configuration. . . . . . . . . . . . . . . . . . .76

APPENDIX 19 Component layout for the Pal Multi Sandard VST configuration. . . . . . . . . . . . . .76



7


LIST OF FIGURES

Fig.1 The GTV1000 board.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10Fig.2 Internal Block diagram of the TDA884X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14Fig.3 Global design structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15Fig.4 Band switching with VST. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16Fig.5 AGC circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17Fig.6 Sound switching. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19Fig.7 NICAM sound switching. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21Fig.8 CVBS, Y/C switching. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22Fig.9 RGB input and switch.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24Fig.10 Colour decoder application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25Fig.11 YUV interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26Fig.12 VST tuning curve linearisation for UHF band . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28Fig.13 Reset and Voltage guard circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30Fig.14 Reset signal during start-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31Fig.15 Reset signal during a power dip. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31Fig.16 P83C053 (MTV) Micro controller configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32Fig.17 P83Cx66 Micro controller configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33Fig.18 P83Cx70 Micro controller configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34Fig.19 SAA549x (ETT) Micro controller configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35Fig.20 Block Diagram of the power supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37Fig.21 Horizontal drive circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42Fig.22 L910 primary signal shapes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43Fig.23 L910 secondary signal shapes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43Fig.24 Flyback adapter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44Fig.25 S-corrected horizontal deflection current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45Fig.26 Horizontal phase shift reduction circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46Fig.27 Block diagram of the vertical output stageTDA8351/56 . . . . . . . . . . . . . . . . . . . . . . . . .47Fig.28 Average Beam current circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48Fig.29 Black current feed-back. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52Fig.30 Modified Reset and Voltage guard circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53Fig.31 Write protection circuit non volatile memory.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54Fig.32 GTV pin-compatibility of Philips TV micro controllers . . . . . . . . . . . . . . . . . . . . . . . . . .57Fig.33 Radiated immunity of GTV1000 receiver measured on SECAM-L. . . . . . . . . . . . . . . . . . . .70

8




LIST OF TABLES

TABLE 1 Features of the different types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12TABLE 2 Pinning of the TDA884X S-DIL 56 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13TABLE 3 Overview TV-system and associated SAW-filter . . . . . . . . . . . . . . . . . . . . . . . . . . .18TABLE 4 Supported PHILIPS micro controllers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27TABLE 5 Micro controller versus software package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36TABLE 6 pinning of the TDA8380A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38TABLE 7 5V / 3.3V micro resistor values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41TABLE 8 5V / 3.3V stand-by resistor values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42



9


1. INTRODUCTION.

This application note describes the GTV1000 global demonstration colour TV receiver, which was designed to demonstrate the TDA884X video processor and the different micro controllers that are available for low-end applications.

The GTV1000 is a low-end 90 ° TV receiver based on the TDA884X “one chip” I2C bus controlled TV processor. The TDA884X contains all small signal circuitry for a colour TV receiver.The board can be adapted to handle the following TV standards:

1. NTSC-M (TDA8846/47).2. PAL-M/N, NTSC-M (TDA8841/43).3. PAL-only (TDA8840).4. PAL, SECAM (TDA8842/44).

In configuration 2), the set can also handle PAL 4.43 via the external input if a 4.43 MHz crystal is added. If an NTSC-M crystal is added in configuration 3) and 4), the external input can handle NTSC signals here.

The small signal part, control and large signal circuitry are build on one board.

The board can be equipped with a VST (UV1315) or a PLL (UV1316, UV1336) tuner. Via solder jumper, connection for both symmetrical and asymmetrical tuners can be made.

The basic board contains intercarrier FM mono sound and a single audio amplifier (TDA7056B). It is possible to switch between two sound bandpasses to select one of two sound standards.Two connectors (sound-1 and sound-2) are available to extend the system with AM sound or different stereo options, as explained in chapter 2.2.2. In case of stereo, a double audio amplifier (TDA7075AQ) can be added on the main board.

In two other connectors (peri-1 and peri-2) different boards containing external input connectors can be inserted, to obtain the correct configuration for each country. A discrete RGB switch can be mounted on the main board when a full scart application is wanted, to switch between RGB from the scart connector and OSD RGB information (see chapter 2.2.4).

To offer the possibility to decode all colour standards and create multi standard applications, it is possible to insert 1, 2, 3 or 4 crystals on the board (PAL 4.43/SECAM, NTSC-M, PAL-M and PAL-N).

When a video processor with YUV interface is used, it is possible to insert a connector on the main board (YUV) where picture improvement options can be inserted.

The circuitry around the micro controller was designed in such way that it is possible to insert different micro’s. The correct configuration can be set by solder jumpers. For non-text countries the 83C054 (MTV) can be used, while for countries with teletext the SAA529X (ETT) with integrated teletext can be inserted. A third option is the P83C770 which has integrated close caption.

On the board a service connector is present, where a PC with I2C bus interface can be connected.In this case the service pin of this connector has to be grounded, to stop the micro controller.A separate local keyboard is delivered with the main board and can be connected to the local keyboard connector.

10




TUNER VST or PLL

SA

W

TDA8351/56

n 5<UHWXUQn %<UHWXUQn *QGn %<VHQGn 5<VHQGn )HDWXUHn 6DQGFn 6'$n 6&/n 9n <UHWXUQn <VHQG

YUV

P500

n

nP900

MAINS

n

nP901

DEGAUSS

TDA8380A

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PERI-1

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PERI-2

P401

n /PDLQn 5PDLQn n n *QGn /LQn 5LQn /RXWn 5RXWn *QGn 6&/n 6'$

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SOUND-2

SOUND-1

P603

TDA884X

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P203

SERVICE

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KEYBOARD

P204

MICRO CONTROLLER

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P902

TDA7056B TDA7075AQ

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RGB

P700

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VERTP800

P600

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MONO/SUBn

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Fig.1 The GTV1000 board.

BU2506DF

DEFLECTION



11


For the vertical deflection a DC coupled amplifier (TDA8356) is used.

The line deflection was designed to drive a 90° picture tube. The line transformer supplies the voltages to drive the picture tube: EHT, Vfocus, Vg2, filament supply and the video amplifier supply.

The board also contains the mains filter, the degaussing circuit and the switched mode power supply, which delivers the supply voltages for the line deflection, vertical deflection, audio part, video processing and control part.

2. SMALL SIGNAL.

2.1 TV processor TDA884X.

The heart of the total system is formed by the “One Chip” TV processor TDA884X.

This chapter gives a short description of this IC family. More detailed information concerning the internal circuitry can be found in report ref.[3] Report no: AN98002.

Common features of the family:

• Vision IF circuit with alignment-free PLL demodulator• Alignment-free multi-standard FM sound demodulator (4.5 to 6.5 MHz)• Audio switch• Flexible source selection with internal and external CVBS input, Y(CVBS)/C input and selected

CVBS out, suited for comb filter use• Integrated chroma trap (auto calibrated)• Integrated chroma band pass (auto calibrated) with switchable centre frequency• Integrated luminance delay line • Asymmetrical peaking in luminance channel with defeatable coring function• Black stretching• Blue stretch circuit which offsets near white colours to blue• Integrated RGB processor with “continuous cathode calibration” and white point adjustment• Linear RGB inputs with fast blanking input• Possibility to insert “blue mute” when no signal is present• Dynamic skin tone (“flesh”) correction for NTSC signals• Horizontal synchronisation with two control loops and alignment-free horizontal oscillator• Slow start and stop of the horizontal drive pulses• Vertical divider circuit• Vertical driver stage optimized for DC-coupled output stages• I2C bus control• Low power dissipation

The table below shows the various S-DIL types, which can be inserted in the GTV1000 board.

For the mid-end types (TDA8843/44/47) a YUV interface has been added on the board, however the E-W drive is not used in GTV1000, because the deflection is designed for raster correction free deflection units.

12




On the next pages, the pinning of the TDA884X as well as the internal block diagram can be found. The internal block diagram shows the most extended version of the series. The notes at this block diagram correspond to the remarks of the pinning table.

TABLE 1 Features of the different typesIC version (TDA) 8840 8841 8842 8846 8846A 8843 8844 8847

Automatic volume levelling X X X X X

Positive / Negative modulation N N N/P N N N/P N/P N

NTSC decoding X X X X X X X

PAL decoding (integrated delay-line)

X X X X X

SECAM decoding(integrated SECAM decoder)

X X

Colour matrix PAL / NTSC (Japan) X X X X

Colour matrix USA / Japan X X1 X

YUV interface X X X X

Horizontal geometry (E-W output) X X X

Linear zoom function X X X

Vertical frequency 50/60 50/60 50/60 60 60 50/60 50/60 60

1. In the TDA8846A version the delay line is present. For NTSC-system it acts like a cross colour reduction as a comb-filter does for PAL.



13


TABLE 2 Pinning of the TDA884X S-DIL 56

Pin Function Pin Function1 Intercarrier sound-IFIN 56 Sound demodulator decoupling

21 InExternal audioIN 55 De-emphasis & Int. audioOUT

3 Not connected 54 Tuner AGCOUT

4 Not connected 53 AGC decoupling

5 IF-PLL loop filter 52 Vertical current reference

6 IF-VideoOUT (2VPP) 51 Vertical sawtooth capacitor

7 SCL I2C-bus 50 EHT/over-voltage protectionIN

8 SDA I2C-bus 49 IFIN

9 Bandgap decoupling 48 IFIN

10 Input CS-VHS 47 Vertical I-driveAOUT

11 Input YS-VHS (or CVBS3EXT) 46 Vertical I-driveBOUT

12 Main +8V supply 452 AVL cap. or East-West driveOUT

13 CVBS1 (internal CVBS) (1VPP) 44 Ground

14 Ground 43 j 1-loop filter

15 AudioOUT 42 j 2-loop filter

163 SECAM PLL decoupling 41 H-flybackIN & SandcastleOUT

17 CVBS2 (external CVBS) (1VPP) 40 HOUT

18 Black currentIN 39 Decoupling digital supply

19 BOUT 38 CVBS-switchOUT

20 GOUT 37 +8V supply

21 ROUT 36 Colour PLL filter

22 Beam current limiter/V-guardIN 354 Xtal 4.43/3.58 MHz

23 RIN 34 Xtal 3.58 MHz

24 GIN 33 Chroma ReferenceOUT

25 BIN 32 R-YIN

26 Fast Blank RGBIN 31 B-YIN

275 YIN 30 R-YOUT

286 YOUT 29 B-YOUT

1. Positive modulation automatically selects pin2 for sound input (external AM demodulator).

2. TDA8840/41/42/46(A) have AVL instead of East-West drive, AVL capacitor at pin 45.3. Pin 16 (SECAM PLL) only used in TDA8842/44.4. In NTSC only versions TDA8846(A)/47 pin 35 (Xtal 4.43) is not connected.5. TDA8840/41/42 have no YIN, pin 28 is not connected, pin 27 becomes Yout.6. TDA8840/41/42 pin 28 is not connected.

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2.2 Functional description of the small signal part.

To simplify the design process of the GTV receivers, a common basic structure was selected.

This structure can be found in the figure below.

The structure is also found in the appendixes: Schematics.

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To obtain flexibility in the GTV1000, the grey blocks are designed as add-on boards. In this way it is possible to add YUV features, the correct external connector combination for each area and different stereo systems. The sound block also contains the audio amplifiers, which are mounted on the main board and not on the add-on board, because they need a heatsink.

2.2.1 Tuner and IF circuit.

The GTV1000 design is made in such way, that a UV1316 / 1336 (PLL) or UV1315 (VST) canbe used

In case a PLL tuner is used, the following measures have to be taken:

• Jumper J300 has to be short circuit to select the right tuner address.• Jumpers J301 and J302have to be opened to disconnect the bandswitch lines.• Resistors R3004 and 3007 have to be inserted to connect the I2C bus.• Resistor R3002 has to be removed to disconnect the VST tuning voltage.

When a VST tuner is used, the following measures have to be taken:

• Jumper J300 has to be opened.• Jumpers J301 and J302 have to be closed to connect the bandswitch lines.• Resistor R3004 and R3007 have to be removed to disconnect the I2C bus.• Resistor R3015 has to be removed to disconnect the 33V.• Resistor R3002 has to be present, to feed the tuning voltage to the tuner.

The three bandswitch signals are decoded from two micro controller outputs Sw0 and Sw1.The circuit and truth table can be found in the figure below.

When a mark 2 version of the UV13XX PLL tuner is used, there is no acknowledge on a read cycle of the registers. This means that the tuner can’t be used with the ICP-1 I2C PC software. For the standard software packages used in GTV1000 this is no problem. Also using this tuner the series resistor R3015 with the tuning supply voltage must be bridged (22K to 0Ω). For the MK2 version it is an internal one.

Fig.4 Band switching with VST.

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The AGC output of the TDA884X is an open collector. The maximum and minimum voltage at the tuner pin is determined by three external resistors, as can be found in the figure below.Resistor R2 and R3 determine the maximum AGC voltage, which is 4V for the UV13XX tuner series.The minimum voltage is determined by R1 and R2 and the saturation voltage of the AGC output of the TDA884X (0.3V). This minimum voltage is important, because most tuners have a fold-back in the lower part of the AGC characteristic (1.1V for UV13XX). The correct resistor values for GTV1000 are indicated in the figure below.

Note: Resistor R3 to ground is missing in the lay-out of the GTV1000. Please solder a resistor in the PCB in order to prevent that the tuner is driven outside the specification. The performance of the receiver remains the same.

For positive modulation a diode with parallel resistor can be inserted. This circuit takes care of a fast response when the gain has to be reduced, while the charge time of the capacitor at the tuner side is larger, to assure a constant AGC level over one field.

The two IF outputs of the tuner are connected directly to the SAW filter. If an asymmetrical tuner is used, one IF pin can be connected to ground via jumper J303, near the tuner, to keep the connection between the tuner and SAW filter as symmetrical as possible. For the same reason the SAW filter ground is connected to the ground of the IF part of the TDA884X.The two IF lines are also connected to the sound option connector, for AM demodulation in case an AM add-on board is inserted.

Because the GTV1000 is an economy concept, only 5 pins in line SAW filters can be inserted.The following table shows the different SAW filters which can be used for different areas.

Fig.5 AGC circuit

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The table shows Siemens Matsushita SAW filters with a sound shelf of -14dB, which have better sound performance compared to the conventional types with a -20 dB sound shelf. These filters can also be used for intercarrier stereo applications.Saw filters with a -10dB sound shelf are also available, but they are not used in the GTV1000 concept, because the picture quality becomes critical in this case.The SAW filter used in the configuration west Europe + France is an alternative for the switchable SAW filters. With the K2962M the Nyquist slope for L’ is not optimal, because of the presence of the sound shelf. However the quality of the picture is sufficient.In the configuration Europe, system I is in principle possible, however the GTV1000 circuit is designed to switch between only two sound systems.

On the lay-out the space for the reference coil is still present. For the N2 version of the TDA884X this coil can be removed.

For more information concerning the IF circuit of the TDA884X, see ref.[3] report no AN98002 page 89.

2.2.2 Intercarrier sound and sound options.

From the video demodulator output of the TDA884X (pin6) the signal is connected to two emitter followers. The first one (TR103) drives the sound-bandpasses, while the second one (TR105) feeds the CVBS signal to the sound traps. This configuration has been selected to reduce the breakthrough from the sound to the video path. For the same reason it is important to keep the sound and video path separated in the lay-out.The GTV1000 is designed to select between two sound systems. One of the two sound band-passes is selected by the DKL1 signal, coming from the micro controller. Via two transistors (TR101,TR102) one of the diodes D100 or D101 is conducting the sound carrier to the SIF input (pin1). In series with this pin a small inductor (L101) is connected to reduce high frequency pick-up by the pin.

The demodulated sound is present on pin 55, where the de emphasis capacitor is connected. The sound signal on this pin has no volume control and can be used to feed the front-end sound to the SCART connector. An amplifier is added here to avoid loading the pin and to create a gain of 2 to 3 dB, which is needed to bring the signal level to SCART specification.

The connection to the SCART panel is running via the sound option connectors, to offer the possibility to switch also AM sound to the SCART output, in case this is needed (see Fig.6) .

TABLE 3 Overview TV-system and associated SAW-filterArea System SAW filter

South America M / N M1970M

USA M M1970M

West Europe B / G G1984M

West Europe + U.K. B / G / I K2962M

West Europe + France B / G / I / L / L’ K2962M

Europe (no France) B / G / D / K / (I) K2960M



19


If positive modulation is selected in the TDA884X, the IC automatically switches to the external sound input. In this case the AM sound coming from the AM demodulator on the add-on board, has to be connected to both the SCART connector and to the external input. This is accomplished by feeding the AM signal to the SCART and switch the source selector (SW1) to the AM signal.

If no AM or other sound option is inserted into the sound option connectors and the front-end sound is needed on the SCART output, a coupling capacitor has to be connected from pin 6 of sound connector1 to pin 8 and 9 of sound connector 2.

To offer the possibility of AM sound, the tuner IF signal is present on the sound option connectors. The AM board itself contains a switch, controlled by the DKL’ bit coming from the micro controller to switch between the L and L’ sound carrier.

The mono (AM) sound is fed to pin 2 of the TDA884X, by closing jumper J602.

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At all incoming and outgoing lines of the external connectors, a spark gap and a filter is connected close to the connector, to protect the internal circuit.

In the TDA884X internal or external sound is selected via bus control and via the volume control the sound is fed to the sound output (pin15). This signal is connected to the sound output amplifier TDA7056B. The volume pin of this IC is connected to the microprocessor to create an extra mute function, in order to avoid any plops on the loudspeaker.

Versions of the TDA884X without E-W control contain an Automatic Volume Levelling (AVL) feature. The capacitor controlling the time constant of this function is connected to pin 45, which is used for E-W drive in versions for 110o deflection. The automatic volume levelling is keeping the sound level constant in case the FM modulation increases. The feature is originally designed for the USA market, where the modulation level of commercials is increased.

A second audio amplifier (TDA7057AQ) can be inserted on the board, which can be used in case stereo options are inserted, or for external stereo only. In this case the left and right signal from the external sources is selected on the external add-on board (SW1), while the internal mono signal (or AM signal) is connected to the left and right channel via the sound option board and is also selected with SW1. In this case jumper J602 has to be opened and the left and right audio signal is fed to the audio amplifier via the sound option board to offer switching possibilities is case stereo options are used. This means that if no sound option board is used the mono channel and the left and right audio signals have to be wired as shown in Fig.6 . The TDA7075AQ amplifier volume control inputs are used for volume control and mute function in this case.

Both the TDA7056B and the TDA7057AQ are BTL amplifiers. For EMC reasons filters are connected in all loudspeaker lines of the audio amplifiers.

Besides the AM sound option a 2 carrier / NICAM stereo option with TDA9875A or the older version of the stereo add-on board containing TDA9820, TDA9840, TDA9860 and the SAA7283 can be inserted. These options are designed for intercarrier stereo, which means that they use the sound IF of the TDA884X as input signal.The external sound-in switching is the same as in the option described above, although the IC’s are capable of switching between internal and two external sources. This is not used in the GTV1000, because the system had to be kept flexible.The front end sound signals to the SCART panel are coming from the fixed level outputs of the sound processor, while the audio amplifiers (TDA7075AQ) are connected to the sound processor outputs.The volume control of the TDA7075AQ in this case, is only used for muting the output.For more information concerning the TDA9840 / 9860 see ref.[7] report no: HAT/AN92004. The TDA9875A is described in ref.[11] report no: HSIS/TR9801.

A third sound option is the NICAM only board, containing the SAA7283, meant for intercarrier NICAM reception. Also here the IC has the capability to switch between internal and external sound, however in order to keep the system suitable for all options, the switching possibilities of the IC is not used.The way the internal and external sound is switched can be found in Fig.7 . More information about the SAA7283 can be found in ref.[8] report no:AN96002.



21


The fourth stereo option that can be inserted is BTSC stereo sound. The add-on board is designed for the TDA9852 / 9855. The drive signal for the sound processor is coming from the fixed level audio output of the TDA884X. The correct input level can be set in the audio processor. These sound processors have only one external stereo sound input, so here a switch is needed to select more than one external input sources. The front-end sound out is not present here, because the IC has no fixed level sound output. The reason is that in NTSC countries the sound out is not used for low and mid-end sets. The left and right output is fed directly to the TDA7075AQ audio amplifier. The TDA 9855 has extra features with respect to the TDA9852. These are tone control and a sub woofer output. This sub woofer signal can be fed to the mono amplifier (TDA7056B).If the feature is used, jumper J600 on the main board has to be changed. More information about the TDA9855 can be found in ref.[10] and ref.[12] report no: AN95047 and AN94004.

2.2.3 CVBS path.

On the demodulator output an emitter follower (TR105) is connected, to drive the sound traps. The collector of this transistor has a separate decoupling. The follower, the decoupling and the traps should be connected to one ground track, to avoid disturbance of other circuit parts by the large currents in the

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ground pins of the traps. This first follower is build with a PNP transistor. The reason for this choice is that two other followers are connected behind this first one. If all followers would be NPN types, the DC voltage drop towards the SCART connector would be too much.The traps that are used are of course depending upon the systems that have to be received. In the USA and south america versions only a 4.5 MHz trap is inserted. In the PAL / SECAM versions the triple trap is used. This device traps three frequencies: 5.5, 5.74 and 6.5 MHz. Space for an extra trap of 6.0 MHz is also present. Behind the traps again an emitter follower is connected, to supply low impedance drive to the CVBS input of the TDA884X for proper clamping.At the SCART output an other emitter follower is present. This one is needed to avoid high currents in the lead from the trap circuit to the SCART connector. These high currents can easily course cross-talk from external to internal CVBS. The high currents are normally caused by the capacitive load of a SCART cable. It is also important to keep the tracks of internal and external CVBS separated.

Note: The crosstalk performance of this GTV1000 board can be improved, by adding a ground track between these CVBS tracks.

Different external input configurations can be inserted in the two PERI connectors. This set-up has been selected to keep the board flexible for all TV markets. The different options are:

• Single cinch audio/video in + S-VHS in (mono).• Double cinch audio/video in + S-VHS in (mono/stereo).• Full SCART connector + cinch audio/video in + S-VHS in (mono/stereo).

At all the incoming and outgoing lines of the external connectors spark gaps and filters are connected close to the connector, to protect the internal circuit.

The first option offers a simple direct connection to the inputs of the TDA884X.

The second board contains two CVBS inputs, where the second CVBS input is combined with the Y input of the S-VHS connector. The TDA884X offers the possibility to change the Y input into CVBS

Fig.8 CVBS, Y/C switching.

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input. This board can be used for stereo applications. The sound inputs of the second CVBS and S-VHS inputs are combined. To switch between the two sound inputs, CMOS switch HEF4052 is used.

The third option is a full scart connection containing stereo audio in/out, CVBS in/out, RGB+FBlank in and AV status in. The second CVBS input is again combined with the S-VHS input, as well as the sound input. The S-VHS connector contains a switch, witch can be used to generate a status signal. Again HEF4052 switch is used for switching between the two sound inputs.

The CVBS, Y/C inputs contain a terminating resistor of 75Ω, a spark gap and a filter. The lines are connected via a clamp capacitor directly to the corresponding inputs of the TDA884X. The RGB input is described in the next chapter.

2.2.4 RGB input/switch.

The TDA884X offers the possibility to insert the OSD/Text RGB into the output. When the fast blanking pin (pin 26) is pulled above 4V, the RGB outputs are switched to the black level and OSD RGB can be inserted. Because of the automatic black level loop, the black level of the three colours can be different, depending upon the picture tube. This means that if OSD is inserted with a fixed level, different colours can be present for different picture tubes.

An other option is to insert directly into the video amplifiers. Here the reference voltage is present, so the problem described above is not present. However most customers don’t like this option, because of the extra wires towards the CRT board, which also increases the EMC problems.

For the reasons mentioned above, in GTV1000 RGB insertion into the analog RGB inputs has been selected. In countries without SCART connections this is no problem and the RGB from the micro is divided down to the correct level and connected via clamp capacitors to the RGB inputs.

For countries with full SCART inputs, two options are available. First is just adding the SCART RGB to the OSD/Text RGB, which of course causes a problem in case OSD and SCART RGB are present simultaneously. The second option is using an RGB switch to switch between SCART and OSD/Text.

In GTV1000 a discrete RGB switch has been selected, which is a little cheaper compared to the TDA8601 RGB switch. The problem however is that in the application as described below, expensive switching transistors have to be used to obtain a proper performance, which decreases the price difference with the IC solution.

The principle of the RGB switch can be found in Fig.9 . On the external connector board a passive clamp is present for the RGB input signal. To compensate the diode voltage of the clamp a reference voltage is made, using the same diode as in the clamp circuit.The clamped signal is connected to a switch via a resistor. This switch is connecting the line to ground during the line fly-back and when OSD information is present. During the line fly-back the RGB inputs are clamped, so the clamping capacitor has to be connected to ground to obtain a proper reference.

24




When OSD information is present, the RGB information coming from the SCART-input has to be suppressed. In this case the OSD information coming from the micro via an emitter follower is divided down to the correct level using two resistors.To obtain a proper OSD performance the switching transistor has to be fast. In the GTV1000 a PH2369 is used.The fast blank signal coming from the SCART connector is only active when AV1 is selected. In this case the sync signal for the TDA884X is coming from the CVBS input on the same SCART connector. The fast blank signal coming from the SCART-connector is coupled to the one coming from the micro via an OR function.

2.2.5 Colour decoder.

The colour decoding (NTSC, PAL, SECAM) as well as the base band delay line are fully integrated into the TDA884X. On the outside just the crystals and the colour PLL loop filter have to be connected. Information concerning the application around these pins can be found in ref.[3] report no: AN98002 page109.

In the GTV1000 concept the crystal switching has been designed in such a way, that it is possible to connect 1, 2, 3 or 4 crystals.

Fig.9 RGB input and switch..

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• In case one 4.43 MHz crystal is used (PAL 4.4, SECAM), it is connected to pin 35 (X100).• For one crystal 3.58 MHz applications (NTSC-M or PAL-M or PAL-N), the crystal is connected to pin

34, by closing jumper J102.• Two crystal applications, either a combination of 4.43 and 3.58 MHz or two 3.58 MHz crystals can be

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America, the NTCS-M crystal is connected to pin 34, while either the PAL-M or PAL-N crystal can be switched to pin 35, using the line SW0 (J100, J102 and J103 closed).

• The most extended situation is the 4 crystal application, which is sometimes used in South America, to decode PAL 4.43 MHz besides the three existing systems. In this case the 4.43 MHz crystal is connected to pin 35, while the three 3.58 crystals are switched to pin 34, using the switching lines SW0 and SW1 (J101 closed).

The TDA884X contains a chroma reference output, which supplies the selected chroma frequency to the outside. This signal can be used as a reference for a comb filter. In GTV1000 this comb filter option is not included in the board. For information about the comb filter application see ref.[6] Report no: AN98092.

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2.2.6 YUV interface.

When a version of the TDA884X with YUV interface is used, a YUV connector can be mounted on the GTV1000 board where picture enhancement features can be inserted.

Besides YUV in and out the connector contains ground, supply, I2C bus, sand castle and a line (feature) coming from the micro to control the feature IC. When a YUV version of the TDA884X is present and no feature board is inserted, a dummy connector as indicated in Fig.11 has to be used.

In a non YUV version of the TDA884X only the YUV outputs are available at the pins. These signals are internally connected to the YUV inputs. This means no dummy connector is needed for these IC’s.

More information concerning the YUV in- and outputs can be found in ref.[3] report no: AN98002 page115.

2.2.7 RGB outputs & CRT board.

The RGB outputs of the TDA884X are connected to the CRT board via three small series resistors.The cable from the small signal board to the CRT-board also contains the ground connection of the video amplifier. This ground has to be connected to the ground guard ring around the TDA 884X, as indicated in ref.[5] report no: AN98097.The TDA884X contains a continuous cathode calibration circuit, which adapts the DC level and the gain of each of the RGB channels every frame. On the RGB outputs every field reference pulses are generated and the current running in the cathodes of the picture tube are fed back to the black current input of the TDA884X. The RGB outputs are regulated to a DC level and a gain, so one field a current of 8mA is flowing into the black current pin and the next field 20mA. The reference pulses producing the 8 and 20mA are not coupled to odd and even field.The black current feed-back line is the most sensitive part of the loop. For this reason some precautions have to be taken to avoid instability. The first one is to keep the ground line on the board and in the cable to the CRT board between the RGB lines and the Black current feed-back line. The second one is to apply some filtering on the black current feed-back signal. In the GTV1000 a capacitor (330pF) is connected to the black current feed-back line on the main board, just before the series resistor (10kΩ) connecting the line to pin 18 of the TDA884X.

On the CRT board a TDA6107 triple video amplifier with black current output is used. This device has a fixed gain of 52. To reduce the gain to approximately 45 three series resistors have been added at the RGB inputs. The gain of 45 is needed to obtain the proper drive for the 90° picture tube (Philips A51EAL155X01).

If a higher bandwidth is needed, e.g. when picture enhancement features are used, the TDA6107 can be replaced by a TDA6108.

The outputs of the video amplifiers are connected to the picture tube via special flash-proof resistors.

All tube electrodes, not connected to ground, contain a spark-gap connected to the aqua-dag ground. The focus spark-gap is integrated in the tube socket connector. The aqua-dag ground is connected to

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27


the ground of the line transformer. This configuration has been selected to keep flash-over-currents in a loop as small as possible.

More information about the RGB outputs and black current loop can be found in ref.[3] report no: AN98002 page119. Additional information about the video amplifier can be found in ref.[4] report no: AN96072.

3. MICRO CONTROLLER.

The micro controller socket is implemented with GTV pinning (Global TeleVision). With this GTV convention different types of micro controllers like SAA5290/96 (ETT), P83C052 (MTV), P83CE366 or P83C196 can be used. APPENDIX 2 shows the pin layout of Philips’ popular micro controllers for the consumer television market. With some simple precautions any of the four types shown can be used (see chapter on page 27). In the GTV1000 chassis the micro controller environment can be confi-gured by changing components and solder jumper settings. Together with the versatile TDA884x one-chip family it is possible to develop ONE chassis for multiple markets, that can be optimized for local requirements.

The circuit diagram of the micro controller part can be found in APPENDIX 3. Most I/O pins have series resistors of 100 .. 470Ω. This is done for EMC reasons, to filter unwanted radiated signals from the micro controller. All open-drain outputs have pull up resistors of 3K3 or 15K.

The following table shows the supported PHILIPS micro controllers.

By means of jumpers and some component changes, this receiver can be configured for one of the listed micro controllers. The different configurations are explained in this sub-section.

3.1 Universal micro controller interface description.

To simplify a TV hardware platform which can demonstrate all PHILIPS Micro Controller types, an universal pin definition is defined. In a global TV chassis, this pinning can be used to minimize hardware modifications necessary to configure the set for different market segments. For example the:

• ETT in Europe to support Teletext.• P83Cx70 for the American market to support Close Caption.• MTV for the low-end sets without teletext.

In this sub-section the functional description of the micro controller input and output lines (I/O-lines) is given. Although the functionality of the pins are discussed in the software manuals of the used software

TABLE 4 Supported PHILIPS micro controllers.Type number Description Software Package

P83C053 Micro controller for Television and Video (MTV). CTV271 / CTV272.

P83Cx66 / P87Cx66 Single chip 8 bit micro controller for TV.

P83Cx70 Micro controller for NTSC TV with OSD and Close Caption CTV828.

SAA529x / SAA549x

Micro controller for TV with OSD and One Page Economy Teletext.

CTV832.

28


packages the VST-tuning voltage output pin1, Service / Factory input pin35/45, Stand-by input pin13/21 and Reset input pin33/43 are discussed in detail.

3.2 VST-Tuning voltage control output (Micro-controller pin1 application).

With VST the translation from tuning voltage into tuned frequency is far from linear, the tuner steepness e.g. in UHF can vary from 3 to 30 MHz/V (a factor 10 !). It is NOT possible to linearize a tuning curve accurately in software, because of wide tolerances on tuner-vari-cap curves (even within one batch).The tuning resolution must be better than 62.5 kHz (like in PLL tuner systems), because more miss-tuning will be visible on the screen. For UHF (400 .. 850 MHz) a 14-bit resolution is used. Assuming a LINEAR tuning curve would give 450000/16348 = 27.5 kHz/step. But since the tuner steepness can vary by a factor 10, it is better to use a non-linear integration filter (see APPENDIX 3) . This linearizes the tuning curve, reducing steepness variation to a factor 4. The result is about max. 50 kHz per step (is better than 62.5 kHz).

After linearisation, a VST system has a more constant step size, but still a variation of a factor four. If a ‘step’ is calculated (worst case) to give 1 MHz frequency increment, the less steep areas will render a fourfold smaller step, so four times slower too.

After each value change, the tuning PWM DAC needs 128 x 42.66us = 5.5ms to produce the new pulse pattern. When the non-linear integration filter has T=5, each tuning step must be followed by a delay of 30 .. 50ms.

Fig.12 VST tuning curve linearisation for UHF band

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3.3 Service connector and Factory mode.

The Service connector P203 (see chapter ’The GTV1000 board.” on page 10), gives access to the two (split) I2C-busses plus the possibility to inactivate the micro controller (service and factory mode). The Service Line is connected to an interrupt pin of the micro controller. This makes it possible in future software packages to implement some kind of protocol e.g. to a factory computer.

When contact "Service" of the service connector is short-circuited to ground during 250ms, the software shows a service menu. The configuration and geometry parameters can now be modified, using a standard remote control or the local keyboard. In service mode, the video processor protections are disabled to avoid RGBOUT blanking. This is easier during repair actions.

When the short circuit lasts longer than 500ms, the software enters the Factory mode. It stops the continuous update via the I2C-bus and OSD is suppressed. Now a factory production computer can read or write into the EEPROM. When a command from remote control or local keyboard is received, all devices are updated and the processor releases the I2C-bus again. In this way the non-I2C-bus controlled outputs of the micro can still be controlled. When the service contact is released the software resets the set automaticly.

APPENDIX 3 shows that the signal “Service” is also used as an EEPROM write protect line.Dependent on the applied type EEPROM, a certain area can not be written, while “Service” is high. This gives extra protection against accidental over writing e.g. alignment data. If the micro controller wishes to write data to the protected area, it will temporarily pull down the Service-line.

3.4 Standby command line “On_Off ”.

Open drain output/input, used to switch the power supply between standby mode and normal operation. When the pin is externally pulled low, this is interpreted as a command to go into standby mode. With this, a local standby key can be implemented.

• Output low = Power supply in standby mode• Output high, input high (> 3.5 Volt) = Power supply on• Output high but input pulled low (1.0 .. 1.5 Volt) = Power still on, but local command to go to standby

3.5 OSD outputs FBL, R, G and B.

These outputs have a push-pull outputs for fast OSD transitions. Pin FBL is used as a fast blanking signal and connected to the fast-blanking input of the RGB-switch (see chapter ’RGB input/switch.” on page 23). A low output indicates absence of OSD and a high output represents a colour or blanking active. Synchronization input signals Hsync and Vsync are derived from the deflection part to get a stable OSD picture on the television screen. The polarity of these signals is active high.

3.6 I2C-bus control input/outputs SDA, SCL, SDA1 and SCL1.

These pins are respectively the data and the clock wires of 2 (split-bus) single-master bidirectional I2C-busses. When the I2C-bus appears to be blocked the stand-by LED will start blinking. If the bus remains blocked for a longer time (e.g. 5 minutes) the TV-set will go into standby.

SDA1 and SCL1 are only connected to the EEPROM and the TDA884x, to avoid problems with I2C-bus slave devices blocking the bus e.g. when a power supply voltage fails. With this split-bus system it

30


is now possible to derive supply voltages from the line output transformer (LOT). Further a split-bus construction decreases the chance of data corruption in the EEPROM.

3.7 Reset and supply-voltage-guard circuit.

This demo receiver has a sophisticated reset and supply voltage guard circuit, which triggers the micro controller reset and EEPROM power supply. Most micro-controllers have a internal power-supply guard which will generate an internal reset once the supply-voltage drops below a threshold level. During this reset the outputs do have a defined output condition (most of the time floating). However when the supply falls further, even the internal circuits of the micro stops functioning. This may lead to unpredictable bouncing of the outputs. Because the I2C-bus is controlled by such outputs, a burst of pulses can appear on the clock and data-lines. This can lead to un-wanted write actions, because some EEPROMs keeps on functioning at very low supply voltages.

Once the supply-voltage starts to fall, an external reset is generated before the internal reset becomes active (even if the supply has a falling glitch the external reset will get a defined duration). At the same time the EEPROM supply voltage is switches-off.

The circuit description refers to the previous picture. Advantages of this circuit are the:

• well defined reset duration after reaching a well defined supply voltage.• guaranteed reset pulse even after a short supply voltage dip.• power control of the EEPROM.

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31


The reset input of the micro controller is active high. During start-up of the supply voltage Vstb, TR203 is switched off and consequently TR204 starts conducting. This forces the reset input to follow Vstb. This status remains, until Vstb reaches the threshold level of 4.2V (UZ201 + Ube TR203). Starting from this level, TR203 starts conducting and TR204 switches-off. Now C2011 will be charged via the pull down resister1 inside the micro controller and resistor R2054. This guarantees a sufficient reset pulse duration, after reaching the valid supply voltage.

If the supply voltage falls below the threshold voltage, TR203 switches off immediately and TR204 switches on. This discharges C2011 and activates the external reset of the micro controller. Even for short supply voltage drops (below threshold level), a well defined external reset is guaranteed.

The EEPROM supply voltage is also controlled by the reset pulse to protect the EEPROM data during power up, shut down and/or supply glitches. This prevents uncontrolled write actions as a result of bouncing of the I2C data and clock lines.

3.8 Micro hardware environment configuration.

In this subsection the hardware aspects for the micro environment configuration are give. For each of the supported micros, a detail of the copper (bottom-side underneath the micro) has been included on wich the jumpers to close are marked.Besides setting of the jumpers, it is necessary the change some components in some of the configurations. The critical one are marked on the copper layout details. The bill of material (BOMs) gives the complete information about the micro related components such as not assembled components around the 42-pins micros (MTV and P83Cx66).

3.8.1 Stereo-playback hardware configuration.

For the sound-options the sound-processor/mono option is shown. The stereo play-back function is discussed here because it is micro independent.Fig.16 shows the location of the jumpers and resistors involved. Close jumper J201 and open J202. Now assemble resistors R2019, R2025 and R2030.

1. The value of the internal pull-down resister is micro controller type dependent. This resistor is 8K inside the P83Cx70 and 550K for the ETT micro processor.

Reset micro

Supply EEPROM

+5V stand-by

Fig.14 Reset signal during start-up.

Time base: 100mSec/Div. Trigger CH3.

Fig.15 Reset signal during a power dip.

Reset micro

Supply EEPROM

+5V stand-by

Time base: 100mSec/Div. Trigger CH3.

32


3.8.2 P83C053 (MTV) Micro controller configuration.

The MTV needs additional components for the OSD-oscillator. L201 = 22microH and capacitors C2014 and C2015 are 22pF.

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J213

J206

J211

J207

J208

J205

J200

J209 J2

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J202

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J204

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33


3.8.3 P83Cx66 Micro controller configuration.

The RGB-outputs of this micro are push-pull current sources which can deliver 8mA. This maximum current can be controlled by software to align brightness of the OSD. By means of a resistor (0.82K) to ground (instead of C2019, C2020 and C2021) the R, G and B output current is converted into a voltage which is fed to the RGB switch. The OSD brightness can be set by changing this resistor. The higher the value the higher the OSD brightness.

J212

J213

J206

J211

J207

J208

J205

J200

J209 J2

10J203

J202

J201

J204

Fig.17 P83Cx66 Micro controller configuration.

34


3.8.4 P83Cx70 Micro controller configuration.

The RGB-outputs of this micro are push-pull current sources which can deliver 6mA. This maximum current can be controlled by software to align brightness of the OSD. By means of a resistor (1K) to ground (instead of C2019, C2020 and C2021) the R, G and B output current is converted into a voltage which is fed to the RGB switch. The OSD brightness can be set by changing this resistor. The higher the value the higher the OSD brightness.

J212

J213

J206

J211

J207

J208

J205

J200

J209 J2

10

J203

J202

J201

J204

Fig.18 P83Cx70 Micro controller configuration.


35


3.8.5 SAA549x (ETT) Micro controller configuration.

3.9 Software package.

As said, the GTV1000 can be controlled by four different types of micro-controllers. For these devices we have different demonstration software packages. For detailed user information about these packages we refer to the user manual. The following table illustrates the micro / software package and user manual reference number.

J212

J213

J206

J211

J207

J208

J205

J200

J209 J2

10J203

J202

J201

J204

Fig.19 SAA549x (ETT) Micro controller configuration.

36


TABLE 5 Micro controller versus software package.Micro controller

type Software package User manual reference.

P83C053 CTV271 / CTV272.ETV/UM 97012.0 / ETV/UM 97011.3 (see [13]) and (see [14]) .

P83Cx66 / P87Cx66 -

P83Cx70 CTV828 ETV/UM 98013.1 (see [15])

SAA529x / SAA549x CTV832 CTV832S/ CTV832R (see [16])


37


4. LARGE SIGNAL.

4.1 Power supply.

The power supply is a mains insulated flyback converter supporting the full mains range. The supply is built around the TDA8380A Switch Mode Power Supply controller. It operates at a fixed frequency of 28.8 KHz and in a discontinuous current mode. The output voltages are controlled by duty-cycle modulation of the primary current.

The mains insulation is provided by a SMPS transformer for power transfer and an opto-coupler for the feedback from the secondary side. The feedback information guarantees good stable output voltages.

The principle of a flyback converter is simple, see Fig.20. However we have to deal with non-ideal components. These make the realisation more complex. The TDA8380A SMPS controller IC supports several control and protection functions to handle the complexity more easily.

The mains voltage is rectified and supplied to the SMPS transformer. The primary current is controlled via the power switching transistor. Modulation of the on/off time (duty cycle) controls the output voltages of the SMPS transformer. The 115V supply voltage (line deflection supply voltage) is used as feedback information. Via an error amplifier and opto-coupler the control signal is fed-back to the TDA8380A at the primary side of the supply.

During start-up, the controller is supplied by the rectified mains via a series resistor. Once operational, the controller gets its supply from the auxiliary winding of the SMPS transformer.

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Via the stand-by control line the 15V can be switched on and off. If switched into stand-by, the supply reduces its output voltages to 60% of their nominal value.

The TDA8380A is available in a 16-DIL package and incorporates the following features:

• Internal stabilized supply voltage• High and low supply-voltage protection• External programmable reference currents• Operating frequency 10 to 100KHz• Access to pulse-width modulator to facilitate use of an alternative external error amplifier• Fail-safe control loop• Duty factor fold back• Slow-start or soft-start option.• Direct-drive output stage• First level cycle by cycle over-current protection• Second trip over-current protection• Protection against power transistor short-circuit• Demagnetization sensingThe following table shows the pinning of the TDA8380A.

4.1.1 Circuit description of power supply.

Diodes D903 .. D906 rectifies the mains voltage which feeds buffer capacitor C9010 via a series resistor. This resistor reduces the inrush current during switch on. The diodes are shunted by four capacitors to smooth their switch-off behaviour to reduce mains interference.

To supply the SMPS controller during start-up series resistor R9008 charges C9016. Once reaching the fixed threshold level of 17V, the TDA8380A starts-up the supply. Capacitor C9016 delivers the

TABLE 6 pinning of the TDA8380APin: Function

1. Positive drive output.2. Supply voltage of drive output stage.3. Demagnetization sense input.4. Minimum Vcc threshold setting.5. Supply voltage Vcc.6. Reference current setting.7. Feedback input.8. Output error amplifier. Not used in this application.9. Pulse width modulator input.10. Oscillator capacitor.11. Synchronisation input. Not used in this application.12. Maximum duty factor (Dmax) setting combined with slow start time programming.13. Input current protection.14. Ground.15. Emitter of output sink transistor.16. Collector of sink output.


39


supply for the controller and transistor base-current, until the auxiliary winding voltage is sufficient to take over the SMPS supply. The following two criterion are considered to dimension C9016:

• Its minimum value must avoid under-voltage lock-out.Before taking over, the voltage at C9016 will fall, so the value of C9016 must be sufficient to bridge the period during start-up. This means, once the controller supply voltage falls below the minimum operating voltage of 8.4V, the controller switches off again. Operation below 8.4V is not allowed because the base-drive to the power transistor BUT11A cannot be adequately defined.

• Its maximum value depends on the maximum allowed start-up time.To start the SMPS, the UC9016 must exceed 17V. The charge current depends on the mains supply voltage and the value of resistor R9008. So the maximum start-up time is found at the lowest mains supply voltage. Decreasing R9008 will improve start-up time, but decreases the efficiency as well.

Beside the controller part, also the primary winding of the SMPS transformer is connected to the rectified mains (+VB). The other side of the winding is attached to power switching transistor TR901. Parallel to this winding a dV/dt limiting network R9002, R9005, C9005 and D900 is connected to protect the power transistor. The maximum dV/dt value for this transistor is 1000V/uS. Resistor R9002 has two functions:

• to discharge C9005 prior to each flyback.• to damp the transformer ringing which follows each fly-back. This damping must be sufficient to

suppress the recurrence of positive pulses at the demagnetization input to the IC during the next oscillator cycle.

To control the output power of the SMPS, the primary current through the transformer is switched. The needed base drive of the bipolar power transistor consist of two separated drives:

• a forward drive to switch on the transistor. The forward base-current can be adjusted by resistance R9022 and R9019. This construction is used to reduce power dissipation in the forward drive transistor of the SMPS controller. For the used transistor the typical base current is 0.5A for the duration of the duty-cycle. The nominal take-over supply voltage is close to 20V. So the nominal base-current is about 20/30 = 0.67A.

• a reverse drive to switch off the transistor. To ensure minimum transistor dissipation, a negative going base current is needed. This requires a negative supply voltage (with respect to the transistor’s emitter). Capacitor C9022 acts like such a voltage source. It will be charged by the positive base current and zener diode D910 limits the voltage to 5V1. Inductor L906 limits the dIbase/dt ensuring a nominal storage time of about 1uS. R9024 avoids switching of the transistor during the dead time of the clock cycle. During this time both forward and reverse outputs are floating. R9025 damps ringing of inductor L906 and D912 protects the SMPS controller output transistor against electromotive force (EMF) generated by L906.

To control the line deflection supply voltage with 1% accuracy, the secondary +115V output voltage delivers feedback information. This information will be processed in a differential amplifier formed by TR902 and TR903. The base of TR902 is connected to the reference voltage UD916 (5V6) and R9043. Via this resistor, beam-current related information is added to compensate the horizontal picture width modulation caused by the average beam-current (See chapter 4.4, page 49). This width gets larger at higher beam-currents. To compensate for this, the horizontal deflection voltage will decrease as function of the beam-current.

40


Via the base of TR903, the divided +115V output voltage is added to the differential amplifier. The divider is formed by resistors R9034, R9037, R9040, R9045 and R9041. Via R9045 the output voltage can be adjusted. During normal operation transistor TR904 is conducting and the base level is calculated from: (R9040+R9045)//R9041 / [R9034+R9037+(R9040+R9045)//R9041] * +115V. The result is [4 / 68+3,9+4] * 115V = 6V.

The added diode D914 prevents the +8V to fall once the +115V output is unloaded. In this situation, the output capacitor will integrate the voltage over-shoot at the transformer output caused by transformer ringing. This ringing should lead to 10 to 15% higher output voltages, however the feedback loop corrects this. This correction results to 10 to 15% less output voltage at the loaded low voltage outputs. This will happen during stand-by operation of the TV chassis. Once the +16V falls below +12V, the feedback information will be adjusted to track with this +12V. This take-over voltage is calculated by: (R9040+R9045)//R9041+R9037 / [R9034+R9037+(R9040+R9045)//R9041] * 115V.

To reduce the stand-by power consumption, TR904, R9041 and capacitor C9035 were added to the feedback input of the differential amplifier. During stand-by, resistor R9041 is de-coupled from the +115V feedback divider. Now the feedback voltage becomes:(R9040+R9045) / [R9034+R9037+R9040+R9045] * 115V = 9V. The differential amplifier corrects this so that the outputs will drop by about 40%. Only D914 can overrule this output voltage reduction.

To improve the start-up coming from the stand-by mode, capacitor C9035 has been added to guarantee a smooth transition.

The input LED of the opto coupler is controlled by TR903. The collector of TR903 is connected to the cathode while the anode is supplied by a stabilized 8V2 supply voltage. Increase of the +115V output gives more LED-current. As a result the opto coupler’s output transistor starts to conduct more, causing a reduction of the input voltage at the duty-cycle control pin. Now the controller starts to reduce the duty-cycle of the primary supply current.

The following part describes the application topics to realize the SMPS protections:

• Slow-start:The slow-start time is programmed via capacitor C9029. It controls the speed of the duty-cycle build-up, preventing current and/or demagnetization protection during start-up. This guarantees a smooth start-up behaviour. The value of this capacitor is a trade off between two situations:-The minimal value for this capacitor can be found by checking the current and/or demagnetisation protection signals at the minimum and maximum mains supply input voltages.-The maximum value for this slow-start capacitor is related to the buffer capacitor at the controllers power supply (C9016). Increasing the slow-start time also increases the TDA8380A power supply take-over time. To guarantee no under-voltage lockout, C9016 must increase accordingly.

• Maximal Duty cycle:To avoid the continuous current mode operation of the SMPS a maximum duty cycle can be programmed via resistor R9027. The maximum duty-cycle is programmed to be 60%.

• Current protection:The current protection can be programmed by resistors R9028, R9029, R9030, R9033 and R9032. Resistors R9028 .. R9030 are sensing the emitter current of power transistor TR901. Because the emitter of this transistor is directly connected to the reference ground of the SMPS controller, the base-emitter voltage is independent of the voltage drop over these sense resistors.Resistor R9032 and R9033 define a DC-offset voltage at the current protection I/O pin (with respect


41


to the reference ground). The emitter current of TR901 flows through current sensing resistors R9028 .. R9030. The positive side is connected to the reference ground, while the negative side is connected to pin13 via resistor R9033. If the emitter current increases this causes the voltage level at pin13 to drop. Once reduced to 200mV, the cycle by cycle current protection is activated. At 0V, the supply will be switched-off immediately and will re-start via the slow-start procedure.The maximum primary current depends on the maximum current specification of the used SMPS transformer (3Amp) and not on the used power transistor BUT11A. For this chassis the current is limited at 2.5A.Resistor R9032 is added to realize a current fold back due to over-loading one of the SMPS outputs. If a cycle by cycle over-current protection is present, this will result in a lower output and auxiliary voltages. Reduction of the auxiliary voltage reduces the DC-voltage at the current protection pin and herewith the maximal allowed current.

• Over-voltage protectionThe outputs of the SMPS are protected against an over-voltage condition. This can be the result of a defect feedback circuit. Via resistors divider R9014 and R9020 the over voltage protection pin (pin7) is connected to the auxiliary winding, in order to monitor the output voltages of the transformer. Once the voltage at input pin7 exceeds 3.2V, the controller switches off and re-starts via the slow-start procedure. During nominal operation this voltage is R9020 / (R9020+R9014) * 20V = 15/106 * 20 = 2.8V.

• Demagnetization protectionVia resistor R9015 and R9018 the un-rectified auxiliary winding voltage is used to monitor the stored magnetic energy in the SMPS transformer. This must prevent cumulation of magnetic energy inside the transformer. Before starting the next SMPS cycle, the remaining energy must be zero preventing saturation of the SMPS transformer. A saturated transformer results in a very high primary current which can damage the power switching transistor.A voltage above 0.6V at the demagnetization input will prevent the power transistor from switching. At the auxiliary winding the switching level is calculated from: R9018/(R9015+R9018)xVaux<=0.6V. Vaux<=(11K2/1K2)*0.6V gives 5.6V. This threshold level is chosen to prevent triggering of this protection due to transformer ringing.

The secondary side supports the following output voltages:

• 115V, used to supply the horizontal line deflection.• 45V, used for the vertical retrace supply voltage.• 15V, used for Vertical scan supply and audio output amplifiers.• 8V, used to supply the video processor.• 5V or 3.3V, used to supply different types of micro controllers, tuner and additional hardware to

control the chassis. The output voltage is programmable via resistor divider R9017 and R9023. See the next table for the proper values.

TABLE 7 5V / 3.3V micro resistor valuesR9017 R9023 Output voltage

2K4 3K3 5V

1K 3K 3.3V

42


• 5V / 3.3V stand-by, used to supply the micro controller. This supply is programmable by resistor divider R9004 and R9006. See the next table for the proper values.

Although this name suggests to be the only stand-by supply, both 5V/3.3V supplies remain powered during stand-by operation. This because most micro controllers must be powered at all its supply pins (Vdd core, Vdd peripheral and Vdd analog).

Transistor TR900 switches the power supply between normal and stand-by operation. The base current is controlled via a transistor, which is controlled by the on/off-output-pin of the micro controller.Removal of the micro controller results in a normal operation of the power supply. This makes it possible to control the chassis via a personal computer, without extra handling to switch-on the supply.

4.2 Horizontal deflection.

4.2.1 Low voltage horizontal deflection driver circuit.

The horizontal driver stage requires a 16V supply voltage. The horizontal drive current is extremely low, because of Field Effect Transistor TR907. The horizontal drive is AC coupled via C9044, which prevents excessive power dissipation during stand-by operation.

The selected BU2506DF horizontal output transistor features a:

•a current gain of 5.5x.•build in efficiency diode (Iforward max.: 3.0A).•build in resistor between base and emitter of 60Ω.•isolated package.

Fig.22 shows the signal relationship between the horizontal drive, horizontal flyback, gate source voltage of TR907 and the primary

current of L910.

TABLE 8 5V / 3.3V stand-by resistor valuesR9004 R9006 Output voltage

2K4 3K3 5V

1K 3K 3.3V

1.8k

R90551k

HORDRIVE

TR906

BU2506DF+BEAD

C9044

10uF16V

CU15_driver1

23

4

D921

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L910

C9041

470nF

100R9053

+8V

10R9054

470nF

C9040

R9056

TR907BST70A

R9052

18kR9057

120

Fig.21 Horizontal drive circuit


43


. Legend:

• ch1: HORDRIVE.• ch2: UCollector of TR906.• ch3: Ugs of TR906.• ch4: Idrain of transistor TR907. Scale: 200mA/Div.

Once the Hordrive signal is high (CH1), TR907 starts conducting. This results in a rising current at the primary side of transformer L910 (CH4). Now, energy is stored into the core, because the base-emitter diode of TR906 prevents a current to flow at the secondary side.

Resistor R9053 determines the stored energy thus the base-current for TR906. Increasing the

resistance value, reduces the base-current. The maximum base-current is set to 600mA, which is sufficient to drive a peak-collector current of about 3A. The average deflection current through the collector of TR906 is about 2.5A.

After a high to low transition of the Hordrive-signal, TR907 will switch-off and a flyback pulse at the secondary side of L910 turns-on transistor TR906. Fig.23 shows the signal shapes at the secondary side of the driver transformer.

Legend:

• ch1: HORDRIVE.• ch2: UCollector of TR906.• ch3: Ube of TR906.• ch4: Ibase of transistor TR906. Scale: 1A/Div.

If Hordrive becomes high again, the output current of L910 changes polarity and TR906 starts to switch-off. This should not to be done too fast to

avoid hot-spot effect in TR906. To assure a correct storage time of at least 4.5uS, the driver transformers has a leakage induction of about 9uH at its secondary output winding. CH4 in Fig.23 illustrates the base current of TR906. The duration of the negative going edge (600mA down to -1A) represents the storage time, here about 5uS.

CH3 in Fig.23 shows the base voltage of TR906. The negative going spikes occur when the base current reaches zero. Now the transistor’s base emitter junction enters its reverse breakdown. The voltage ratio between primary and secondary winding of L910 is 7.3:1 (+/-5%).

The preferred horizontal deflection yoke specifications are:

• Inductance: 2mH.• Resistance: 2,3Ω.• Maximum allowed current: 3,1A.

Fig.22 L910 primary signal shapes.

Fig.23 L910 secondary signal shapes.

44


4.2.2 Horizontal flyback feedback circuit.

To control the phi-2 phase locked loop circuit, the video processor needs an input signal called Hflyback. This signal is generated by the circuit shown in (see Fig.24) . It supports two different threshold levels:

1. 30V for the rising edge. This level can be selected more or less by R9047, R9049 and capacitor C9037.

2. 400V for the falling edge. The hysteresis between rising and falling edge levels can be tuned by C9037,

C9038. Decreasing C9037 and increasing C9038 will lower this 400V threshold level.

Because of non-ideal components in the horizontal output stage, the flyback pulse-shape (at C9039) is beam-current dependent. The selected switching levels improve the stability of the generated Hflyback pulse width, resulting in less horizontal jitter. Shifting of the slicing levels makes the Hflyback pulse smaller. This affects:

• the horizontal picture position which can be corrected by the horizontal shift control.• the horizontal blanking. Usually the influence of this blanking is not visible because it normally stays

within the over scan. A too small pulse will show retrace-lines at the left-hand side of the screen.• the horizontal start position of the OSD. If the falling edge of the Hflyback pulse is used by the OSD

generator, a shift will affect the horizontal start position on the screen. Most micro’s do have a register to align this position.

Schotky diode D917 prevents saturation of TR905. This improves the turn-off switch behaviour of this transistor. (Ube + Uec + Uka = 0 -> Ube = Uce+Uak. Assume Uak ~ 0.2V, then the base voltage/current will be reduced when Uce droppes below 0.4V).

D918 will clamp the base voltage of TR905 to about -0.6V. This will occur during the falling edge of the flyback pulse.Via D918, C9037 and C9038 will be charged again.

1uF

BAT85D917

100R9046 C9036

TR905

BC548C

1N4148D918

330pF

100pFC9037

220k

R9047

220k

C9038

R9048

+8V

47kR9049

10kR9050

Hflyback

Fig.24 Flyback adapter circuit


45


4.2.3 Horizontal deflection corrections.

4.2.3.1 Linearity correction.

The horizontal linearity correcting device L909 consists of a coil, wounded on a ferroxcube rod with a magnet. Because of the magnet, the core material is close to saturation if the current flows in one direction. This results in a low inductance of the coil. Once the current flows in the other direction, the electro magnetic field will compensate for the magnet, resulting in a high inductance. This corrects for the resistance of the deflection coil.

When a line-scan starts, the linearity corrector consumes energy in its permanent magnet until this is saturated. The rest of the line scan the

(saturated) linearity corrector has a low impedance. In the last part of a line-scan, the Ohmic resistance of the H-deflection coils consumes deflection energy. When the linearity coil is well balanced to the deflection yoke, it improves the linearity of the horizontal scan.

L909 is connected in series with capacitor C9042 and the horizontal winding of the deflection yoke. The effectivety of this component is deflection yoke dependent, so the correction must be checked for different picture-tube types. If the horizontal linearity is not good, exchange L909 for a more suitable value. Be sure the current direction through the coil is correct.

4.2.3.2 S-correction.

To correct the horizontal linearity between centre and the left- and right-hand edges of the screen, the supply for the horizontal deflection is not taken directly from +VB but from a charged capacitor C9042. When the deflection saw-tooth current flows through this capacitor, its voltage will be modulated with a parabola. This in return causes an “S” shaped modulation of the deflection current. The required amount of S-correction depends on the picture tube type.

During the scan period the capacitor is used to realize a S shaped horizontal deflection current (see Fig.25) The required S-correction is picture tube type dependent. Decreasing the capacitance of C9042 increases the correction.

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46


4.2.3.3 Dynamic horizontal-phase correction.

Using CS to supply the horizontal deflection has a disadvantage. When displaying a high intensity horizontal line the required beam-current will discharge the EHT voltage. This EHT energy will be restored in the following horizontal flyback pulse(s), partly via LLOT-primary from +VB and partly via LHorizontal-Yoke from C9042. Consequently the voltage on C9042 will drop, so the next line-scan will start with a phase shift to the right hand side of the screen. In a few lines the equilibrium will be restored, but an effect called “noses” will be visible on the screen. To reduce the voltage drop across C9042. Without precaution a horizontal phase-shift

will be visible after displaying a horizontal white line of a cross-hatch pattern.

The energy needed for the white line is delivered by the line output transformer (magnetic energy) during the horizontal flyback. This energy will be restored, partly from the deflection supply (115V) and partly from capacitor C9042. Now UC9042 will drop and so will the deflection current at the beginning of the scan (left-hand side of the screen). This horizontal phase shift is visible at the vertical lines of the cross-hatch pattern.

Because LHorizontal-Yoke* dI/dT remains the same, the UC9042 is increased at the most right-hand side of the screen giving more deflection current. This extra current causes a phase-shift to the right. Now, the average deflection current is not zero any more, which indicates the energy transfer to the picture tube. Sometimes it takes more line-periods to fully re-charge the picture tube, so it may take a few lines before the phase shift is disappeared completely.

To reduce the voltage drop across C9042, capacitor C9043, resistor R9051 and diode D919 are added. C9043 is charged during the fly-back period via R9051. After UC9042 drops below the UC9043 - UD919, it will be re-charged by C9043. This reduces the horizontal phase shift drastically.

4.3 TDA8351/56 vertical deflection.

The TDA8356 is a 9 pins vertical deflection circuit (2 App) for DC-coupled 90° deflection systems with frame frequencies from 50 up to 120 Hz. Two supply voltages are required, one supply voltage for the scan and a second supply for the flyback. For deflection systems that need 3 App, the compatible TDA8351 can be used.

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47


The vertical drive currents of TDA884x pins 47 and 46 are connected to input pins 1 and 2 of the TDA8356. The input bias currents are kept equal: iCOM=1/2[i1+i2]. The differential input voltage is set by the current through RCON:

iRCON=[i1-iCOM]=-[i2-iCOM] => iRCON=1/2[i1-iCOM-i2+iCOM]=1/2[i1-i2].

Pin 2 is on a fixed DC bias voltage VBIAS = 2.3V. The drive voltage on pin 1 is:

VDRIVE = iRCON x RCON.

For optimal signal-to-noise this should be typical 1.4 VPP. The drive voltage is amplified by "A" and fed to two complementary amplifiers "B" and "C". The outputs (pins 4 and 7) are connected to the series connection of the vertical deflection coil and feedback resistor RSENSE. For HF loop stability a damping resistor (330 Ω) is added over the deflection coil. The voltage across RSENSE is fed via pin 9 to correction amplifier "D", to obtain a deflection current which is proportional to the drive voltage. The supply voltage for the TDA8356 is 16V at pin 3. The flyback generator has a separate supply voltage of 45V on pin 6.According TDA884x specification: IDIFF = i1 - i2 = 0.76 .. 1.14mAPP, so nominal = 0.95mAPP.

• The TDA8356 differential input voltage specification is 1.2 .. 1.8VPP, so nominal: 1.5VPP.• Common mode bias currents into TDA8356 pins 1 and 2 should be typical: iCOM = 0,40mA

We can calculate the optimal value of the conversion resistor:

RCON = 1.5VPP / [1/2x0.95mAPP] = 3kΩ.

The TDA8356 output current is defined by:

iRCON x RCON = iCOIL x RSENSE.

Knowing the desired deflection current we calculate:

Fig.27 Block diagram of the vertical output stageTDA8351/56

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RSENSE = 1.5 / ICOIL.

Please note that the output voltage at TDA884x pins 46 and 47 should not exceed 4Volt. Maximal peak at TDA8356 input pin 1 is:

VBIAS,PIN2 + 1/2 x iRCON,MAX x RCON = 2.3 + 1/2 x 1.14 x 3 = 4V.

The R-C filters at pin 46, 47 form a low-pass filter for better EMC immunity. The value of these resistors should be low in comparison to RCON (e.g. 100Ω), otherwise the maximum VDRIVE amplitude may not be reached. The see chapter ’Vertical Deflection diagram.” on page 67 shows the added L-C filters directly at the vertical deflection plug. These suppresses EMI pick-up by the vertical deflection cable.

A vertical guard function generated by "E", can be used to protect the picture tube from burning-in during malfunctioning of the vertical deflection. During the vertical retrace the vertical guard output becomes high (Uvguard = 5.0 Volt at Ivguard = 500 uA for about 1mSec time period). This is sensed by the TDA884x BCL input pin 49 (combined Vguard + BeamCurr). The condition can be read via bit NDF. To protect the picture tube against burn-in, the RGBOUT pins will be blanked (when protection enabled by EVG = 1).

Emitter follower TR107 is added because the total load of the vertical guard input, Beam-current interface and micro controller Vsync input can not be driven by the TDA8356 guard output. This buffered vertical guard signal is used for:

•triggering the video processor vertical guard circuit (pin 22).To trigger the video processor vertical guard circuit, the input voltage must toggle above and below the 3.65V.The video processor internal bias voltage is 3.3V. However, at low beam currents and because of integration of the guard pulses by capacitor C1032, this 3.3V will rise. The contribution of the vertical guard pulses is about 1/20 (vertical flyback pulse duration of 1mS and a frame scan time of 20mS) of the voltage swing during fly-back and scan. Assume at low beam currents UC1032 = 3.3V the worst case contribution is about (5V - 3.3V) * 1/20 = 0.08V.

As long as the average voltage of UC1032 does not exceed 3.56V, this additional charge is aloud. The TDA884x input pin 22 is internally clipped at 4V, to protect the input circuits. The guard pulse from TDA8356 can source 1 .. 2.5mA at 4.5V amplitude. To limit the current (= energy) in the pulse, a series resistor RS can be inserted. Its maximum value is:RS,MAX = (4.5V - 3.56V) / 1mA = 850ΩIn practice RS should be lower, because the guard pulse amplitude will be divided over RS and the series resistor (1k) of the Beam Current integrator capacitor. A practical value for RS = 100Ω.

• The vertical synchronisation of the on screen display circuit in the micro controller.D102 will reduce the low level of the PNP emitter follower (Ube TR109 - UD102). This is necessary

10uF

C1032

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BC-input

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220

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R104110k

1N4148

D103

R10331k

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Vguard

Vsync

TR107BC558

Fig.28 Average Beam current circuit


49


because the falling switching threshold of the vertical sync. input of some micro controllers is about 0.9V. D103 prevents the influence of UC1032 at this low level.

To minimize vertical related disturbances in the ground and supply tracks of the receiver, resistor R8004 and de-couple capacitor C8004 are added near the IC. Also the Fly-back supply voltage at input pin 6 is de-coupled by resistor R8005 and capacitor C8002. Its maximum aloud capacitance is 22uF to limit excessive peak loads in the IC. Instead of connecting C8002 directly to the IC ground, it is de-coupled towards the operating voltage at pin 3. This reduces the internal voltage differences during switching-off the set. Because the load at the 16V supply is higher compared to the 45V supply load, the 16V will drop fast. By de-coupling the 45V to the 16V, it will drop accordingly. This result in less internal stress in the IC.

4.4 Beam current information.

The beam current information is available across resistor R9058. UBeamcurrent is reverse proportional to the beam-current. The video processor needs beam current information to:

• Limiting the total average beam-current at high contrast and brightness settings. This limit is determined by the picture tube specification and also limits the EHT load. Therefore, the video-processor needs average beam-current information at input pin 22. Integration of the beam current results in the needed information, but smooths away large beam current steps. To avoid this, the application around transistor TR109 and capacitor C1032 were implemented (see Fig.28) . High average beam currents will result in fast contrast and eventual brightness reduction (fast attack), while on the other hand the recovery takes more time (slow decay). This avoids contrast and/or brightness flickering on the screen.The attack time is mainly determined by C1032 and R1050 (~2.2mSec) while the decay time is C1032, R1042 and an internal pull-up resistor of 40K (~500mSec or a duration of 25 frames). To prevent false triggering, R1045 and C1030 are added to switch TR108 smoothly.A second advantage of this circuit is that the AC beam-current information is still available and can be used for horizontal picture width/phase correction in 110-degrees concepts, where a E-W modulator is present.The application for the vertical guard function combined at pin 22 of the video processor is discussed in chapter “TDA8351/56 vertical deflection.” on page 46.

• Control the dynamic vertical picture height. The Extreme High Tension (EHT) voltage is reverse proportional to the beam current due to the internal resistance of the LOT.Reduction of the EHT increases the picture width and height, because the electrons inside the CRT remain longer in the magnetic field of both the horizontal and vertical deflection coils.To correct the vertical amplitude changes due to variations in the average beamcurrent (EHT-tracking), the video processor needs beam current information at input pin 50.The input range for this input (pin50) is: 1.2 .. 2.8V.In this design the EHT tracking versus beam-current transfer function is:UEHT = 2.4 - 0.7 * Ibeam-current [mA].In 90-degrees concepts the dynamic horizontal amplitude is corrected by control of the horizontal deflection supply voltage, because no East-West drive is available. More beam current will decrease the horizontal supply voltage to correct the picture width. See chapter 4.1.1, page 38.

50


5. LAY-OUT & EMC RECOMMENDATIONS.

5.1 Lay-out.

All remarks concerning the lay-out of parts of the receiver have been integrated in the chapter describing the specific circuit part. A special report has been created, describing the TDA884X board design step by step.The information can be found in ref.[5] EMC guidelines for TDA88XX applications, report no: AN98097.

5.2 EMC.

Report AN98097 ref.[5] also describes all design rules, to obtain optimal EMC performance of the board.

The performance of the GTV1000 receiver has been measured with different input signals. In APPENDIX 15 the EMC performance can be found when receiving a SECAM L signal, because this is the most critical situation.

6. ALIGNMENTS.

Before the receiver is switched on, please check the following:

• The presence of all components in the required configuration• Correct setting of all solder jumpers• Good connections of all cables, especially the high voltages to the CRT panel and picture tube• Connection of picture tube Aqua-dag grounding to CRT panel

6.1 Front end IF-PLL.

This only for N1 version of the TDA8844. Apply a 38.9MHz IF-signal, modulated with a PAL test pattern to the IF output of the tuner (at pin 11 of tuner). Force the system in PAL mode. Enter the service menu and select item “IF”. Adjust the value until the AFC indication toggles between 01 and 02. The N2 version has an alignment free IF coil inside.

6.2 Tuner AGC.

Apply an RF signal between 10mV and 50mV to the tuner. Tune to this signal. For an asymmetrical tuner, adjust “AGC” for 1Vp-p at the input of the SAW filter. For an symmetrical tuner, adjust for 0.5VPP.

6.3 Vertical geometry.

• Apply a picture with a test circle to Scart input AV1 and selects this input.• Adjust brightness, contrast and the potentiometers at the EHT transformer for VG2 and focus volt-

age, for a normal picture.• Set the vertical zoom to its neutral position VX = 19HEX.• Adjust the vertical slope “VS” until the middle line of the test circle is half visible (lower half of the

screen is temporary blanked by SBL = 1).


51


6.4 Horizontal geometry.

• Apply a picture with a cross-hedge pattern to Scart input AV1 and selects this input.• Adjust the picture height “VA”, vertical shift “VSH” and vertical S-correction “SC”.• Adjust the horizontal phase “HSH” and picture width “EW” (full scan width).• Adjust the horizontal linearity with the linearity corrector coil on the power & deflection board.• Adjust the parabola width ”PW” and the corner parabola correction “CP” for perfect straight vertical

lines.• Adjust the trapezium correction “TC”.

6.5 Video amplifiers.

• Apply a video signal for a black picture to Scart input AV1 and selects this input.• Set brightness and contrast to mid position.• Set the white “gain” controls “WPR”,”WPG”,”WPB” to mid position = 31HEX

make sure that the ABS loop is enabled (AKB = 0).• Adjust VG2 voltage to make the black level, on the R, G and B guns, equal to the specified cut-off

voltage of the tube. Measure the highest black current measuring pulse of one of the three cathodes, at the beginning of the scan (oscilloscope triggered on vertical). This pulse should be 10V below the desired cut-off voltage of the picture tube. So for a desired cut-off of 160V the highest black current measuring pulse should be 150V.

• Change the video signal to a white picture (contrast control still in mid position).• Adjust the “white gain” controls “WPR”,”WPG”,”WPB” for the correct white point (use a colour ana-

lyser with a 300 NIT scale).• Change the video to a grey scale and check for linearity and visibility of all bars except the black one.• Change the video to a cross hatch pattern and set contrast to maximum.• Adjust the focus potentiometer at the EHT transformer (at high beam-current), so that horizontal and

vertical lines are equally sharp on the screen.

6.6 Luminance-Chrominance delay.

The TDA884x has an adjustable luminance delay “DLY” to correct for delay in the SAW filter. This can be used to equalise the luminance delay for each colour system, so that the transitions in grey match the colour transitions. (Suggestion: In a multi-standard receiver, the embedded software can store this alignment for each colour system separately).

• Set contrast, brightness, colour saturation and peaking to normal values.• Select a colour test circle pattern via the front-end (tuner) and adjust the luminance delay DLY.

7. MODIFICATIONS WITH RESPECT TO PRINTED CIRCUIT PR31602.

When this report was made, most of the boards had already been delivered, while there are also no plans to make a redesign of the board. For thisTypical performance figures reason this chapter with modifications that were found after finishing the board design has been made.

• The resistor from the AGC lead to ground is missing, see figure 5 on page 17.

• Using the UV13xx MK2 the series resistor R3015 = 22KΩ must become 0Ω.

52


• The CVBSout track from the demodulator output to the SCART and the track conducting CVBSext from the external input to the TDA884X are directly next to each other on the GTV1000 board. This situation should be avoided, because this can cause cross-talk between internal and external CVBS. See also Chapter 2.2.3 on page 21.

• A small modification was introduced to improve the stability of the black current feed-back loop. There was a series resistor present of 1k from the current output of the video amplifiers to the black current input of the TDA884X. The resistor is increased to 10kΩ. Also a small capacitor C of 330pF is added between the “guard-ring” ground and black current signal comming from the video amplifier side, see Fig.29 . This modification reduces the bandwidth the black current feed-back loop. This is no problem, because the the reference pulses on the RGB outputs is present during the scan period of one line, while the feed-back current is measured on approximately 2/3 of the line.

•

• In the vertical amplifier application several modifications have been introduced. The circuit diagram of the vertical amplifier stage can be found in APPENDIX 12.• The first one is the decoupling capacitor on the fly-back supply (45V). This has been reduced

from 100µF to 22µF, to reduce the dissipation in the fly-back circuit.• One of the decoupling capacitors (C8006) had a value of 100nF. After evaluation 22 nF is

recomended.• The capacitive load on the outputs has been changed, in order to obtain a better stability of the

vertical output and of the vertical sync pulse to the micro controller, whitch is derived from the vertical retrace pulse.

• Capacitor C8005 must be deleted.• Capacitor C8008 must be deleted.• Resistor R8009 should change to a short circuit.

Fig.29 Black current feed-back.

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• Capacitor C8009 must be changed from 220nF to 10 nF.These last changes have been selected, so the circuit functions optimal for the picture tube that is used. If a different tube is used, the capacitive load on the output may have to be adapted.

• In the horizontal drive circuit (see APPENDIX 14) the base drive of the horizontal output transistor was set to a value which was in fact a little high. To reduce this base current from 1A to 600mA, resistor R9053 was increased from 100Ω to 150Ω.

• In the power supply (see APPENDIX 13) a diode has been added to the base of transistor TR902 in the error amplifier, for protection. The kathode of the diode is connected to the base, while the anode is connected to ground, to avoid a negative voltage of more than 0.7V on the base. The base can be pulled to a negative voltage by the beam current line.

• A modification was introduced in the micro controller reset circuit to obtain a better timing for the memory supply switching. By deleting resistor R2059 and reducing the value of resistor R2054 from 39kΩ to 22kΩ the memory supply is switched on after the reset pulse.

• A second modification around the micro processor is the supply to the write protect pin. In the origional design, the memory protect pin and the service pin were supplied with Vstb. The problem is that the Vstb is present when the Vmem is switched off. This means that when the memory voltage is switched off, and the supply to the service pin connector is still present, the protection dodes

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inside the memory chip start conducting and via that way supply the IC. For this reason the pull-up resistor of the service pin is now connected to +Vmem.

8. REFERENCES.[1] CTV4501 multi-standard receiver with TDA8375 one-chip TV-processor.

Report No: AN96037, April 1996, E.C.P. Arnold, J. van Nieuwenburg (PS-SLE Eindhoven).

[2] TDA8840/41/42/44/46/47 demonstration board PR31291, PRELIMINARY.Report No: AN96092, E.C.P. Arnold (PS-SLE Eindhoven).

[3] Application information for single-chip TV processor TDA884x/885x-N2.Report No: AN98002, January 1998, F. Bremer, T. Bruton, A. Kenc, P.C.T.J. Laro,J.F.M. Luyckx,R.P. Vermeulen (D&A CICs Nijmegen).

[4] Application and product description of the TDA6107Q-N1 video output amplifier.Report No: AN96072, february 1997, E.H. Schutte (D&A CICs Nijmegen).

[5] EMC guidelines for TDA88xx applications.Report No: AN98097, December 1998, J. van Nieuwenburg, M. Coenen (PS-SLE Eindhoven).

[6] The GTV2000 Global TV Receiver.Report No: AN98092, January 1999, Ralph Van Den Eijnden (PS-SLE Eindhoven).

[7] Sound processor in TV.VTR sets with the integrated circuits TDA9840 and TDA9860.Report No: HAT/AN92004, April-1992, U. Buhse. (PS-SLH)

[8] Single chip NICAM-728 Receiver SAA7283.Report No: AN96002, 13-Dec-1995, P.A. Stavely, PC-ALS Southampton.

[9] Nicam sound with SAA7284 and TDA8375A using conventional intercarrier IF architecture.Report No:AN96046, May-1996, V. Pham, PC-ALS Southampton.

[10] The BTSC Stereo/ SAP/ DBX decoder and audio processor TDA9854.Report No: AN95047, H.J. Kuehn (decoder part), U. Buhse (audio part) (PS-SLH).

[11] User manual for the Application Board of the TDA9875A/TDA9870A Digital TV Sound Processor.Report No: HSIS/TR9801, May-1998, J.Matull, H. Kuehn, P. Schöning (PS-SLH).

[12] TV sound control software for the TDA9855.Report No: AN94004

[13] TV Control System CTV271SV2.Report No: ETV/UM 97012.0, September 1997, H. Timmerman (PS-SLE Eindhoven).

Fig.31 Write protection circuit non volatile memory.

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[14] TV Control System CTV272S.Report No: ETV/UM 97011.3, September 1997, H. Timmerman (PS-SLE Eindhoven).

[15] User Manual TV Control System CTV828S.Report No: ETV/UM 98013.1, January 1999, J.G.M. Van Velthoven (PS-SLE Eindhoven).

[16] TV System controller CTV832S/ CTV832R. TV control.Report No: ETV/UM 97010.0, November 1997, R. Van Den Broeck (PS-SLE Eindhoven).

Philips Semiconductors AN9805156

APPENDIX 1 Main diagram

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dc

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f

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AV

1



57


APPENDIX 2 GTV pin-compatibility of Philips TV micro controllers

P31

/Adc

1

P05

P21

/Pw

m0 ETT SAA5499

P20

/Tpw

m

P32

/Adc

2

P33

/[Adc

3]

Vss

M+

T

P00

P01

P02

P03

P04

Vdd

T

P06

P07

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A

Cvb

s0

Cvb

s1

Bla

ck

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Fra

me

Tes

t

CO

R

SC

L/P

16

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m1 [P

wm

7]/P

34

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RefBGR

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Hsy

nc

Vsy

nc

Vdd

A

P23

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lGnd

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lIn

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lOut

Res

et

Vdd

M

Int1

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T0/

P11

Int0

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T1/

P13

P24

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m3

SD

A/P

17

P14

P15

P25

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m4

P26

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m5

P27

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m6

P30

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0

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1

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m1 MTV 83C055

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m

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P23

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A/P

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P37

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P05

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m5

P06

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m6

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m7

P10

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P31

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1

P06

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m0 P83CE366

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m

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P52

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nc

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nc

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P54

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A/P

16

P17

Vdd

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P55

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m4

P56

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m5

P57

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m6

P30

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P26

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P36

P37

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0

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v2

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0

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1

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f

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n

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nc

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vice

DK

L1

Vdd

Stb

y

Gnd

Gnd V

ddM

TV

only

Fig.32 GTV pin-compatibility of Philips TV micro controllers


APPENDIX 3 Control diagramdiagram

42p

42p

Clo

se fo

r 52

pin

s IC

Clo

se fo

r 42

pin

s IC

Clo

se fo

r 42

pin

s IC

only

Fo

r 1

69

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n ju

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r "c

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stors

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e

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jum

per

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/

PCF85116-3

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r P

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n

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n/A

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770

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a

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ET

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169

ET

T, 3

66, 1

69,7

70

MT

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366,

169

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MT

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66, 1

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TT

52p 52

p

[ MTV, 366, ETT, 169,770 ]

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3x

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R2069R2070

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0nF

4.7

k

R202

5

+Vst

b

R2

021

4.7

kR2018

3.3

k

R201

0

3.3k

R2019

3.3k

100

R20

55

R20

52

100

+Vm

em

100

R2044

12k

R200

2

22

0

R2

003

15k

R2006

PH

236

9

180

kR

2008

C20

04

100

nF

TR

200

C2

007

10

0nF

1uF

10

0nF

C2006

C20

27

50V

C20

26

J211

100n

F

10

kR

205

9

BC

548

1k

R20

49

BC

548

TR

205

TR

206

16V

C202

21

0uF

10

0

R2

080

10k

R20

01

10

R2063

11A

v1

10

Sta

t_A

v2

1T

pwm

GTV

10k

R2

060

21

20Led

N

Vol

_L

2

Key

B3

19

18

Key

B2

17

Key

B1

16

Key

B0

15

Bnc

1/S

w1

14

Bnc

0/S

w0

13

Vss

M+T

12

Av2

30R

mc/

P14

Vol

_R

3

29A

le/P

rog

N

Vpp

/Ean

28

Vcs

/PsE

n27

Iref

2625B

lack

24C

vbs1

Cvb

s02322

Vss

A

On

_O

ff

Xgnd

40

Mu

te4

Vdd

T39 38

VddA

37V

sync

Hsy

nc

36

Fb

l35 34

R G33 32

B

RG

BR

ef/R

efH

3150S

DA

Fea

t05

SC

L49 48

SD

A1

47In

t0/P

12

46S

CL1

Serv

ice

45

Vd

dM44 43

Re

set

X1

42 41X

2

IC20

1

Sta

t_A

v198

Com

b

7S

ys

Fea

t16

52D

KL1

51M

L

KE

Y2

KE

Y1

KE

Y0

GN

D

+5

GN

DR

c5N

KE

Y3

+Vst

b

Loca

l key

boar

d pa

nel

Rc5

N

LedN

On-

Off

P20

1

9 8 7 6 5 4 3 2 1 P20

0

R2

005

2.2k

S2

00

P202

Stb

yR

2004

10

0

15k

22uF

C200

0

10V

D200 L

ED

-3G

R200

7

47

0

R20

11

P-

S2

01

S204

S2

02

Sto

reP

+

Ctrl-

S2

05

S2

03

Ctr

l+M

enu

R20

12 1k

LED

-3R

S2

06

LE

D-3

G

D20

1

BC

548

TR

201

LE

D-3

G

D2

04

D2

03

470

R20

23

LE

D-3

G

D2

02

R20

29

470

R20

15

470


APPENDIX 4 Tuner diagram

Tun

Agc

Bnd

1

IfGnd

IF

Vtu

n

Bnd

0

SD

A

SC

L

R30

17 82k

33k

R30

14 I2 C

4.7

kR

3016

IF_B

US

BC

548

TR

301

R30

07

220

VS

T

FO

R F

RA

NC

E O

nly

Mai

n

Mic

ro

Mai

n

Mid

(AC

-off)

Lo

Bnd

1

[ UV1315 VST ]

1 11B

nd0

For

VS

T o

nly

00

010

Hi

For

PLL

onl

y

R30

01=

0E E

lse

+5V

T

12k

R30

01

+8V

+8V

100n

FC

300

1

J303

1.2

uHL

300

35V

10u

FC

300

3

R3

004

220

3.3

kR

3005

47u

FC

300

0

16V

R3

002

47k

R3

012

3.3k

3.9

kR

3000

R30

0947

k

TR

302

BC

548

BC

54

8

TR

300

33k

R3

008

R30

114

7k

22k

R3

015

33k

R3

013

J30

0

35V

C30

02

+45V

+5V

TR

30

10

4.7

10u

F

47k3.

3k

R3

003

R3

006

[V+

]

7V

+[ic

]

8ic

9 +

33

V[ic

]

AG

C

10If

Gn

d

11IF

13 141

516

2V

tun

3A

dr[H

i]

4S

CL

[Mid

]

5 S

DA

[Lo]

6

TN300 UV1316

1

J301

J302

BA

T8

5

D3

00

+5V

60




APPENDIX 5 Peri interface cinch diagram

AV2

BluAv1

Lin

VinExtGnd

Av2VoutSw+8VCinExtGndYinExt

Vin

Ext

Lout

YoutLine

Gnd

Sta

t

Peri-1

Sta

tAv1

Gre

Av1

Blu

Av1

Fbl

Av1

Gnd

RoutMinExt(CoutLine)

Vo

utF

e

Gnd

AV-2

Av1

+8V

Cin

Ext

Gnd

Yin

Ext

Sta

tAv2

Re

dA

v1

AV-1

Vo

utS

w

VoutFeSta

t

Peri-1

RedAv1GreAv1

Av1

Av2

Gnd

Yo

utL

ine

FblAv1Gnd

inE

xt(C

outL

ine)

Rou

tLo

utR

inLinPeri-2

Source

Rin

Peri-2

1

AV1

StatAv2StatAv1

0

Av1

F502

F500

SPARK_GAP

F504

F501

C510

2.2uF

C402120pF

2.2uFC506

F507

C403120pF

R402 100

R40175

R400

100

F510

R506

100

C502

220uF6.3V

C1

11

07

8 Y

3P_1

5_V

TC

_TY

PE

_3S

LEF

TV

IDE

OS

VH

SR

IGH

T

P400

J501

InR

3

4

InR

1

5

Mut

e

6

Vee

78

Vss

9

S1

J500

InR

0

1

S0

10

InL3

11

InL0

12

Out

L

13

InL1

14

InL2

15

Vd

d

16

InR

2

2O

utR

3

HEF4052 IC500

C512

1nF

C50510uF16V

2.2uFC504

100

100kR505

R507

C513

1nF

C511

2.2uF

3P_1

4_V

T_T

YP

E_0

SV

IDE

OR

IGH

T

P502

R500

100

R5011k

1101112 23456789

P503

R407

1k

R5031k

R504100kR502

75

P8

Y

P500

C

P1

0P

7

R508

75

RIG

HT

SV

HS

3P_1

5_V

TC

_T

YP

E_3

SLE

FT

VID

EO

P401

1

101112

23456789

110

1112

23

45

67

89

P402

C4041nFR408

1k

R509

1k

R510

1k

R511

10k

75R517

1k

R516

47k

R515

75

R518

1k

R405

75

R404

F506

6789

P504

1101112 2345

TR500

BC548

C401120pF

C400100pF

F505

R514

100

R513

100k100k

R512

NFR25

R5194.7

C503120pF

120pFC501

100R403

R406

100

F402

F404

F405

F400

C508

1nF

C507

1nF

C509120pF

F401

F503

J603

100pF

C500

F403

F511

F408

F406

F407

F508

F509

R-in

L-in

CinExt

YinExt

Vref

+8VP

StatAv2A

v1

Vin

Ext

Cin

Ext

Yin

Ext

Sta

tAv2

+8VP

Vref+8VP

L-in +8VP

R-in

Av1

Vref

VinExt



61


APPENDIX 6 Peri interface Scart diagram

F600

SPARK_GAP

You

tLin

e

Min

Ext

(Cou

tLin

e)R

uot

Lout

Vou

tSw

Connect Both for Mono sound panel

AV-1

Front-end

AV2 Source

AV2/AV2S

Not Used

Peri-1

AV1

Gnd

Gnd

F601

F603

F609

SPARK_GAP

F605

Cin

Ext

F608

F607

Peri-2

F610

F604

F602

F606

Av1

0

1

AV-2

Sta

t

Red

Av1

Gre

Av1

Blu

Av1

Fbl

Av1

Yin

Ext

Sta

tAv2

Sta

tAv1

Vin

Ext

Vou

tFe

RinLin

Av1

Av2

0

1

0

0

1

1

Left

+8V

Gnd

Gnd

Peri-Audio

Richt

10uF16V

C618

Y

3P_1

5_V

TC

_T

YP

E_3

S

SV

HS

RIG

HT

LEF

TV

IDE

O

P601

C

L600

10k

R604

1uH

22k

R613

5.6k

R609

47k

R645

SPARK_GAP

F611

33kR608

J602

330R601

D600

R620

10k

BAT85

D602

BAT85

R710

C704

16V

47uF

47

47uF16V

C609

C605120pF

J601

J600

R62575

C616100pF

2.2uFC621

100

R629

C607

16V47uF

TR600

R610

1k

R614

BC548

1k

R607

1kD601

BAT85

75R615

BAT85

D603

TR605

BC548

1kR709

R61810k

100R624

75R605

C612120pF

120pFC608

R638

C6202.2uF

1k

R600 1k

R603 330

P6041101112 23456789

9

13

14

15

16

17

18

19

2

20

21

3

4

5

6

7

8

4.7R644

P600

1

10

11

12

R639

R640

47k

NFR25

10k

75R611

F615

120pFC619

R602 1k

1101112 23456789P603

75R623

C615

6.3V220uF

1nF

C604

P602

12

3

1nF

C603

1nF

C601

1nF

C602

100kR628

C622

1nF 1nF

C623

C6142.2uF

R643

10k

BC548TR604

2.2uFC613 R626

1kR632

1k

F613

R63675

F614

100

R635

R637

1k

C617F612

SPARK_GAP120pF

100

R634

R641

100k

Vss

8

S1

9

75R633

12

InL0

13

Out

L

14

InL1

15

InL2

16

Vdd

2

InR

2

3

Out

R

4

InR

3

5

InR

1

6

Mut

e

7

Vee

IC600HEF4052

1

InR

0

10

S0

11

InL3

100k

R631

100

R612

BC548TR602

C610120pF

C611BC548TR601

R6172.2kR619

10pF

100pFC600

1k

R621

10k

100k

R642

47uF16V

C606

100kR627

100k

R630

2.2uF

C625

2.2uF

C624

F619

47

R606

100

R616

R622 75

F616

F617

F618

BC548TR603

+8V0

Vout-Fe

Cin

-Ext

Av-1

+8V0

Vin-Ext

Rin_Av1

Lout

Rout

RedAv1

GreAv1

BluAv1

Av-1

+8V0

FblAv1

+8V0

Stat-Av1

+8V0

Vref1

+8V0

Rin_Av1Lin_Av1

+8V0

Vref1

Lin

RinVref1

Cin-Ext

Yin-Ext

Stat-Av2

Av-

1

Vin

-Ext

Vou

t-F

e

Av-

2

Yin

-Ext

Sta

t-A

v2S

tat-

Av1

Red

Av1

Lout

Rin

Lin

Gre

Av1

Blu

Av1

Fbl

Av1

Rou

t

+8V0

RoutLout

Vref1

Av-2

+8V0

Lin_Av1

62




APPENDIX 7 Audio amplifier diagram

n.c.

Rin

Lin

Gnd

Ce

nte

r

Left

Ou

tpu

t

Mon

o /

Su

bW

So

und1

Mai

n/M

icro

Mai

n

Mic

roM

ain

/Mic

ro

If Gnd

+8

V

n.c.

SC

L

SD

A

Gnd

Ro

ut

Lou

t

Su

rrS

ub

Rm

ain

Lmai

n

Rig

ht O

utp

ut

Sou

nd2

Ma

in

Mai

nIfG

nd

ML

DK

L1

Mo

utF

e

Intc

Fe

+5

V

+1

5V

I2C

+8V

+5V

+1

5V

+1

5V

1R60

05

R6

00

74

.7k

10k

R6

00

6

R6

00

44.

7k

R6

00

34.

7k

9

IC6

01

12

34

56

78

13

OUT1+

NC

2VI(1)

3

VP

4

VI(2)

5

SGND

6

VC2

7

OUT2+

8

PGND2

9

TD

A7

056B

IF_

BU

S

+1

5V

IC6

00

TD

A7

057

AQ

VC1

11

0

OUT2-

11

OUT1-

12

PGND1

L60

2

1uH

L60

3

1uH

1231

uH

L60

4

1uH

L60

5

INT

SN

D

Co

ntr

ol

P6

04

C6

00

5

100

nF

P6

02

123

C6

012

10

0n

F

C6

000

1nF

C60

01

1nF

C6

008

1nF

C60

09

1nF

C6

01

0

47

0n

F

47

0n

F

C6

006

470

nF

C6

00

7

22

0uF

C6

00

4

220

uF

C6

01

1

1

1011

12 23456789

R60

00

1

11

12 23456789 P

603

AU

DIO

PE

R-A

UD

P6

00

1

10

2 3

J60

0

1nF

P6

01

1

L60

1

C60

02

1nF

C60

03

1uH

L60

0

1uH

R6

00

2

10

k

SC

L

SD

A

Vo

l_L

Vol

_R

Rm

ain

Lmai

n

Rm

ain

Lm

ain

Mo

ut

Lou

t

Rin

Lin

Rou

t

R6

001

10k

ML

Intc

FeDK

L1

Mou

tFe

IFIfGn

d



63


APPENDIX 8 AM Audio diagram.S

ound

-1

SD

A

Lin

Mou

tFe

+5V

Cen

ter

DK

L1M

ode

Sur

rSub

Rm

ain

Lmai

n

0 1

Sou

nd-2

IfGnd

Gnd

+8VM

L

DK

L1

Rou

t

AM

in

Mou

tFe2

< 0.

8V

ML

SC

L

Gnd

Lout

Rin

Gnd

Intc

Fe

n.c. If

+15

V

> 1.

5V

Sou

rce

L1 L

n.c.

C30

5

63V

2.2u

F

330

R3

05

47

k

R30

8

330

R30

7

+8V

C3

00 4

.7uF

16V

R3

06

47k

16V4.7

uF

47

R30

2

C3

01

IFG

ND

R3

04

47k

122 3 4 5 6 7 8 9 7 8 9

+8V

P30

0 1 10 11

P30

1 1 10 11 122 3 4 5 6

C3

04

220

nF

22

0nF

C3

06

C30

322

nF

5 6A

Mou

t

AM

in7

AF

ou

t8

9E

xtin

50

V1

0uF

C3

02

Sw

itch

10

Vp2

11

12

Mu

te

Gn

d1

3

Vp1

14

N.c

15

IFin

16

N.c

2

Cag

c3

Cre

f4

N.c

TDA9830

IC30

0

IFin

1

D3

00

BA

482

+8V

BC

54

8T

R3

01

BA

482

D3

01

TR

300

BC

548

R30

14.

7k

4.7

k

R3

00

4.7

k

R3

03

FL

300

OF

W_L

945

3

1 2

3

4 5

IFG

ND

IFG

ND

Mou

tFe2

ML

If

DK

L1

IfML

DK

L1

Mou

tFe2

64




APPENDIX 9 NICAM Audio diagram

Lmain

SDA

Gnd

SCL

Lout

Rin

Lin

Sound-1

If

Rout

+8V

ML

DKL1

MoutFe

+5V

Center

Rmain

IfGnd

Gnd

IntcFe

n.c.

n.c.

+15V

I/O Port

Gnd

SurrSub

Sound-2

3

SFSH5.85MDB1

FL1001

2

47uFC100

25V

R117100

23

45

67

89

P102

110

1112

+5V

C13418pF

J100

L1006.8uH

C13547uF25V

2.2

R119

C137

100nF

470nF

C118

C123

25V47uF

C122330nF

4.7nFC121470nF

C119

10uF16V

C133

100nFC138

C136390pF

220pF

C131

R112

3.3M

2.2

R111

R113

10k

330

R109 C12022nF

R11022k

C104470nF

R1081M

BC548

TR100

1.8k

R114

R116

1k

47nFC130

C124470nF

X1008.192MHz

C1074.7nF

C106

470nF

16V10uF

C114100pF

C132

100nFC112

3.9k

R101

R10015k

R106

2.2

C103470nF

100nFC102

C128

100nF

D100

BAW62

C12910uF16V

100nF

1uF50V

C127

C126100nF

C125

C13910uF16V

R107

330

ResetN

48DataOut

49SCL

VrcA5

50SDA

AdSel51

52Port2

ExtR6

FmR7

8OpR

n.c.9

37

38TestN

39ClkLpf

VssA4

40Xtal

41Osc

VssX42

43DataIn

44VssD

45Pclk

46VddD

47

MixRef28

29Dqpsk

VddA3

30Coff

31Ceye

32PkDet

Vroff33

34Iref

35Vrcf

36VddF2

VssF2

18PorM

PorA19

DOBM2

20RemVe

RemO21

22Seye

Soff23

24VssF1

25Vclk

VddF126 27

Vcont

IC100

MuteN1

10n.c.

11VroA

12VssDac

13n.c.

n.c.14

OpL15

16FmL

17ExtL

SA

A72

83Z

P

C113

25V47uF

D101

BB119

C116100pF

C105470nF

C101100nF

P101

110

111

22

34

56

78

9

1

2

3

4

5

P100

100

R104

R102

10

R105

680k

R103

100

R11533k

63V4.7uF

R118

560

C108

100nF

C109

MoutFe

+5V

MoutFe

SDA

SCL

+5V

+5V

+5V

+5V

IntcFe

Loutline

Routline

Loutline

Routline

SDA

SCL

MoutFe

IntcFe



65


APPENDIX 10 BTSC Audio diagram

n.c.

+15V

SDA

MoutFe

ML

SCL

Rmain

Lmain

Sound-2

Sound-1

DKL1

Rout

Rin

Center

SurrSub

IfGnd

If

+8V

Gnd

+5V

Lout

Gnd

Gnd

n.c.

IntcFe

Lin

C22

5

4.7u

F

P202

110

11

122

34

56

78

9

220u

F

C2

35

220nF

C2

33

C236

100n

F

C21

65.

6nF

C234

10uF

C2

142

.2u

F

C2

13

150

nF

+15V

33n

FC

215

1uF

C206

C212

2.2

uF

C20

9

100

uF

C2

11

8.2

nF

49

5

50

51

52

67

89

4

40

41

42

43

44

45

46

47

48

3

30

31

32

33

3435

3637

3839

22

02

12

22

32

42

52

6

27

28

29

10

11

12

13

14

1516

1718

19

TD

A9

855

/52

IC20

0

1

10uF

C204

C20

7

10uF

+15V

C222

100u

F

C223

10u

F

2.2k

R21

0

C221

10uF

100

R2

06

39

R20

5

R20

81k

33nF

C22

0

C2

182

.2uF

150n

F

C2

32C

231

8.2

nF

C230

150n

F

47nF

C2

01

R20

220

k

R20

3

100

R20

02.

2k

47uF

C237

C21

95.

6nF

C2

17470

nF

R2

011

60

R20

920

k

R2

072.2

k

TR

200

BC

635

FL20

0C

SB

503

F58

1 2

C205

1uF

4.7

uF

C202

4.7u

F

C22

7

15n

F

C229

2.2

uF

C22

4C

228

15n

F

2.2

uF

C20

84

.7uF

C210

C2

03

100n

F

Z20

0

9.1

VB

ZX

79C

C226

2.2

uF

C2

001

0uF

P20

11

10

11

12

23

45

67

89

P2

00

8.2

kR

204

Te

st-D

BX

Su

rr-S

ub

Rm

ain

Lm

ain

SD

A1

SC

L1

MoutFe1

Lin1 Rin1

SDA1

SCL1

Lmain

Rmain

Surr-Sub

MoutFe1

Lin1

Rin1

66




APPENDIX 11 RGB output and CRT panel diagram

Fil_

Gn

d

Fila

me

nt

Gn

d

RG

B

CR

T

Aq

uad

ag

+1

2V

R-o

ut

I-B

lack

AQ

UA

B-o

ut

G-o

ut

+1

85V

VG

2

+8

V

3456

A51E

AL165

X07

P70

1

10

F1

9F

25

G1

7G

2

2

Sparc_gap

11

kB

6kG

8kR

P702

12

EH

T

90

AQUA

100n

FC

70

1

P70

3

C70

2

2.7

nF

C700

10

uF

25

0V

P700

12345

IC7

00

1Vi1

2

Vi2

3

Vi3

4

Gnd

5

Iom

6

Vdd

7

Voc3

8

Voc2

9

Voc1

TD

A6107Q

R7

02

1.5

k

R704

1.5

k

1.5

k1

.5k

R700

R70

1

P704

47

R70

3

1.2

R705

C703

1nF

1k

R707

1k

R708

1k

R706



67


APPENDIX 12 Vertical Deflection diagram.

+15V

+45V

L801

C800522nF

WBC_2_RT

L800

WBC_2_RT

25V1000uF

C8004C8003100nF

22nFC8007

NFR25

33R8005

C800622nF

63V100uFC8002

220nFC8009

6Vfb

OutA7

Guard8

9feedb

22R8009

IC800

TD

A83

56

1Vi+

2Vi-

3Vp

4OutB

5Gnd

VDRIVE

C8008100nF

VERTDefl.

P800

1

2

3

4

5

1.2R8008

330

1.2

R8007

NFR25

R8004

1

R8006

R80033k

Idrive-

Vguard

Idrive+

68




APPENDIX 13 Power Supply diagram

GN

D_A

N1

D90

5

R90

29

NF

R25

R90

30

1 NF

R2

5

R90

215.

1k

R9

027

47k

5 Vcc

6 Iref

7 FeedBack

Stab8 Duty 9

15R90

19

C9

035

100

uF50

V

4.7

nF

5.1V

D9

15

8.2

VB

ZX

79C

1R

9026

NF

R25

GN

D_A

N1

91k

C90

1533

0nF

+15

V

115V

12k

R90

41

GN

D_A

N1

C90

1622

0uF

R90

4351

k

R9

042

18k

1k

C90

0647

uF

10k

1.2

k

R90

18

C9

031

4.7M

R90

31

680p

FC

9000

270

R90

00

2.4k

R90

17

Deg

auss

Mai

ns in

put

90 ..

240

V~

Saf

ety

+3V

/5V

For

3V

mic

ro o

nly

Cur

rent

sen

se

+3V

/5V

Vo-

adju

st

3K3

3V 2K4

For

5V

BC

548

TR

902

C90

27

470u

F50

V

C90

18

470u

F16

V

+16

V

BY

W54

D91

3

330n

FC

902

6

IC90

3

LM78

05C

T

GN

D

INO

UT

330n

FC

9025

3.9k

68k

R90

34

1kR

9036

2kR

903

7

100n

F

C90

0310

0nF

R90

35

2A

FU

SE

F90

01

2

C90

01

4.7

uHL9

06

DU

AL_

PT

C_2

4_75

0_3

K

R90

01

BY

W95

C

D90

8

D91

1

BY

W54

D90

4B

YW

54

R90

04

1k

C90

122.

2nF

3.3k

R90

23

D91

4

BY

D33

J

D90

7

BY

D33

MD

900

1N41

48IC

905

SF

H61

0A o

r C

NX

82A

An

1

Cat

2

nc3

Em

24

Col

5

Em

16

+Vst

b

+16

V

16V

C90

07

+8V

10uF

J900

+Vm

icro

+5V

16V

10uF

C90

21

BA

X18

D91

2

4.7

R90

03

C9

002

100n

F

AT

404

3_20

T90

0

12

34

1314 151617 18

23 4 568

10uH

L908

WB

C_2

.5_R

L90

4

AT

301

0_11

0LL

T90

1

10 1112

WB

C_

2.5_

RL

901

IC90

0

LM

317T

IC90

2

LM

317T

12P

901

1 2

BY

D33

D

D90

1

2.2

nFC

9011

P90

0

C90

092.

2nF

IC90

1

GN

D

INO

UT

GN

D_A

N1

BY

W54

C90

292.

2uF

LM78

08C

T

R90

063

k

+45V

D90

6

D90

2

BY

W96

B

BY

W54

D90

3

BY

W54

L905

WB

C_2

.5_R

L90

0

L90

3

WB

C_2

_RT

WB

C_2

.5_R

L907

C90

082.

2nF

WB

C_2

_RT

BD

938

TR

900

C90

30

GN

D_A

N1

D91

0

BZ

D23

C

C90

3410

0nF

3.3

k

R9

038

TR

903

BC

548

BC

548

TR

904

R90

11

150

150

R9

012

470

R90

10

R90

070.

47

NFR25

C90

1433

0nF

C90

1747

0uF

D90

9

1N41

48

BZ

X7

9C

C90

2447

0pF

D91

6

5.6V

C9

032

330

pF

10pF

470

R90

44

R90

40

3.9k

L902

12

C90

2868

0pF

35V

GN

D_A

N1

C90

0422

0pF

AT

4043

_11

C90

134

70pF

NF

R25

C90

23

470u

F

GN

D_A

N1

470p

FC

9020

1R

9016

R90

15

R90

20 15k

R9

014

R90

452.

2k

GN

D_A

N1

+15

V

C90

19

100n

F

C90

33

100

nF

1 Em2

10Cosc

11Sync

12

SlowStart

13Curr

14Vee

15Col1

16Em1

Col223 D-mag

4 Vccmin

R9

022

15

IC9

04

TD

A83

80A

4.7k

R90

33

C90

2222

uF

R90

394

.7k

180k

R90

32

R9

024

R90

281 N

FR

25

1

R90

0510C

9005

1.5n

F

R90

0812

0k

R90

02

1.8k

33

6.8

R90

09

4.7k

R90

13

220

uF

BU

T11

A

TR

901

R90

25

385

V

C90

10

Stb

y

115V

-FB

VB

- VB

-

Max-Duty

Bea

mC

urre

nt

115V

-FB



69


APPENDIX 14 Horizontal Deflection diagram

EH

T

Foc

us

G2

BS

T70

AT

R90

7

+8

V

Aq

uada

g

Fila

men

t

HO

RD

RIV

E

Fil_

GN

D

+1

2VC

RT

+1

85V

+8

V

Aqu

adag

+1

2V

Fil_

Gnd

Fila

me

nt

De

flH

OR

+1

2V c

onn

ect

100

C90

45

33n

F

C90

40

470n

F

470

nF

C90

41

R90

53

R90

541

0

C90

47

2.2u

F25

0V

1N

4148

D92

1

+1

5V

CU

15_d

river

L91

0

123 4

+8

V

1uF

BA

T85

D91

7

100

R90

46C

9036

L909

12

AT

4042

_90

C

BY

D3

3J

D91

9

TR

905

BC

548C

1N41

48

D91

8

D9

20

BA

S11

T9

02

203

2.1

1

10

11

2345 6 7

8

9

10uF

C90

44

1kR90

55

6

BU

2506

DF

+B

EA

D

TR

906

16V

P70

1

12345

330p

F

100

pFC

903

7

220k

R90

47

220

k

C90

38

CR

T-S

upp

R90

48

+8V

115V

R90

591

0k

2.2k

R90

51

6.8k

R90

58

47k

R90

49

45678

P90

2

123

R90

56

120

R90

52

1.8

k R90

57 18k

10k

R9

050

470n

FC

9042

7.5

nFC

903

9

2.2u

FC

9046

250V

47nF

C90

48

250V

1uF

C90

43

Fil_

Gnd

+12V

Aqu

adag

Fila

men

t

+18

5V

+18

5V

Hfly

bac

k

Be

amC

urre

nt

70




APPENDIX 15 EMC test results

Fig.33 Radiated immunity of GTV1000 receiver measured on SECAM-L.



71


APPENDIX 16 “Bill Of Materials” of Project: PR31602 Last Update: 1999/02/04

ITEM CNT PART_NO COMPONENT SERIES TOL. RA-TING

VENDOR GEOMETRY REFERENCE

1 1 8222-411-31602 BOARD PR31602

PS-SLE BOARD

2 1 UV1316 UV1316 UV13 PHILIPS UV1316 TN300

3 1 TSL0707-4R7M2R6

4.7uH TSL0707 20% TDK TSL0707_2.75e L906

4 1 TSL0707-100K1R9

10uH TSL0707 10% TDK TSL0707_2e L908

5 1 TPT02B TPT02B TRAP-Filter muRata SFE_3p FL104

6 1 TPS6.0MB2 TPS6.0MB2 TRAP-Filter muRata SFE_3p FL102

7 1 TOKO-7KM 150nH 7KM TOKO TOKO_7km L102

8 1 SFE6.0MBF SFE6.0MBF SIF-Filter muRata SFE_3p FL101

9 1 SFE5.5MBF SFE5.5MBF SIF-Filter muRata SFE_3p FL100

10 7 RODELCO-4972-964

SKHHAK print_switch ALPS MINI_MATRIX_h S200 S201 S202 S203 S204 S205 S206

11 1 PN-ZTK-33-B ZTK33B Misc PHILIPS DO35 Z200

12 1 PN-TDA884x TDA884x IC_Universal * SDIL56_s IC100

13 1 PN-TDA8380 TDA8380 IC_Universal * SOT38_s IC904

14 1 PN-TDA7057AQ TDA7057AQ Radio_Audio PHILIPS SOT141 IC600

15 1 PN-LM7808CT LM7808CT Stab_Pos NAT.SEMIC.

TO220_vc IC901

16 1 PN-LM7805CT LM7805CT Stab_Pos NAT.SEMIC.

TO220_vc IC903

17 1 PN-GTV GTV IC_Universal * SOT247_s IC201

18 1 PN-BU2506DF-BEAD

BU2506DF+BEAD

Pow_HV_Switch PHILIPS SOT199_BEAD_vc TR906

19 1 PN- SFH610A or CNX82

SFH610A or CNX82A

IC_Universal * SOT228 IC905

20 5 MKS4230-1-0-1212

MKS4230_12p MKS4230 STOCKO MKS4230_12p P400 P401 P500 P600 P603

21 2 MKS3739-1-0-909

MKS3730_9p MKS3730 STOCKO MKS3730_9p P200 P204

22 1 MKS3738-1-0-808

MKS3730_8p MKS3730 STOCKO MKS3730_8p P902

23 1 MKS3737-1-0-707


24 1 MKS3736-1-0-606


25 1 MKS3735-1-0-505

VERT-DEFL-COIL_5p

MKS3730 STOCKO MKS3730_5p P800

26 1 MKS3735-1-0-505


27 3 MKS3733-1-0-303

MKS3730_3p MKS3730 STOCKO MKS3730_3p P601 P602 P604

28 2 MKS3733-1-0-303

MKS3730_2p_220V

MKS3730 STOCKO MKS3730_2p_220V

P900 P901

29 2 LM317T LM317T Stab_Pos NAT.SEMIC.

TO220_vc IC900 IC902

30 1 LED-3R LED-3R Low_Cost TEXIM SOD53 D201

31 4 LED-3G LED-3G Low_Cost TEXIM SOD53 D200 D202 D203 D204

32 1 LAL03NA1R2M 1.2uH LAL03NA 10% TAIYO-YUDEN

uChoke_3e L300

33 2 LAL03NA100K 10uH LAL03NA 10% TAIYO-YUDEN

uChoke_3e L104 L105

34 1 LAL02NA4R7K 4.7uH LAL02NA 10% TAIYO-YUDEN

uChoke_2e L103

72




35 2 LAL02NA3R3K 3.3uH LAL02NA 10% TAIYO-YUDEN

uChoke_2e L100 L101

36 6 LAL02NA1ROK 1uH LAL02NA 10% TAIYO-YUDEN

uChoke_2e L600 L601 L602 L603 L604 L605

37 1 B39458-M1962-M100

OFW-G1984 SAW-Filter S+M SIP_5K FL103

38 1 AT4043-11 AT4043_11 DC05 PHILIPS AT4043_11 L902

39 1 9922-520-12Mc 12MHz Crystal PHILIPS HC49_u13 X200

40 1 9922-520-00481 4.433619Mc Crystal SARONIX HC49_u13 X100




44 1 9350-646-00112 PCF8598CP EEPROMs PHILIPS SOT97_s IC200

45 1 9350-554-00112 TDA8351_N1 Sync PHILIPS SOT131_heat._c IC800

46 1 9350-544-20112 TDA7056A Radio_Audio PHILIPS SOT110_heat._s IC601

47 1 9337-533-20153 BZD23C BZD23C PHILIPS SOD81 D910

48 1 9337-410-30113 BYD33M Rectifier PHILIPS SOD81 D900

49 2 9337-234-20113 BYD33J Rectifier PHILIPS SOD81 D907 D919

50 1 9337-234-00113 BYD33D Rectifier PHILIPS SOD81 D901

51 1 9337-105-20112 BST70A fets PHILIPS TO92 TR907

52 2 9336-247-60112 BAT85 Schottky PHILIPS SOD68 D300 D917

53 1 9335-003-90127 BUT11A Pow_HV-Switch PHILIPS TO220 TR901

54 1 9335-001-50112 BYW95C Rectifier PHILIPS SOD64 D908

55 1 9335-001-40112 BYW96B Rectifier PHILIPS SOD64 D902

56 2 9334-500-90112 PH2369 Switching PHILIPS TO92 TR110 TR200

57 3 9334-500-90112 BC548 Switching PHILIPS TO92 TR117 TR118 TR119

58 1 9334-480-50127 BD938 Pow_Low-Freq PHILIPS TO220 TR900

59 6 9333-636-10153 BYW54 Rectifier PHILIPS SOD57 D903 D904 D905 D906 D911 D913

60 1 9332-979-90153 BAS11 Gen_Purpose PHILIPS SOD27 D920

61 3 9331-987-70112 BF494 High_Freq PHILIPS TO92 TR111 TR115 TR120

62 6 9331-977-30112 BC558 Gen_Purpose PHILIPS TO92 TR105 TR107 TR109 TR202 TR203 TR204

63 1 9331-976-70112 BC548C Gen_Purpose PHILIPS TO92 TR905

64 23 9331-976-40112 BC548 Gen_Purpose PHILIPS TO92 TR100 TR101 TR102 TR103 TR104 TR106 TR108 TR112 TR113 TR114 TR116 TR121 TR201 TR205 TR206 TR207 TR208 TR300 TR301 TR302 TR902 TR903 TR904

65 1 9331-178-40153 BZX79C BZX79C PHILIPS SOD27 Z800

66 1 9331-177-70153 BZX79C BZX79C PHILIPS SOD27 D915

67 1 9331-177-30153 BZX79C BZX79C PHILIPS SOD27 D916

68 1 9331-176-80153 BZX79C BZX79C PHILIPS SOD27 Z201

69 12 9330-839-90153 1N4148 Gen_Purpose PHILIPS SOD27 D100 D101 D102 D103 D104 D105 D106 D205 D909 D914 D918 D921

70 1 9330-229-10153 BAX18 Gen_Purpose PHILIPS SOD27 D912

71 1 8228-001-20321 2032.1 Line_Output PHILIPS uS3 T902

72 4 4330-030-41051 WBC_2_RT Chokes PHILIPS WBC_2rt L800 L801 L900 L903

73 6 4330-030-38081 WBC_2.5_R Chokes PHILIPS WBC_2.5r L200 L201 L901 L904 L905 L907

74 1 3128-138-35761 CU15_driver Line_driver PHILIPS CU15 L910

75 1 3122-138-31291 AT4042_90C Fix_Corr PHILIPS FIX_LC_A L909

76 1 3112-338-32032 AT4043_20 Chokes PHILIPS CU20d3 T900

77 1 3111-268-30200 AT3010_110LL Switch_Mode PHILIPS AT3010_110LL T901

78 1 2422-034-15068 SOLDER-PIN_small

PHILIPS SOLDER_PIN-small

P100





73


79 1 2422-021-98731 JUMPER_3p print_switch PHILIPS JUMPER_3p J600

80 1 2412-086-28239 2A SLOW PHILIPS GLAS_HOLDER F900

81 1 2322-662-96116 DUAL_PTC_24_750_3K

PTC 5% 1W PHILIPS DUAL_PTC R9001

82 1 2322-482-40222 2.2k OMP10 20% 0.5W PHILIPS OMP10_h R9045

83 1 2322-329-34478 4.7 AC04 10% 4W PHILIPS AC04 R9003

84 1 2322-329-04182 1.8k AC04 5% 4W PHILIPS AC04 R9002

85 1 2322-242-13475 4.7M VR37 5% 0.5W PHILIPS VR37 R9031

86 2 2322-241-13224 220k VR25 5% 0.25W PHILIPS VR25 R9047 R9048

87 1 2322-205-13477 0.47 NFR25 5% 0.5W PHILIPS SFR25H R9007

88 6 2322-205-13108 1 NFR25 5% 0.5W PHILIPS SFR25H R8004 R9016 R9026 R9028 R9029 R9030

89 1 2322-194-13331 330 PR02 5% 2W PHILIPS PR02 R8008

90 1 2322-194-13271 270 PR02 5% 2W PHILIPS PR02 R9000

91 2 2322-194-13159 15 PR02 5% 2W PHILIPS PR02 R9019 R9022

92 2 2322-194-13108 1 PR02 5% 2W PHILIPS PR02 R6000 R6005

93 1 2322-194-13103 10k PR02 5% 2W PHILIPS PR02 R9059

94 1 2322-193-13688 6.8 PR01 5% 1W PHILIPS PR01 R9009

95 1 2322-193-13124 120k PR01 5% 1W PHILIPS PR01 R9008

96 1 2322-193-13101 100 PR01 5% 1W PHILIPS PR01 R9053

97 1 2322-186-16473 47k SFR25H 5% 0.5W PHILIPS SFR25H R9049

98 1 2322-186-16472 4.7k SFR25H 5% 0.5W PHILIPS SFR25H R9033

99 2 2322-186-16339 33 SFR25H 5% 0.5W PHILIPS SFR25H R8005 R9025

100 1 2322-186-16222 2.2k SFR25H 5% 0.5W PHILIPS SFR25H R9051


102 2 2322-186-16151 150 SFR25H 5% 0.5W PHILIPS SFR25H R9011 R9012

103 2 2322-186-16128 1.2 SFR25H 5% 0.5W PHILIPS SFR25H R8006 R8007

104 2 2322-186-16122 1.2k SFR25H 5% 0.5W PHILIPS SFR25H R1000 R9018



107 1 2322-180-73913 91k SFR16T 5% 0.5W PHILIPS SFR16T_3e R9014

108 1 2322-180-73823 82k SFR16T 5% 0.5W PHILIPS SFR16T R3017

109 1 2322-180-73822 8.2k SFR16T 5% 0.5W PHILIPS SFR16T_3e R2079

110 2 2322-180-73751 750 SFR16T 5% 0.5W PHILIPS SFR16T_3e R8000 R8001



113 1 2322-180-73682 6.8k SFR16T 5% 0.5W PHILIPS SFR16T R9058

114 1 2322-180-73681 680 SFR16T 5% 0.5W PHILIPS SFR16T_4e R1009



117 1 2322-180-73561 560 SFR16T 5% 0.5W PHILIPS SFR16T R1056





122 2 2322-180-73478 4.7 SFR16T 5% 0.5W PHILIPS SFR16T_3e R1021 R3010

123 8 2322-180-73473 47k SFR16T 5% 0.5W PHILIPS SFR16T_3e R1001 R1008 R2033 R3002 R3006 R3009 R3011 R9027


125 10 2322-180-73472 4.7k SFR16T 5% 0.5W PHILIPS SFR16T_3e R1037 R2021 R2040 R2041 R2042 R3016 R6003 R6004 R6007 R9039

126 2 2322-180-73472 4.7k SFR16T 5% 0.5W PHILIPS SFR16T R2025 R2038



74




127 6 2322-180-73471 470 SFR16T 5% 0.5W PHILIPS SFR16T_3e R2011 R2015 R2023 R2029 R9010 R9044




131 3 2322-180-73392 3.9k SFR16T 5% 0.5W PHILIPS SFR16T_3e R3000 R9037 R9040



134 2 2322-180-73333 33k SFR16T 5% 0.5W PHILIPS SFR16T_3e R3008 R3013

135 13 2322-180-73332 3.3k SFR16T 5% 0.5W PHILIPS SFR16T_3e R1011 R1032 R1035 R2018 R2019 R2024 R2028 R2032 R2036 R3003 R3005 R3012 R9023

136 3 2322-180-73332 3.3k SFR16T 5% 0.5W PHILIPS SFR16T R1004 R2010 R9038



139 2 2322-180-73331 330 SFR16T 5% 0.5W PHILIPS SFR16T R1060 R1061


141 3 2322-180-73273 27k SFR16T 5% 0.5W PHILIPS SFR16T_3e R1019 R1034 R2084






147 4 2322-180-73222 2.2k SFR16T 5% 0.5W PHILIPS SFR16T_3e R1053 R1054 R1055 R2005

148 2 2322-180-73222 2.2k SFR16T 5% 0.5W PHILIPS SFR16T R2027 R2030

149 4 2322-180-73221 220 SFR16T 5% 0.5W PHILIPS SFR16T_3e R1045 R1050 R3004 R3007









158 11 2322-180-73153 15k SFR16T 5% 0.5W PHILIPS SFR16T_3e R1030 R2007 R2016 R2020 R2035 R2056 R2068 R2069 R2070 R2071 R9020













171 19 2322-180-73103 10k SFR16T 5% 0.5W PHILIPS SFR16T_3e R1041 R1042 R1074 R1075 R1076 R1077 R1078 R1079 R2014 R2051 R2060 R2062 R2080 R2082 R2083 R2085 R6001 R6002 R9050





75


172 11 2322-180-73103 10k SFR16T 5% 0.5W PHILIPS SFR16T R1051 R1052 R1063 R1067 R1070 R1071 R1073 R2013 R2045 R2048 R2059

173 15 2322-180-73102 1k SFR16T 5% 0.5W PHILIPS SFR16T_3e R1010 R1027 R1028 R1033 R1040 R1044 R1068 R1072 R2009 R2012 R2057 R2073 R9004 R9035 R9055

174 5 2322-180-73102 1k SFR16T 5% 0.5W PHILIPS SFR16T R1002 R1005 R1012 R2000 R2049


176 33 2322-180-73101 100 SFR16T 5% 0.5W PHILIPS SFR16T_3e R1024 R1026 R1036 R1038 R1043 R1046 R1048 R2004 R2017 R2022 R2026 R2031 R2034 R2037 R2043 R2044 R2047 R2050 R2052 R2053 R2055 R2061 R2063 R2064 R2065 R2066 R2067 R2072 R2074 R2075 R2076 R2077 R2078

177 4 2322-180-73101 100 SFR16T 5% 0.5W PHILIPS SFR16T R1025 R1029 R1031 R2046

178 2 2222-655-03681 680pF C655 10% 500V PHILIPS CER2_2B C9000 C9028

179 3 2222-655-03471 470pF C655 10% 500V PHILIPS CER2_2A C9013 C9020 C9024

180 1 2222-655-03331 330pF C655 10% 500V PHILIPS CER2_1 C9038


182 6 2222-655-03102 1nF C655 10% 500V PHILIPS CER2_2B C6000 C6001 C6002 C6003 C6008 C6009


184 1 2222-638-58331 330pF C638-N750 2% 100V PHILIPS CER2_5 C9032

185 1 2222-638-10479 47pF C638-NP0 2% 100V PHILIPS CER2_2A C1006

186 6 2222-638-10279 27pF C638-NP0 2% 100V PHILIPS CER2_1 C2016 C2017 C2018 C2019 C2020 C2021

187 6 2222-638-10189 18pF C638-NP0 2% 100V PHILIPS CER2_1 C1036 C1037 C1040 C1044 C2012 C2013

188 1 2222-638-09828 8.2pF C638-NP0 0.25pF

100V PHILIPS CER2_1 C2005

189 1 2222-631-10109 10pF C631-NP0 2% 100V PHILIPS CER1_1 C9031

190 2 2222-630-03332 3.3nF C630 10% 100V PHILIPS CER2_3 C1000 C1031

191 1 2222-630-02222 2.2nF C630_1E 10% 100V PHILIPS CER1_2B C1030

192 1 2222-629-03472 4.7nF C629 20+80%


193 9 2222-629-03223 22nF C629 20+80%

63V PHILIPS CER2_4 C1005 C1012 C1019 C1034 C1038 C1039 C8005 C8006 C8007

194 1 2222-629-03222 2.2nF C629 20+80%


195 2 2222-629-03103 10nF C629 20+80%

63V PHILIPS CER2_2B C8000 C8001

196 5 2222-629-03102 1nF C629 20+80%

63V PHILIPS CER2_1 C1009 C1013 C1017 C1018 C2001

197 3 2222-378-62104 100nF MKP/MKP 378 5% 630V PHILIPS C378_C C9001 C9002 C9003

198 1 2222-376-92752 7.5nF KP/MMKP 376 5% 2000V PHILIPS C376_F C9039

199 1 2222-376-92152 1.5nF KP/MMKP 376 5% 2000V PHILIPS C376_A C9005

200 7 2222-370-21473 47nF MKT 370 10% 100V PHILIPS C370_A C1015 C1021 C1027 C1041 C1042 C1043 C9048

201 1 2222-370-21333 33nF MKT 370 10% 100V PHILIPS C370_A C9045

202 5 2222-370-11474 470nF MKT 370 10% 63V PHILIPS C370_C C6006 C6007 C6010 C9040 C9041

203 4 2222-370-11334 330nF MKT 370 10% 63V PHILIPS C370_B C9014 C9015 C9025 C9026

204 3 2222-370-11224 220nF MKT 370 10% 63V PHILIPS C370_B C1026 C1028 C8009

205 22 2222-370-11104 100nF MKT 370 10% 63V PHILIPS C370_A C1007 C1008 C1033 C2004 C2006 C2007 C2009 C2010 C2014 C2015 C2023 C2024 C2027 C2028 C3001 C6005 C6012 C8003 C8008 C9019 C9033 C9034

206 1 2222-368-45474 470nF MKT 368 10% 250V PHILIPS C368_H C9042



76




APPENDIX 17 Component layout for the NTSC-Only configuration.

See supplement document AN98051A of this report.

APPENDIX 18 Component layout for the South America configuration.


APPENDIX 19 Component layout for the Pal Multi Sandard VST configuration.


207 1 2222-336-60472 4.7nF MKP 336 20% 250V PHILIPS C336_A C9030

208 4 2222-336-60222 2.2nF MKP 336 20% 250V PHILIPS C336_A C9008 C9009 C9011 C9012

209 1 2222-136-66102 1000uF RVI136 20% 25V PHILIPS CASE_R17 C8004

210 3 2222-136-65471 470uF RVI136 20% 16V PHILIPS CASE_R15 C9017 C9018 C9023




214 1 2222-134-55479 47uF RLP5 134 20% 16V PHILIPS CASE_R55_CA C3000

215 1 2222-134-55109 10uF RLP5 134 20% 16V PHILIPS CASE_R52_CA C2022

216 1 2222-134-51478 4.7uF RLP5 134 20% 50V PHILIPS CASE_R54_CA C1016

217 2 2222-134-51109 10uF RLP5 134 20% 50V PHILIPS CASE_R55_CA C2011 C2025

218 3 2222-134-51108 1uF RLP5 134 20% 50V PHILIPS CASE_R51_CA C2008 C2026 C9036

219 9 2222-134-50109 10uF RLP5 134 20% 35V PHILIPS CASE_R54_CA C1002 C1003 C1010 C1014 C1029 C2002 C2003 C3002 C3003

220 4 2222-134-35109 10uF RLP5 134 20% 16V PHILIPS CASE_R52_TFA C1032 C9007 C9021 C9044

221 4 2222-097-58228 2.2uF RLP7 097 20% 63V PHILIPS CASE_R71_m C1001 C1004 C1011 C1024

222 1 2222-097-58108 1uF RLP7 097 20% 63V PHILIPS CASE_R71_m C1023

223 2 2222-097-55101 100uF RLP7 097 20% 16V PHILIPS CASE_R74_m C1020 C1035

224 1 2222-057-58221 220uF PSM-SI 057 20% 385V PHILIPS CASE_30x40 C9010

225 1 2222-044-90502 1uF RSH 044 20% 250V PHILIPS CASE_R13 C9043

226 1 2222-044-90479 47uF RSH 044 20% 160V PHILIPS CASE_R19 C9006

227 2 2222-044-90016 2.2uF RSH 044 20% 250V PHILIPS CASE_R13 C9046 C9047

228 1 2222-037-68101 100uF RSM 037 20% 63V PHILIPS CASE_R14 C8002

229 1 2222-037-58229 22uF RSM 037 20% 63V PHILIPS CASE_R12_m C9022

230 1 2222-037-58228 2.2uF RSM 037 20% 63V PHILIPS CASE_R11_m C9029

231 2 2222-037-56221 220uF RSM 037 20% 25V PHILIPS CASE_R13_m C6004 C6011

232 1 2222-030-34229 22uF AS 030 -10/+50%

10V PHILIPS CASE_A2 C2000

233 1 05-88-1736 ARRAY_BUS-H_1x5p

SINGLE_ARRAY_BU

DISPLAY ARRAY_BUS_H_1x5p

P202



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