Multiple Kernels for multiple cores: The Barrelfish Mehroze Kamal, Amara Nawaz, Alina Batool, Fizza Saleem, Arfa Jillani

Department of computer science, University of Agriculture Faisalabad, Pakistan

Abstract As the number of cores increased and present diversity and heterogeneous architecture tradeoffs such as memory hierarchies, interconnects, instruction sets and variants, and IO configurations. This diverse and heterogeneous architecture challenges to operating system designers. It became complex task for the operating system to manage the diverse and heterogeneous cores with composite memory hierarchies, interconnects, instruction set, and IO configurations. The new Barrelfish Multikernel operating system try to solve these issues, treated the machine as a network of independent cores using idea from distributed system. Communication in processes in Barrelfish is handling by massage passing. In this paper we discuss the advantages to use Multikernel operating system over single kernel operating system. We appreciate Barrelfish operating system as the number of cores is increased further.

Introduction:

The changes in computer hardware are more recurrent than the software: optimization becomes essential after a few years as new hardware arrives. The working of programmers over and above the code of program is becoming more complex as the multicore becomes more popular ranging from personal computers to the data centers. Furthermore, these optimizations involves deep hardware constraint understanding such as multicore

processors, random access memory, levels of cache memory and these are probably not yet applicable to the potential generations of identical architectural sophisticated technologies. This difficulty affects the users before it attracts the developers concentration.

Kernel, the main part of operating system, which loads foremost in the memory, is the interphase connecting computer and rest of the operating system. A specific locale of memory is allocated for kernel code for fortification. The main functionalities of kernel are process management, disk management, system call management, synchronization, I/O device management; interrupt handling, management of system resources etc.

Multi-core processor, the solo computing component to which multiple processors have been attached for enhanced performance, reduced power consumption, and more efficient simultaneous processing of multiple tasks. As the number of cores increases the functioning of kernel becomes complicated but also the improved processor performance.

The symmetric multiprocessors are about to end because of the physical limitations, individual cores cannot be made any faster and adding cores may be not a right option. Operating systems are going to revolutionize to a specialized hardware consisting of asymmetric processors and heterogeneous systems. Consequently, if an application's performance is to be

improved, then it ought to be considered to work over a wide range of hardware parallelism. The performance should meet the user's expectations with the help of additional resources. It is also possible to imagine in some situations where the additional cores left idle.

The increase in the number of kernel in proportion to the number of cores gives us dual benefits as proposed in the Barrelfish Operating System. Barrelfish the Multikernel is a new way of building operating systems that treats the inside of a machine as a distributed networked system, consisting of one kernel per core despite the fact that rest of the operating system is structured as a distributed system of single-core processes atop these kernels. Kernels share no memory but the rest of the operating system use shared memory for transferring messages and data between cores and booting other cores whereas the applications can make use of multiple cores and share address spaces between cores and are self-paging that they construct their own virtual address space. Barrelfish provides a consistent interface for passing messages in which they have to establish a channel. A special process named monitor is responsible for distributed coordination between cores having communication to each other. It does not offer any local/native file system.

In Barrelfish, the kernels communicate nevertheless with each other excluding each one of them monitor creates connections to other monitors in the system and provides the basic functionality for applications to create connections to local and remote applications, drivers and other services. The locking service provides mutual exclusion and synchronization. It

provides the feature of System Knowledge Base, which is used to store, and compute on a diversity of data concerning the current running state of the system. Device drivers are implemented as individual dispatchers or domains providing interrupt capabilities, I/O capabilities and the communication end point capabilities. Barrelfish provides economic performance on contemporary. Repeating data arrangements can improve system scalability by reducing load on the system interconnect, contention for memory, and overhead for synchronization. Bringing data closer to the cores that process it will consequence in lowered access latencies. The kernel performs a significant part in keeping the security measures. When we approach Multikernel, the exertion of hackers become challenging. If one kernel is hacked/failed at that moment other kernel accomplishes its tasks and maintains the reliability of the system. The kernel performs multiple tasks if multiple kernels share the workload then the computational speed will be improved. Multikernel communicate with each other via message passing mode which is cost effective than shared memory. If any of the core stops functioning, fails or deadlock occurs then the multi kernel maintenances its corresponding core and makes its ready to work again. The main work of kernel is to monitor entire system, in case, Multikernel performs better monitoring because very kernel monitors the entire system individually by checking and maintaining the memory management task periodically. Here we introduce the advantages of Multikernel model.

Barrelfish ETH Zurich developed a new operating system called Barrelfish, as a Multikernel

architecture. The purpose of design Barrelfish is to cope with recent and future hardware trends. As the number of cores per chip increases and that they will become heterogeneous. Heterogeneous means that all cores may not use the same instruction set, the memory access latency is not constant and that the caches do not need to be coherent and accessible by all cores. The structure of Barrelfish is shown in figure

Fig 2 Barrelfish operating system structure on a four core ARMv7-A system.

Every core in Barrelfish runs its own copy of kernel called CPU diver and they do not share any state. The CPU driver is responsible for scheduling, protection and fast message passing between domains on the same core. Device drivers, networking stack and file systems are implementing in user space. Also each core runs the monitor process in user space. As a group, they are part of the reliable computing base and coordinate system-wide state using message passing. In Barrelfish processes are called application domains or just domains. CPU driver and the monitor use message passing for communication. For each core there exists an object called dispatcher, which is the entity the local CPU driver schedules.

Communication Lauer and Needham argued that that there is no semantic difference between shared memory data structure and use of massage passing in an operating system, they argued

that they are dual and choosing one method over the other is depend on the machine architecture on which the operating system is built[1]. For example, the system architecture that provides primitives for queues massages then the massage-passing operating system might be easier to implement and better performance. The other system that provides fast mutual exclusion for shared-memory data access then a shared memory operating system might perform better. In the Barrelfish architecture the communication process is mostly perform by massage passing. Inter Dispatcher Communication Kernel include the dispatcher to allocate the central processor, to determine the cause of an interrupt and initiate its processing and some provision for communication among the various system and the user task currently active in the system. Dispatcher implements the form of scheduler motivation, allowing the kernel to forward event processing to up call handlers in user space Barrelfish has the concept of dispatchers, every kernel application. This technique is used to handle page faults in user space and forward hardware interrupts from the CPU driver to user level drivers. Dispatchers are scheduled by the kernel and can be combined into a user application to group related dispatchers running on different cores. Dispatcher is the unit of kernel scheduling and management of its thread. The kernel controlled the scheduling of dispatchers by up calls. The communication between the dispatchers (inter dispatcher communication) performed by different channels. In Barrelfish for X86 hardware the communication between the dispatcher is performed by LMP (local message passing) and UMP (inter-core user-level message

passing). The LMP is used when the communication is take place between the dispatchers on the same core while the UMP is used for the communication between the dispatcher on different cores. In the LMP the massage payload is directly store on the CPUs registers and in the UMP the massage payload stored in the memory. The receiver polls the memory to receive the message. To keep the stream of traffic as low as probable, the payload size matches a cache line size.

Inter-core communication Barrelfish uses explicit rather than implicit method for sharing of data structures. In implicit method Implicit sharing means the access of the identical memory region from diverse processes. Explicit sharing means replicated copies of the structures and coordinating them using messages. In the Barrelfish all communication between the cores occurred via explicit massaging. There is no shared memory for the code running on different cores except that is requiring for massage passing. The massage passing technique to access or update state rapidly become efficient and increase the performance as the number of cache lines modified grows. Explicit communication consents the operating system to service optimizations from the networking field, for example pipelining and batching. In the Pipelining there have been multiple unresolved requirements at one time that can be handled asynchronously by a service and naturally improving throughput. In the Batching a number of requests can be sent within one message or processing a number of messages collected and improving the throughput. Massage passing communication enable the operating system to handle heterogeneous cores bitterly and to provide remoteness and resource management on heterogeneous

cores. It also schedule jobs efficiently on haphazard inter-core topologies by employing tasks with reference to communication designs and network properties. Furthermore, message passing is a natural way to handle heterogeneous cores that are not cache-coherent, or do not even share memory. Message passing tolerates communication to be asynchronous. This means the process to send the request continue with the expectation that a reply will arrive at some time. Asynchronous communication allows cores to do other useful work or sleep to save power, while waiting for the reply to a particular request. An example is remote cache invalidation: completing the invalidation is not usually required for accuracy and might be done asynchronously, instead of waiting for the process to finish than to complete it with the smallest latency [2]. Finally, a system using explicit communication is more amenable for analysis (by humans or automatically). The explicit massage passing structure is naturally modular and forces the developer for use of well define interface because the communication between the components take place through well define interfaces. Consequently it can be evolved and refined more easily [3] and made robust to faults [4].

Messages cost less than shared memory In the Barrelfish communication process is mostly done with the passage passing. There are two techniques of communication shared memory and massage passing. Needham argued that that there is no semantic difference between shared memory data structure and

use of massage passing in an operating system, they argued that they are dual and choosing one method over the other is depend on the machine architecture on which the operating system is built[1]. The shared memory system considers best fit for the PC hardware for better performance and good software engineering but now this thinking is change. By an experiment we see that the cost of updating the data structure using massage passing is less than shared memory.

Figure 2 Comparison of the cost of updating shared state using shared memory and message passing on the 24-core Intel system.

In the experiment on the 24-core Intel machine we are plotting latency versus the number of contented cache lines. The curves labeled 2-8 cores, shared show the latency per operation (in cycles) for updates. The costs mature almost linearly with the number of cores and the number of changed cache lines. A single core can perform the update operation in the specific cycles, if the number of cores is increased then the same data is modify by using extra cycles. . All of these extra cycles are spent with the core delayed on cache miscues and therefore incapable to do convenient work although waiting for an update to occur. In massage passing method the client server issue a lightweight

RPC (remote procedure calls) to a single server core that performs the update operation on their behalf. The curve labeled 2-8 cores, massage show the cost of this synchronous RPC to the dedicated server core. The cost slightly varies with the number of changed cache lines. For updates of four or more cache lines, the RPC latency is lower than shared memory access, Furthermore, with an asynchronous or pipelined RPC operation, the client processors can avoid time-wasting on cache miscues and are free to perform other useful operations. For massage passing to a single server and for the shared memory the experiment is executed once for 2 and once for all 8 cores of the architecture. We see that when resisting for a increasing number of cache lines among a number of cores, RPC increasingly provide better performance than a shared memory method. . When all 8 cores resist, the result is practically immediate. When only 2 cores resist, we need to access at least 12 cache lines concurrently before observing the effect [5]. Hence using the massage passing method over the shared memory is the advantage of Barrelfish.

Reliability Barrelfish is a new operating system that provides a network of kernels as a distributed system, kernel is an important and very secure part of the operating system also called the core of operating system. the main functions of kernel are memory management, device management, CPU scheduling etc. in case of single kernel frailer of kernel break down the whole system or in case of hacking the hacker attack on the kernel to hake the whole system. Barrelfish provide reliability

because the failure of any one CPU driver will not affect the availability of the CPU driver and the other CPU driver may be able to continue the operation. It is the challenge for the hacker to hack the multi kernel which increases the reliability of the system. Barrelfish provides the reliability in term of device driver. The device driver is software that tells the operating system how to communicate with a device. In Barrelfish the device drivers are responsible for controlling the devices like the other operating system. This new distributed system offerings many interesting challenges for driver developers as well as to the operating system in terms of efficient, reliable and optimized resource usage. A system with network like interconnect the cost of accessing a device and memory depends upon the core on which the driver is running on which core the driver is running. For better resource usage and performance it is desirable to do a topology aware resource allocation for the drivers. Drivers that run on cores have direct access to device and associated data buffers in memory may probable to perform well in such systems. Device drivers are run in their own separate execution domain as user level processes in Barrelfish, Therefore a buggy driver cannot crash down whole operating system which increases the reliability of device driver [6].

Monitor: Each core runs a particular process called monitor which is responsible for distributed synchronization between cores. Monitors are single core, userspace processes and schedulable. They maintain a network of communication network channels among themselves; any monitor can talk to and identify other monitor, all dispatchers on a

core have a local message passing channel to their monitor. Hence they are well suited to multi kernel model in the split phase, message oriented, inter core communication in particular management queue of messages and long running remote operations monitors are trusted and they are in charge for transferring capabilities between cores. Monitor passes kernel capability which allows influence their local cores capability database. Monitors are responsible for inter process communication setup, and for waking up blocked local processes in response to messages from other cores it can, furthermore, idle the cores itself when no other processes on the core are running. Cores sleep is performed either by waiting for inter processor interrupt core where supported the use of monitor instruction. When it puts the core to sleep the purpose is to save power in order to optimize the functionality. Monitors route inter core connect request for communication channel between domains which have no previously communicated directly. They send capabilities together with channels also help with domain startup by supplying dispatchers with useful initial capabilities. They perform distributed capability revocation. Monitor contains a distributed implementation of the functionality establish in lower level of monolithic kernel. It results in lower performance because it is built in user space process as many operations which could be a single system call on a UNIX required two full context switches to and from the monitor on Barrelfish. However running the monitor as a user space process means it can be time sliced along with other processes, can block when waiting for input output, can be implemented via threads and provides a

useful degree of fault isolation.

Device-Drivers Device Drivers are extensions which are added provide incredibly simple and extensible way to interface with disks. The overhead is adequate enough in tradeoff simplicity and modularity. The separation of interface definition for ATA from implementation of command dispatching to the device permit simple accumulation of further ATA transports such as PATA/SATA for the storage controllers. The AHCI driver, as Intel is used, demonstrates the tradeoff when dealing with DMA. If a domain is permitted full control over the configuration of DMA aspects, it can achieve full read/write access to physical memory. To decrease this problem the management service would have to check and validate any memory regions supplied before allowing a command to execute. If only trusted domains are allowed to connect to the AHCI driver, these checks are not necessary this is a suitable assumption, as files systems and block device-like searches are the only ones that should be permitted raw access to disks because of this feature the security level of Barrelfish becomes higher then other operating systems. The Performance of Barrelfish in the same order as seen on Linux for large block sizes and random accesses. There is some restricted access during read operations that could relate either to interrupt dispatching or memory coping performance to achieve high throughput on sequential workloads with small block sizes, a prefetcher, can speed up booting, of some nature is indispensable. We can utilize cache that stores pages large chunks of data a read operation than have to read multiple of cache size if the data is not present in

cache. If data is cached, the request can be completed much faster without needing to consult the disk. The performance turns out to be much higher in this case when the data is much smaller and easier to access.

Capabilities: It controls the Access to the entire physical method. Kernel objects communication end points and other miscellaneous access rights. It is similar to sel4 with large type of system and extensions for distributed capability management connecting cores. Kernel objects are also called partitioned capabilities. Actual capability can simply be intended for accessed and manipulated via kernel. User level can only manipulate capabilities using kernel system calls. A dispatcher has access to the capability reference solitary. The sort of system for capabilities is defined by means of a domain specific language called hamlet. It can avoid data reproduction as much as possible if it cant avoid, then it try to push it into user space/ user core. It has the capability to batch the notifications. It ought to work with more than two domains. It must zero copy capability (scatter- gather packet sending and receiving). It should diminish the data copy as much as possible. It should take advantage of the information that complete data. Isolation is not at all times needed. Above two separate domains should be able to share the data with no copying. Number of explicit notifications required should be low. It should work in single producer single consumer and single producer, multi consumer. Shared pool is the region where producer will produce the data and consumer will interpret it from. A meta-slot structure is private to producer and used to supervise the slots within shared-pool. Consumer consists of

consumer queue, data structure which allows sharing of slots between producer and consumer. Only read-only memory has access to shared-pools.

Memory Server It is responsible for allocation RAM capabilities domain. The utilization of capabilities allows this to delicate management of associate regions of other servers. Reasons for its aspiration allocate core to include their own memory allocation, greatly improving parallelism and scalability of system. It can also steal memory from other cores if they turn out to be short and allow diverse allocators for different types of memory such as different NUMA, the multiprocessing design, nodes for low memory available to legacy DMA devices. As the memory servers allows core to have their own memory allocation therefore each core can have equal privileges and have equal memory size. If there is modification in some core it will not influence data of other cores that consequences in increase in scalability. If the allocated memory of one core turn out to be short then instead of waiting for other running apps to free the memory it occupies memory of other core.

CPU Drivers CPU drivers can perform specialized purposes, are single threaded and non-preemptive at that time the interrupts be disabled also share no state with other cores, as well their execution time is bounded. CPU drivers are conscientious in favor of scheduling of different user-space dispatchers on local core. It controls Core-local communication of short messages between dispatchers using a modification of light weight RPC or L4 RPC. It ensures protected access to core hardware, MMU

and APIC. The CPU drivers supervise Local Access Control to kernel objects and physical memory by means of capabilities. The Barrelfish do not provide kernel threads since numerous kernels already present. As an alternative, dispatcher is provided to user space programs in abstraction of the processor. Like kernel is single threaded, non-pre-emptible, it utilizes only a single, statically allocated heap for all operations. CPU drivers also schedule dispatchers by the scheduling algorithm of round-robin (for the debugging since its behavior is simple to understand) and Rate-based (version of RBED algorithm). The Rate-based scheduler is favored as per-core scheduler which provides efficient scheduling with hard and soft real time jobs with good support for best-effort processes as well.

Forward Compatibility The code of Barrelfish is written in such a way that it does not necessitate modifying that much to run on the modern hardware machines as the Windows or Linux does in recent years. Seeing that it can run on quite a lot of hardware platforms including x86 64-bit CPUs, ARM CPUs as well as Intels single-chip cloud computer.

Optimization As if simply single threaded application can never by itself benefit from multiple cores. Nevertheless even running nothing but single threaded apps possibly will be 2 or more of them, thats when an operating system optimized for multi-core like Barrelfish can shine. In such a situation, when running a single application and no other apps running, and no other user services in the background this wouldnt accomplish much. Conversely a situation

where multiple apps are running at the same time can be improved. Even Windows 7 is rather weak when it comes to efficiently using more than 2 processors and more than 3 threads.

Efficiency A simple database of which core has right of entry presently to what memory area and what data allocated to what memory space formulate it achievable for a kernel to be converted into far more threaded itself. Multiple kernels when multi processing in large heaps means additional efficient utilization of memory space and core usage. A database like memory manager means a slighter more nimble kernel that doesnt have to maintain track of everything internally and can consequently be further liberally threaded as can other heavily threaded apps and core usage can be additional consistently distributed because of it, making it more efficient. Passing messages between cores, such as security information and other information to guarantee the operating system is running consistently, is more efficient than sharing memory.

Speed Speed improvements that typically came from faster processors with more transistors have approach close to their limit, where if the chips run any faster, they will over heat up. The Barrelfish is designed to allow applications to utilize a number of cores at the same time throughout processing.

Physical Memory The entire physical address space is revenue of capabilities is logically aligned and is the

influence of two sized area of at least a physical page in size. As capabilities can be divide into smaller parts, typed and each region supports a restricted set of operations. The memory means unrecorded RAM and device frames and the mapped input and output regions are not included. It can be retyped into additional types like Frame Memory Capabilities; can be mapped into users virtual address space, CNode Memory Capabilities which cannot be mapped as writable virtual memory as it would eliminate the security of capability system by allowing an application to forge a capability, Dispatcher Capabilities and the Page Table Memory Capabilities. For Page Table Capability, there are diverse capability types for each level of each type of MMU architecture.

Experiences and Future Work The architecture of future computers is distant on or after obvious however two trends are obvious: growing core counts and ever-increasing hardware assortment, in cooperation among cores contained by a machine and between systems with unreliable interconnect topologies and performance tradeoffs. The Barrelfish is not planned to be used as a commercial operating system, except slightly as a platform which can be used added to discover feasible potential operating system structures. It can as well acquire benefit of the numerous heterogeneous processors that take account, for example, GPUs. The code does not hold in the least necessitate to modify to run on the up to date hardware machines as others operating systems accomplish. The graphical user interface is at rest under development seeing that the researchers have written a

web server as well as some graphical and visualization applications nevertheless it wont run. Until at this moment, it is under-engineered for users and over-engineered as research project. There are numerous ideas to facilitate are hoped to see the sights. Structuring the operating system like a distributed system more intimately matches the constitution of some gradually more admired programming models. Ever-increasing system and interconnect diversity, as well as core heterogeneity, will put a stop to developers from optimizing shared memory structures at a source-code level. Sun Niagara and Intel Nehalem or AMD Opteron systems, for example, already necessitate completely diverse optimizations, and upcoming system software motivation has to become accustomed to its communication patterns and mechanisms at runtime to the compilation of hardware at hand. It gives the impression probable that future general-purpose systems resolve partial support for hardware cache coherence, or else drop it utterly in favor of a message passing model. An operating system which can take advantage of native message-passing would be the natural vigorous for such a design. There are many ideas for future work that we anticipate to discover. Structuring the operating system as a distributed system supplementary intimately matches the formation of some gradually becoming more admired programming models for datacenter applications, such as MapReduce [19] and Dryad [14], where applications are written on behalf of comprehensive machines. A distributed system within the machine may facilitate to lessen the impedance mismatch cause by the network interface the similar programming framework could then run as efficiently inside individual

machine the same as between numerous. Barrelfish is at present a moderately rigid implementation of a Multikernel, in that it not at all shares data. As we prominent, a number of machines are highly optimized in favor of fine-grained sharing among a subset of processing essentials. After that step, for Barrelfish, is to take advantage of such opportunities by partial sharing following the accessible replica-oriented interfaces. This furthermore elevates the problem of how to settle on whilst to distribute, and whether such a decision can be programmed.

RELATED WORK Even though a latest point in the operating system designs space, the Multikernel model is associated to much preceding work on both operating systems and distributed systems. In 1993 Chaves et al. [13] examined the inflections between message passing and shared data structures for an early multiprocessor, judgment of performance inflections biased towards message passing for many kernel operations. Machines with heterogeneous cores that communicate using messages have elongated survived. The Auspex [11] and IBM System/360 hardware consists of heterogeneous cores with to some extent shared memory, and obviously their operating systems resembled distributed systems in various aspects. Similarly, explicit communication has been used on large-scale multiprocessors such as the Cray T3 or IBM Blue Gene, to facilitate scalability ahead of the limits of cache-coherence. The problem of scheduling computations on multiple cores that have the same ISA but different performance exchange is being addressed by the Cypress project [9]; this

work is largely corresponding to our own. Also related is the FOS system [8] which objective scalability throughout space-sharing of resources. A large amount of effort on operating system scalability for multiprocessors to date has focused on performance optimizations that lessen sharing. Tornado and K42 [10, 7] introduced clustered objects, which optimize shared data throughout the utilization of partitioning and replication. Nevertheless, the main point, and the resources by which replicas communicate, remnants shared data. Correspondingly, Corey [13] supports reducing sharing within the operating system by allowing applications to indicate sharing requirements for operating systems data, effectively relaxing the consistency of precise objects. As in K42, conversely, the main point for communication is shared memory. In a Multikernel, we make no specific assumptions regarding the application interface, and construct the operating system as a shared-nothing distributed system, which possibly will locally share data (transparently to applications) while an optimization. We see a Multikernel as different from a microkernel, which also uses message-based communication between processes to accomplish security and isolation but remains a shared-memory, multithreaded system in the kernel. For example, Barrelfish has some structural similarity to a microkernel, in that it consists of a distributed system of communicating user-space processes which grant services to applications. Conversely, unlike multiprocessor micro kernels, every core in the machine is supervised completely independently the CPU driver and monitor contribute to no data structures

with other cores excluding message channels. That assumed, some work in scaling micro kernels is associated: Uhligs distributed TLB shoot down algorithm is related to our two-phase commit [16]. The microkernel comparison is also enlightening: as we have shown, the cost of a URPC message is equivalent to that of the paramount microkernel IPC mechanisms in the literature [18], without the cache and TLB context switch consequences. Disco and Cellular Disco [14, 21] were based on the principle that large multiprocessors can be better programmed as distributed systems, an argument complementary to our own. We see this as additional verification that the shared-memory model is not a comprehensive solution for large-scale multiprocessors, still at the operating system level. Previous work on distributed operating systems [17] intended to build a consistent operating system from a collection of self-governing computers connected by a network. There are evident comparable with the Multikernel approach, which hunt for to build an operating system from a collection of cores communicating over associations within a machine, except in addition significant differences: firstly, a Multikernel may take advantage of reliable in order message delivery to significantly shorten its communication. Secondly, the latencies of intra-machine links are lower (and less variable) than among machines. In conclusion, to a large extent previous work required to handle partial failures (i.e. of individual machines) in a fault-tolerant approach, while in Barrelfish the entire system is a breakdown unit. So as to said, extending a Multikernel further than a single machine to handle fractional failures is an opportunity for the future. Regardless

of a large amount of work on distributed shared virtual memory systems [2, 20], performance and scalability problems have limited their widespread utilization in favor of explicit message-passing models. There are parallels among our squabble that the single-machine programming model should nowadays as well shift to message passing. This model can be more closely measured up to with that of distributed shared objects [6, 19], wherein far-flung technique invocations on objects are programmed as messages in the interests of message efficiency.

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