TeraDox Wet Clean Process and System - Altay Inc. · PHOTOS OF THE PROCESS DECK STATIONS ON A...

Altay, Inc.http://www.altayinc.com

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Advanced Surface Preparation HTechnology

TeraDox Wet Clean Process and System

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What are the main factors that influence undesirable native oxide formation during and after wet processing to achieve pristine, stable, “oxide free”

and ideal Si-Hx terminated silicon surfaces?

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➢ Silicon wafer material and electrical specifications that affect the minority carrier lifetime & surface recombination velocity (ie. non-silicon impurities, dopants, crystallinity, defects, surface morphology)

➢ Dissolved impurities (ie. Oxygen, CO2, silica) in the oxide removal wet process chemistry, which include the DI water, HF and HCl, as well as impurities in the N2 purge and drying gas.

➢ Impurities in the wet process equipment materials and components

➢ Gaseous (ie. O2, CO2) permeation through wet processing equipment piping and materials which contaminate the wet process chemistry and environment that comes in direct contact with the wafer surfaces

➢ Wet process recipe conditions for the wet etching, rinsing and drying steps

➢ Bare silicon surface exposure to airborne contamination (ie. oxygen, moisture, CO2,organics), light and heat

➢ Queue time: the exposure time in air after the bare silicon surface has been prepared and before it placed in an inert environment (typically for the subsequent process)


An enhanced version of Altay’s NEO FRD system which integrates chemical processing, insitu-rinsing and a world class drying technology into a single vessel wet processor (“dry in / dry out”) for wafers and other substrates. This system...

➢ incorporates five patented “oxide free” methods and system features

➢ is comprised of a main wet process unit which is paired in series with a stand-alone Dox60 DI water degas unit

➢ maximizes the purity of the wet process chemistry and minimizies permeation, which are the critical parameters that are optimized for achieving the TeraDox’s superior “oxide free” process capabilities

➢ is offered with semi-automated or fully-automated wafer handling (including SMIF & FOUP), cassette & cassetteless configurations, and process vessels designed for batches of 3, 25 or 50 of 100-300mm diameter wafers.

➢ is also available in a Recirculating Filtered Etch Bath (RFEB) style version for R&D and low volume manufacturing applications.

What is the TeraDox System ?

3

DIMENSIONS:1350mm W - 1700mm D - 2000mm H WEIGHT: 1000kg

Typical NEO-2000 TeraDox Main Unit Layout

TeraDox Wet Clean System

4

Typical Dox60 UPW Degas Unit Layout


DIMENSIONS: 900mm W - 1500mm D - 2000mm H WEIGHT: 400kg5


WAFER TRANSFER / DRYER HOOD

OVER THE PROCESS VESSEL

WAFER CASSETTE LOAD / UNLOAD DOCK

PROCESS VESSEL, CASSETTELESS

WAFER CARRIER & ELEVATOR

WAFER TRANSFER / DRYER HOOD

OVER THE WAFER CASSETTE DOCK

PHOTOS OF THE PROCESS DECK STATIONS ON A TYPICAL CASSETTELESS 200mm SYSTEM

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Robot

FOUP

Process

Bath

Dox60 DI water degas unit

Monitor

Exhaust

FOUP

Robot

Electric

Area TeraDox

Space

Changer

&

Aligner

QDRAdditional

Chemical

Bath

Additional

Chemical

Bath

Electric

Area

De

ga

ssed

DI w

ate

r

Wafers


Example of an Altay 300mm TeraDox system configuration with FOUPS & additional cleans

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➢ Stand-alone UPW treatment unit that can be installed remotely and easily interfaces with any wet

processing tool

➢ Utilizes membrane contactor technology (combination of vacuum and N2 gas sweep) to degas UPW

➢ Reduces dissolved O2 as well as other gases, TOC, metals and colloidal solids like silica

➢ Achieves > 99.999% dissolved oxygen removal efficiency

➢ Capable of providing UPW with

➢ Anti-scrap features to prevent wafer breakage ➢ HCl and NH4OH (option) chemical supply network to complement the HF

➢ Chemical degassing using membrane contactor technology

➢ Fully integrated filtration and purification of the DI water and N2

➢ Heated N2 wafer drying to minimize organic residues on the wafer surface

➢ Ionizer for the neutralization of electrostatic charge on the wafer surface (option)

➢ PdM module for reducing H2O2 to < 1ppb (option)

➢ TeraZone UHP DIO3 module (option)

➢ Mini-bulk chemical delivery module for chemical supplies (option)

➢ Mini-batch TeraDox system for 300mm wafers (alternative to full batch system)

Altay TeraDox Wet Clean System

Additional System Features and Options

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Chemical Required

DI Water

H2SO4

HF

HCL

NH4OH

H2O2

O3

N2

IPA

DIW

** DHF and/or DHCL are used based on surface to be Cleaned

Typical Full WET Clean Sequence

**

DHF/

DHCL

QDR

HPMQDRDHF/

DHCLQDRDRY

SPM

or

SOM

QDRAPMQDR

Competitor WET Cleaning System & Process

Flow

For Hydro Phobic Surface Only


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* DHF and/or DHCL are used base on

surface to be cleaned (Si, SiGe, Ge)

HCL Supply

UPW

Degas

UPW

Supply

HF Supply

DRY QDR DIO3

DIO3 QDR* dHF/

dHCLQDR

Apet FRD with Options (Degas, DIO3, dHF, dHCL)

For Hydrophilic Surface Only

Full WET Clean Sequence

Fill

DIO3 Mixer

Drain

O3 Gas

Supply

CHEM

Degas

Chemical

Required

----------------

DI Water

HF

HCL

O3(g)

N2(g)

IPA

N2, IPA

Process

Vessel

Dryer

Dome

H1

H2 H3


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Understanding Oxide Thickness, Monolayers and encapsulated SIMS ArealOxide Density (AOD) when assessing “oxide free” surface preparation capabilities

DescriptionSiOx

Thickness(Å)SiOx

MonolayersSIMS AOD

(atom/cm2)SiOx / SiHx

Coverage (%)

Reference

1 0.29 2.10E+14 29% / 71%

3.5 1.0 7.20E+14 100% / 0%

Typical Native Oxide 7 2.0 1.50E+15 100% / 0%

Detection Limit of XPS 0.1 0.029 2.10E+13 2.9% / 97.1%

Detection Limit of SIMS 0.0005 0.00014 1.00E+11 0.014% / 99.986%

Assume the silicon wafer surface is terminated with either SiOx or SiHx species

Oxygen Hydrogen

3.5 Å SiOx 1 Å SiOx 0.014 Å SiOx

Wafer surface 100%

covered by

1 monolayer of Oxygen

Typical HF Last process

29% Oxygen

71% Hydrogen

Encapsulated SIMS DL

0.014% Oxygen

99.986% Hydrogen

TeraDOx + 650C NB Si cap ES

Non-detectable

TeraDox Wet Clean Process

Study to measure the effect of Dissolved Oxygen concentration in the UPW

of the TeraDox “oxide free” process vs. areal oxygen density (AOD)

using the encapsulated SIMS method (2009)

➢ Si wafers are prepared using the TeraDox wet clean process to remove the native oxide with the UPW supply DO degassed to 1 ppb and 0.1 ppb.

➢ An unprocessed control wafer is included in the test plan as a reference for the initial native oxide on the wafers being wet cleaned.

➢ The front surface of the three wafers are encapsulated by depositing a thin (80-150nm) silicon layer using the standardized “ASM 650 No Bake SiH4 deposition” recipe in an ASM E2000 epi reactor.

➢ Dynamic SIMS characterization is used to measure the Areal Oxygen Density (AOD), which has the units of atoms/ cm^2, at the Si cap /Si wafer interface.

➢ The AOD data also quantifies the effect of the DO in the wet clean UPW on the efficiency of the oxide removal process .

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unprocessed control DO= 1 ppb DO= 0.1 ppb *

* The detection limit of this DO meter was O.1ppb (current DO meters can now detect down to 10 ppt)

7.267 E15 at/cm2 2.078 E13 at/cm2 2.627 E12 at/cm2

Results for the effect of DO concentration in the UPW vs. encapsulated SIMS AOD


… as it can be seen, a lower DO in the UPW allows for a lower AOD

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➢ Slides 16 & 17 show encapsulated SIMS profiles for three 200mm wafers using the Altay TeraDox (batch wet processor) dHF last wet clean

- the wafers were dried with heated N2 only (no IPA)

- oxygen peaks were non-detectable (< 1 E11 at/cm^2) on all three

wafers for the center and edge

➢ Slide 18 shows encapsulated SIMS profiles for two 200mm wafers using customer T’s process of record dHF last wet clean on a DNS single wafer wet processor.

- oxygen peaks > 1 E13 at/cm^2

- edge AOD ~3x higher than the center

Note: A significant number of process and hardware improvements have been made on the Altay TeraDox since this demo that provide even lower O and C contamination.

Customer T’s demo: encapsulated SIMS results using the “ASM 650 No Bake SiH4 deposition” recipe (2010)


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O

1E+15

1E+16

1E+17

1E+18

1E+19

1E+20

1E+21

1E+22

1E+23

0 200 400 600 800 1000 1200 1400

DEPTH (Å)

O C

ON

CE

NT

RA

TIO

N (

ato

ms

/cc

)

O

1/11/2011

CF957_YR_11 Slot 20 ID D65603-09 Wf 11 PBL Spree (O)

Analog Devices Inc: Slot 20 ID D65603.09 Wf 11 PBL Spree (O) O

1E+15

1E+16

1E+17

1E+18

1E+19

1E+20

1E+21

1E+22

0 20 40 60 80 100 120 140 160 180 200

DEPTH (nm)

O C

ON

CE

NT

RA

TIO

N (

ato

ms

/cc

)

O

2/16/2011

CM639_YA_06 Devices Slot 20 ID D65603-09 Wf11 PBL Spree, edge (O)

Analog Devices Slot 20 ID D65603.09 Wf11 PBL Spree, edge (O)

O

1E+15

1E+16

1E+17

1E+18

1E+19

1E+20

1E+21

1E+22

1E+23

0 200 400 600 800 1000 1200 1400

DEPTH (Å)

O C

ON

CE

NT

RA

TIO

N (

ato

ms

/cc

)

O

1/11/2011


Analog Devices Inc: Slot 21 ID D65603.09 Wf 10 PBL Spree (O)O

1E+15

1E+16

1E+17

1E+18

1E+19

1E+20

1E+21

1E+22

0 20 40 60 80 100 120 140 160 180 200

DEPTH (nm)

O C

ON

CE

NT

RA

TIO

N (

ato

ms

/cc

)

O

2/16/2011



Encapsulated SIMS (Center & Edge) for Altay’s TeraDox

Wet Clean Process

Center Edge

16

O

1E+15

1E+16

1E+17

1E+18

1E+19

1E+20

1E+21

1E+22

1E+23

0 200 400 600 800 1000 1200 1400

DEPTH (Å)

O C

ON

CE

NT

RA

TIO

N (

ato

ms

/cc

)

O

1/11/2011


Analog Devices Inc: Slot 25 ID D65603.09 Wf 12 PBL Spree (O) O

1E+15

1E+16

1E+17

1E+18

1E+19

1E+20

1E+21

1E+22

0 20 40 60 80 100 120 140 160 180 200

DEPTH (nm)

O C

ON

CE

NT

RA

TIO

N (

ato

ms

/cc

)

O

2/16/2011



Encapsulated SIMS (Center & Edge) for Altay’s TeraDoxWet Clean Process

Center Edge

O is non-detectable

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O

1E+17

1E+18

1E+19

1E+20

1E+21

1E+22

1E+23

0 10 20 30 40 50 60 70 80 90 100

DEPTH (nm)

O C

ON

CE

NT

RA

TIO

N (

ato

ms

/cc

)

O

Depth Areal Density

(nm) (atoms/cm²)

O 60.5-81.0 3.33E+13

2/8/2011

cf957_YA_52 Devices slot 13 (O)

Analog Devices slot 13 (O)

Depth Areal Density

(nm) (atoms/cm²) O 60.5-81.0 3.33E+13

O

1E+17

1E+18

1E+19

1E+20

1E+21

1E+22

1E+23

0 10 20 30 40 50 60 70 80 90 100

DEPTH (nm)O

CO

NC

EN

TR

AT

ION

(a

tom

s/c

c)

O

Depth Areal Density

(nm) (atoms/cm²)

O 59.4-80.7 9.69E+13

2/8/2011

cf957_YA_58 Devices slot 15 (O)

Analog Devices slot 15 (O)

Depth Areal Density

(nm) (atoms/cm²) O 59.4-80.7 9.69E+13

Encapsulated SIMS (Center Only) for Customer T’s HF Last Wet Clean Process of Record using Competitor D’s Wet Process System

Center Edge

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An ideal in-line measurement method/system to assess the quality of “as

processed” bare semiconductor wafer surfaces should provide these features and

capabilities:

➢ Isolation of surface properties from those of the bulk

➢ Nondestructive & noncontact (e.g. PL & m-PCD)

➢ Meaningful and quantitative parameter (atom density, lifetimes, SRV etc.)

➢ Sensitive & accurate

➢ Imaging

➢ Fast

➢ Simple to use

After researching the details for all of the measurable semiconductor surface parameters the Altay opinion is that Surface Recombination Velocity (SRV) provides the most meaningful and encompassing information since it is sensitive to all impurities and defects that can affect the electrical performance of the semiconductor device structures being fabricated.

A 4-year focused effort to find the ideal method/system to measure SRV led Altay to Q-LIC in 2017, which was invented and developed by the University of Toronto’s CADIPT department.

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Lock-in Carrierography (LIC) is a camera-based imaging extension of PCR➢ Infrared camera speed (2-kHz frame rate is

state-of-the-art) does not allow capturing high frequency information, which, however, is indispensable for bulk and surface separation.

➢ Heterodyne LIC (HeLIC) features a slow

enough beat frequency component via non-

linear mixing of two adjacent high

frequencies. HeLIC allows full frequency

camera pixel profile acquisition

without upper frequency limitations.

University of Toronto

CADIPT Department

Q-LIC Method/System for the Evaluation of Surface Transport Parameters

PhotoCarrier Radiometry (PCR)➢PCR is a form of spectrally-gated modulated photoluminescence (PL).➢Lock-in detection. Frequency-domain.➢Quantitative.The key is that PCR is a frequency-domain technique. The modulation frequency can control the carrier diffusion (penetration) depth.

SPCR=f(ω,S1,S2,τb, NT, D, β). There are models and algorithms to process f-domain data and extract the bulk lifetime and the surface recombination velocities separately as well as other transport parameters.

A. Mandelis, Diffusion-Wave Fields, Springer 2001. Chapter 9.

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f1f2

808 nm Laser 1

IrisDiffuser

808 nm Laser 2

Lock-in Amplifier

1

Lock-in Amplifier

2

NI 6259

Computer

Collimator

Mirror

InGaAs

detector

Sample

InGaAs

Camera

Sample

holder

Longpass

filter

Longpass

filter

Df=f2-f1

f2

Quantitative Lock-in Carrierography (Q-LIC): Experimental set up (HeLIC, HoLIC and PCR)

• In one measurement, one can simultaneously obtain the homodyne (HoLIC) signal and the heterodyne (HeLIC) signal from a single detector, and their image counterparts from the camera.

• Single detector measurements up to 5 MHz can be achieved.• Imaging from DC to 2 kHz with HoLIC and up to 5 MHz for HeLIC are feasible with subsequent quantitative analysis,

generation and display of quantitative images of key transport parameters (SRV, lifetime, carrier diffusivity). • Max laser power up to 40 W for each laser.• Illuminated area up to 30cm x 30cm• Duration of simultaneously measurements is

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The statistical distributions of pixel numbers of the five SRV images clearly show how the SRV changes with queue time.

SRV values increased with Q-time as the native oxide layer grew on the silicon surfaces due to adsorption/absorption of impurities from air exposure.

Case study: SRV evolution vs. queue time (Q-time)

Appl. Phys. Lett. 112, 012105 (2018)

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Case study: SRV evolution vs. queue time (Q-time) for various treatments

Sample Apparatus DO level

Nos. 1 & 2 Altay 400 ppb

Nos. 3 & 4 FSI > 2 ppm

No. 5 Altay 40 ppt

No. 6 R&D > 2ppm

No. 7 None N/A

Nos. 8 & 9 Altay 100 ppt

Nos. 10 & 11 FSI > 2 ppm

Nos. 12 R&D 2% HF > 2 ppm

1 1010

1

102

103

No.8

No.9

No.10

No.11

No.12

SR

V(s

m/s

)

Time after etching (hrs)

The Altay vs. the other wet processes/systems evaluated clearly demonstrates a

significantly lower number of the recombination centers/defects on the surface. Appl. Phys. Lett. 112, 012105 (2018)

TeraDox Endorsement

“ Based on my 40 years of experience with research and development of semiconductor characterization technologies and their applications, along with the TeraDox vs. the competition studies that we have done over the past two years, I think that the TeraDox process technology outperforms other wet surface preparation technologies towards producing pristine bare silicon surfaces by large multiples. While there are several critical and enabling components to the TeraDox’s outstanding performance it is primarily achieved by being able to provide DO levels in the process chemistry from at least ~25 times lower (with a resulting threefold decrease in surface recombination velocities) to up to ~50,000 times (with a resulting tenfold decrease in surface recombination velocities) over other established wet cleans.”

Andreas Mandelis, FRSC, FCAE, FAPS, FSPIE, FAAAS, FASME, PhDProfessor and Canada Research Chair (Tier 1)Director, Center for Advanced Diffusion-Wave and Photoacoustic TechnologiesDept. of Mechanical and Industrial EngineeringDept. of Electrical and Computer EngineeringInstitute of Biomaterials and Biomedical EngineeringUniversity of Toronto5 King's College RoadToronto, ON M5S 3G8CANADA

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Final Comments

The TeraDox technology has proven to be capable to achieve the current

and future stringent requirements for semiconductor wafer surface

preparation.

Altay offers unique flexibility (not a cookie cutter approach) to customize a

system (hardware, software and process) to satisfy each customer’s

particular needs.

Altay is a small company but still provides customers the expected

attention and technical support required by a global equipment supplier.

Please give is the opportunity to prove these claims.

Thank you!


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TeraDox Wet Clean Process and System - Altay Inc. · PHOTOS OF THE PROCESS DECK STATIONS ON A...

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