Switched Mode Power Conversion Indian Institute of Science ...

SECTION 4

DC to DC CONVERTERS

1. INTRODUCTION

DC to DC power converters convert electrical power provided from a source at acertain dc voltage to electrical power available at a different dc voltage. Electrical energy,though available extensively from storage sources such as batteries, or from primaryconverters such as solar cells, or from distributed ac utility mains, is hardly ever used as suchat the utilisation end. The electrical energy is converted at the utilisation end to forms ofenergy as required (thermal, chemical, light, mechanical and so on). Electrical power converterinterfaces between the available source of electrical power and the utilisation equipment(heaters, storage battery chargers, lamps, motors and so on) with its characteristic demands ofelectrical power. The need for this interface arises on account of the fact that in mostsituations the source of available power and the conditions under which the load demandspower are incompatible with each other. An example of such a situation is where a 24V leadacid battery is available as the source of power and the load to be catered to consists of digitalcircuits demanding power at +5V.

DC to DC power converters form a subset of electrical power converters. Both theoutput and input power specifications of dc to dc converters are in dc. Most dc loads requirea well stabilised dc voltage capable of supplying a range of required current, or a variable dccurrent or pulsating dc current rich in harmonics. The dc to dc converter has to provide astable dc voltage with a low output impedance over a wide frequency range. These features ofthe dc to dc converter are known through the output regulation and output impedance of theconverter. Most dc sources are either batteries or are derived by rectifying the ac mains. Thesource voltage may vary as much as 40% in the case of batteries. It may contain substantialsuperimposed voltage ripple in the case of rectified supplies. Most dc sources also exhibit afinite source impedance (against the ideal of zero source impedance). The dc to dc convertermust maintain the integrity of the output power in the presence of these nonideal sourcecharacteristics. This capability of the dc to dc converters is known through the line regulation,ripple susceptibility, and the input impedance of the converter.

This Chapter on dc to dc converters deals with the switched mode dc to dc converters,their basic topologies, principle of operation, operating modes, and their steady stateperformance characteristics.

1.1 Simple dc to dc Converter

The simplest and the traditional dc to dc converter is shown in Fig. 1.1. Power isavailable from a voltage source of . The load connected to the output of the converter isVgresistive ( ) demanding power at a voltage level of In this converter theR Vo (Vo ≤ Vg).

Switched Mode Power Conversion Indian Institute of Science

EE 47 V. Ramanarayanan

Fig. 1.1 Simple dc to dc Converter

excess voltage between the source ( ) and the load ( ) is dropped in the resistor ( )Vg Vo Rcinside the converter. The converter also has an internal current sink ( ) connected at theIcoutput of the converter. The output voltage of the converter may be readily found as afunction of and and .Rc, Ic, Vg, R

(1.1)Vo =(Vg−IcRc)R

(R+Rc) may be controlled to the desired level by controlling either (with ), or byVo Rc Ic = 0

controlling (with a fixed value of ). The former is called a series controlled regulator,Ic Rcand the latter is called a shunt controlled regulator. The two types of regulators are shown inFig. 1.2. Notice that in both regulators the series element is present. The distiguishing featureis the presence of control capability either in the series element or in the shunt element.

1.2 Series Controlled Regulator

The defining equation of the series controlled regulator is

(1.2)Vo =VgR

(R+Rc)

In order to obtain the required output voltage , against input ( ) variations, or load ( )Vo Vg Rvariations, the controlled resistor must be varied as per the following relationship.Rc

(1.3)Rc = R

VgVo

− 1

The output voltage, power loss, and the efficiency of power conversion may be readily found.

(1.4)Vo =VgR

(R+Rc)

(1.5)Pl =Vg

2Rc

(R+Rc)2

(1.6)E = VoVg

From the above the following features of the series controlled converter may be observed.1 The converter may be used as a step down ( ) converter only.Vo ≤ Vg2 The power loss in the converter is dependent on the value of . It is zero forRc

both the extreme values of (input is directly connected to the output), andRc = 0 (input is totally isolated from the output). This feature in fact is the seedRc = ∞

idea of switched mode dc to dc converters.

48

Fig. 1.2a Series Regulator Fig. 1.2b Shunt Regulator

3 The power conversion efficiency is dependent on the ratio (called the gainVo/Vgof the converter). The lower the required gain of the converter, the lower is itsefficiency.

1.2 Shunt Controlled Regulator

The defining equation of the output voltage of the shunt controlled regulator is

(1.7)Vo =VgR

(R+Rc)− IcRRc

(R+Rc)In order to obtain the required output voltage ( ), against input voltage ( ) variation,Vo Vgor load ( ) variation, the controlled current must be varied according to the followingR Icrelationship.

(1.8)Ic =VgRc

−Vo(R+Rc)

RRcThe output voltage, power loss, and the efficiency of power conversion may be found asfollows.

(1.9)Vo =VgR

(R+Rc)− IcRRc

(R+Rc)

(1.10)Pl = VoIc + (Ic + Io)2Rc

(1.11)E =V0Vg

IoIo+Ic

The following features of the converter may be observed from the above set of relationships.1 The converter may be used as a step down converter ( ) only, on accountVo ≤ Vg

of the series pass element . For a given there will be a further limit on ,Rc Rc Vodepending on the current to be supplied.Io

2 The power loss in the converter never reaches zero for any positive value of thecontrol quantity. Remember that in a series controlled regulator, the power loss inthe converter was zero at either end of the control quantity ( , andRc = 0

).Rc = ∞3 The efficiency of power conversion is worse than the series controlled converter.

The efficiency is degraded on two counts; the efficiency on account of the serieselement ( ) and the efficiency on account of the shunt branch [ ].Vo/Vg Io/(Io + Ig)



Fig. 1.3a Series Pass Transistor Regulator

1.3 Practical Regulators

In practice, the series controlled regulator is realised with a series pass transistor usedas a controlled resistor. The shunt controlled regulator is realised with a shunt constantvoltage diode (zener) used as a controlled current sink. The circuits are shown in Fig. 1.3.The output voltages are

Series controlled regulator:

(1.12)Vo =(β+1)KRVo

∗

[1+(β+1)KR]≈ Vo

∗

K = Transconductance of the feedback amplifier;

= Common emitter current gain of the pass transistorβ

Shunt controlled regulator:

(1.13)Vo = Vz;VoR

≤(Vg−Vo)

Rc

The series controlled and the shunt controlled regulator are commonly known as linearregulators. They are simple to analyse and design. The major drawback of linear regulators is their poor efficiency. The losses in such converters appear as heat in the series and shuntelements. The design of such converters must also take into account effective handling of thelosses, so that the temperature rise of the components is within safe limits. The linearregulators are therefore used only for low power levels; a few watts in the case of shuntregulators and a few tens of watts in the case of series regulators. For catering to loads inexcess of these limits and/or for applications where efficiency is very important (spaceapplications), linear regulators are not suitable. In such applications, switched mode powerconverters are standard. In the next section we see the basic principles of switched mode dcto dc converters.

2. SWITCHED MODE POWER CONVERTERS

It was mentioned that the seed idea of switched mode power conversion came fromthe fact that the power dissipation in a series controlled regulator is zero at either end values

50

Fig. 2.1 Series Controlled Switching Regulator

Fig. 1.3b Zener Controlled Shunt Regulator

of the control quantity ; namely and . The core of the switched mode dcRc Rc = 0 Rc = ∞to dc converter is obtained by replacing the series pass element ( ) of the series controlledRcregulator by a switch. The circuit is shown in Fig. 2.1. The switch may occupy either of thepositions ON and OFF. The ON position connects the source ( ) to the output ( ). ThisVg Vois identical to the condition that in the series controlled regulator. In the OFF positionRc = 0the output is totally isolated from the input. This is identical to the condition that inRc = ∞the series controlled regulator. In order to obtain a finite effective value of , the switch isRcoperated at high frequency alternating between these (ON and OFF) two states. The switch isoperated at a switching period of . For a fraction ( ) of the switching period, the switch isTs dkept ON. For the rest of the switching period [ ], the switch is kept OFF. The(1 − d)Tsfraction ' ' is defined as the duty ratio of the switch. The output voltage under such andoperation is shown in Fig. 2.2 .The average output voltage under such a control is

(2.1)Vo = 1Ts

∫0

TsVo(t)dt = dVg

The duty ratio may be varied in the range of to . The average value of the output voltage is0 1therefore variable between and . There are no losses in the converter. The power0 Vgdissipation in the switch is zero during both the ON and OFF states. Therefore the converterhas ideally no losses. However the output voltage is not pure dc. The output apart from thedesired average voltage ( ), also has superimposed alternating voltage at switchingdVgfrequency. Real dc to dc converters are required to provide nearly constant dc output voltage.A real dc to dc converter therefore consists of a lowpass filter also apart from the switches.The function of the lowpass filter is to pass the dc power to the load and to block the accomponents at the switching frequency from reaching the output of the converter. In order toachieve efficient operation, the lowpass filter is realised by means of nondissipative passiveelements such as inductors and capacitors.



Fig. 2.2 Output Voltage Waveform in an Ideal Series Switching Regulator

Fig. 2.3 Primitive dc to dc Converter

2.1 A Primitive dc to dc Converter

A primitive dc to dc converter is shown in Fig. 2.3. Many operating features of SwitchedMode Power Converters (SMPC), and their analysis methods may be learnt by a study of thisprimitive converter. The operation of the circuit is as follows.

1 The switch is operated at a constant switching frequency of . The switchingfsperiod is ( ). Ts 1/fs

2 For a fraction of the switching period ( ), the pole P of the switch isu = 1connected to through the throw . The ON time per cycle is .Vg T1 dTs

3 For the rest of the switching period ( ), the pole P of the switch is connectedu = 0to zero volts through the throw . The OFF time per cycle is T2 (1 − d)Ts.

4 The voltage obtained at the pole of the switch is a function of time and is shown inFig. 2.4.

2.2 Analysis of the Primitive Converter

In every cycle from to ( ), the pole P of the switch is connected toTs (K + d)Ts K = 1, 2, 3, ....Vg

During ON time,

(2.2)Vg = L didt

+ R i

(2.3)i (KTs) = I (K)

When we redefine time from the start of the cycle,Kth

(2.4)i(t) = I(K) e−Rt

L +

VgR

(1 − e−Rt

L )

The current at the end of ON time is found for t = dTs

52

Fig. 2.4 Pole Voltage and Output Current Wavefoms in Primitive Converter

(2.5)I (K) = I(K) e−RdTs

L +

VgR

(1 − e−RdTs

L

In every cycle from time to , the pole P of the switch(K + d)Ts (K + 1)Ts (K = 1, 2, 3, ...)is connected to ground.

During OFF time,

(2.6)0 = Ldidt

+ iR

(2.7)i[(K + d)Ts] = I (K)

When we redefine time from the start of the OFF time of the cycle,Kth

(2.8)i(t) = I (K) e−Rt

L

The current at the end of OFF time is found for .t = (1 − d)Ts

(2.9)I(K + 1) = I (K) e−

R(1−d)TsL

If the initial condition is known, the inductor current may be found out from theI(0) i(t)above equations cycle by cycle. We may also solve for the steady state by forcing

in the above set of equations. Under steady stateI(K) = I(K + 1)(2.10)I(K) = I(K + 1) = I

(2.11)I (K) = I (K + 1) = I

(2.12) I = I e−RdTs

L +VgR

(1 − e−RdTs

L )

(2.13)I = I e−

R(1−d)TsL

Combining Eqs (2.12) & (2.13), we get

(2.14)I =VgR

1−e

−RdTsL

1−e

−RTsL

(2.15)I =VgR

e−

R(1−d)TsL −e

−RTsL

1−e

−RTsL

If we select the converter element and the operating switching period such thatL, then the exponential terms may be approximated by the first two or three termsL/R << Ts

of the series to obtain the following approximate results.



(2.16)(I + I )

2≈ Average Current =

dVgR

(2.17)I − I = δI = Ripple Current ≈Vgd(1−d)Ts

L

(2.18)δII

= δi = Ripple Factor ≈(1−d)RTs

LThe result given in Eq. (2.18) confirms our assumption that the ripple factor is indeed low and

that is approximately equal to when .I I L/R << Ts2.3 A Simplified Analysis of the Primitive Converter

In the earlier section we did an exact solution of the circuit differential equations for steadystate and then applied the simplifying assumption that the current ripple is low. We mayperform the analysis by assuming that the current and voltage ripple is low to start with andthen carry out the analysis. Such a method is more common in the analysis of SMPC. Aftersteady state is reached, become periodic with period .vo(t), i(t), and vL(t) Ts

(2.19)i(t) = i(t + KTs)Current buildup in the inductor over a period is zero under steady state.

(2.20)∫0

Tsdi = 1

L ∫0

TsvLdt = 0

We may express this in words as "the inductor volt-sec integral over a cycle is zero understeady state". We may use this criterion along with the assumption that the current ripple islow and the consequent voltage ripple across the load is nearly zero. Such an approachconsiderably simplifies the analysis. Consider the two subcircuits of the primitive converterunder steady state shown in Fig. 2.5. The following are the key points of the analysis.

1 DC to DC converters will have negligible ripple voltage at the output; Vo.vo(t) ≈2 Volt-sec integral across an inductor over a cycle is zero under steady state. The

dual of this property (Amp-sec integral through a capacitor under steady state iszero over a cycle) is also useful in some other converters.

Steady State Output:

Apply volt-sec balance on the inductor

(2.21)(Vg − Vo)dTs + (−Vo)(1 − d)Ts = 0

(2.22)Vo = dVg

Current Ripple:

During the ON time of the switch the current in the inductor rises linearly with (since )di/dt = (Vg − Vo)/L vo(t) ≈ Vo

54

Fig. 2.5 Equivalent Circuits of the Primitive dc to dc Converter

(2.23)δI = ∫0

Tsdi = 1

L ∫0

Ts(Vg − Vo) dt =

(Vg−Vo)dTsL

(2.24)δII

= δi =(1−d)RTs

L

Voltage Ripple:

(2.25)δVo = R δI =(Vg−Vo)RTs

L

(2.26)δVoVo

= δv =(1−d)RTs

L

In order that our analysis results are valid, must be small. We may ensure this by imposingδvthe condition from Eq. (2.26) that ( ) the switching period is very much smaller thanTs << L/Rthe natural period ( ) of the circuit. In the primitive converter that we considered the switchL/Ris ideal and so also the inductor. There are no losses in the converter and so the efficiency isunity. The input current and the output current of such a converter is shown in Fig. 2.6. It maybe assumed that the output voltage ripple and the inductor current ripple are small as per theforegoing analysis.

(2.27)Ig = 1Ts

∫0

Tsig(t) dt = 1

Ts∫0

dTsIo dt = dIo

For the primitive converter,

(2.28)VoVg

= d =IgIo

This result is in general true for all lossless converters. The forward voltage transfer ratio willbe the same as the reverse current transfer ratio. It is easy to see that the product of thevoltage transfer ratio and the current transfer ratio is the efficiency of the converter. Theefficiency is obviously unity in the case of lossless converters.



Fig. 2.6 Input and Output Currents in the Primitive dc to dc Converter

2.4 Nonidealities in the Primitive Converter

In practice a real converter will have several nonidealities associated with the differentcomponents in the converter. These are the source resistance ( ), the parasitic resistance ofRgthe inductor ( ), and the switch voltage drops ( : ON period throw conduction drop;Rl Vsn

: OFF period throw conduction drop). Figure 2.7 shows the primitive converter withVsfthese nonidealities indicated. We may apply volt-sec balance on the inductor. Considering thenonideality of the inductor and the source

(2.29)[Vg − IoRg − IoRl − Vo]dTs + [−IoRl − Vo](1 − d)Ts = 0

(2.30)Vo = dVgR

R+Rl+dRg

= Ideal Gain * Correction FactorThe current transfer ratio is unaffected by these (series) nonidealities.

(2.31)IoIg

= 1d

The overall efficiency of the converter is

(2.32)η = VoIoVgIg

= RR+Rl+dRg

In a similar way the nonideality of the switches may also be taken into account. Applyingvolt-sec balance

(2. 33)[Vg − IoRg − Vsn − IoRl − Vo]dTs = [Vsf + VoRl + Vo](1 − d)Ts

(2.34)dVg

1 − Vsn

Vg−

Vsf(1−d)

dVg

= Vo

R+Rl+dRgR

(2.35)Vo = dVg

R

R+Rl+dRg

1 − Vsn

Vg−

Vsf(1−d)

dVg

The correction factor consists of two terms; one corresponding to the parasitic resistances inthe circuit and the other corresponding to the switch nonidealities. Since the current transferratio is unaffected, the voltage gain correction factor directly gives the efficiency of powerconversion also.

56

Fig. 2.7 The Primitive Converter with Different Nonidealities

3. MORE VERSATILE POWER CONVERTERS

The extension of the primitive dc to dc converter to the next level of complexity yieldsthe three basic real converter topologies as shown in Fig. 3.1. These converters consist of onesingle pole double throw switch (SPDT), one inductor, and one capacitor each. These threeconverters are named the buck, the boost, and the buck-boost converters respectively. Thesteady state analysis of these converters may be done following the same methods developedfor the primitive converter.

3.1 Buck Converter

The buck converter steady state waveforms are shown in Fig. 3.2. We may apply theassumption that the output voltage ripple is low ( = ) and carry out theδv δVo/Vo << 1analysis for the steady state performance of the converter.

Voltage Gain:

Apply volt-sec balance on inductor.

(3.1)Vo = dVg

Current Ripple:

In each subperiod [dTs and (1-d)Ts] the rate of change of current is constant.

(3.2)δIL =Vgd(1−d)Ts

L



Fig. 3.1 Three Basic Topologies of Switching dc to dc Converters

(3.3)δILIL

= δi =(1−d)RTs

L

Voltage Ripple:

The charging and discharging current of the capacitor (hatched region in Fig. 3.2) decides thevoltage ripple. We consider that the entire ac part of the inductor current flows into thecapacitor.

(3.4)δVo =δQC

= 1C

12

δIL2

Ts2

(3.5)δVo =Vo(1−d)Ts

2

8LC

(3.6)δVoVo

= δv =(1−d)Ts

2

8LC

Input Current:

The average of the source current is found as for the primitive converter.

(3.7)Ig = dIo

58

Fig. 3.2 Steady State Waveforms of Buck Converter

Validity of Results:

The results are valid when

(3.8)δVoVo

= δv =(1−d)Ts

2

8LC≈

5(1−d)Ts2

To2

<< 1

In other words, the switching period ( ) must be very much less than the natural period (Ts) of the converter. The important features of the buck converter areTo = 2π LC

1 The gain is less than unity (hence buck converter).2 The gain is independent of the switching frequency so long as Ts << To3 The output voltage ripple percentage is independent of the load on the converter.4 The output ripple has a second order roll-off with the switching frequency.5 The ideal efficiency is unity. When the nonidealities are considered the efficiency

degrades.

η =

R

R+Rl+dRg

1 − Vsn

Vg−

Vsf (1−d)

dVg

The efficiency of power conversion is good when , , andRl, Rg << R Vsn << Vg

. Notice that when very low output voltages are required ( ),Vsf << Vo Vsf ≈ Vo

or when the source voltage is low and comparable to the switch drop ( ),Vsn ≈ Vgthe efficiency will be particularly poor.

6 The input current is discontinuous and pulsating. It will therefore be necessary tohave an input filter also with the buck converter, if the source is not capable ofsupplying such pulsating current.

3.2 Boost Converter

The boost converter steady state waveforms are shown in Fig. 3.3. The analysis isbased on similar lines as donr for the buck converter.

Voltage Gain:


(3.9)Vo =Vg

(1−d)When the parasitic resistance of the inductor ( ) and the source resistance ( ) are takenRl Rginto account, the voltage gain gets degraded.

; (3.10)Vo =Vg1−d

1

1+ α(1−d)2

α =

Rl+RgR

Current Ripple:

In each subperiod [ and ] the rate of change of current is constant.dTs (1 − d)Ts

(3.11)δIL =VgdTs

L

(3.12)δILIL

= δi =d(1−d)2RTs

L



Voltage Ripple:


(3.13)δVo =δQC

= IodTsC

(3.14)δVoVo

= δv = dTsRC

Input Current:

The average of the inductor current is the same as the average source current.

(3.15)Ig = Io1−d



(3.16)δVoVo

= δv = dTsRC

<< 1

In other words, the switching period ( ) must be very much less than the natural period (Ts) of the converter. The important features of the boost converter areTo = RC

60

Fig. 3.3 Steady State Waveforms of Boost Converter

1 The gain is more than unity (hence boost converter).2 The gain is independent of the switching frequency so long as .Ts << RC

However this design inequality is a function of the load.3 The output voltage ripple percentage is dependent on the load on the converter.

The output ripple has a first order roll-off with the switching frequency.4 The parasitic resistances in the converter degrades the gain of the converter. The

gain though ideally is a monotonically increasing function, in reality on account ofthe parasitic resistances, falls sharply as the duty ratio approaches unity. It reachesa peak of 1/2 [ = ], and falls rapidly to zero at . The dutyα α (Rl + Rg)/R d = 1ratio at which this peak occurs is at d = 1- . The efficiency at this duty ratio willαbe 0.5 which is quite low. Therefore there is an indirect limit on the operating dutyratio. In practice boost converters are not operated beyond a duty ratio of about1/2 to 2/3. The gain and the efficiency of a boost converter (with = 0.02) areα

shown as a function of duty ratio in Fig. 3.4.5 The ideal efficiency is unity. When the nonidealities are considered the efficiency

degrades. The efficiency of power conversion is good when ;Rl, Rg << R

and at low duty ratios. Vsn << Vg;Vsf << Vo

(3.17)η =

1 − dVsn

Vg−

Vsf(1−d)

Vg

11+ α

(1−d)2

6 The input current is continuous. Therefore the boost converter is less sensitive tothe dynamic impedance of the source compared to the buck converter.

3.3 Buck-Boost Converter

The steady state waveforms of a buck-boost converter are shown in Fig. 3.5. The analysisfollows similar lines.

Voltage Gain:




Fig. 3.4 Gain and Efficiency of the Boost Converter

(3.18)Vo =−dVg1−d

When the parasitic resistance of the inductor ( ) and the source resistance ( ) are takenRl Rginto account, the voltage gain gets degraded.

; (3.19)Vo = −dVg1−d

1

1+α+βd

(1−d)2

α =RlR

; β =RgR

Current Ripple:

In each subperiod [ and ] the rate of change of current is constant.dTs (1 − d)Ts

(3.20)δIL =VgdTs

L

(3.21)δILIL

= δi =(1−d)2RTs

L

62

Fig. 3.5 Steady State Waveforms of the Buck-boost Converter

Voltage Ripple:


(3.22)δVo =δQC

= IodTsC

(3.23)δVoVo

= δv = dTsRC

Input Current:

The average of the inductor current is the same as the average source current.

(3.24)Ig = dIo1−d



(3.25)δVoVo

= δv = dTsRC

<< 1

In other words, the switching period ( ) must be very much less than the natural period (Ts) of the converter. The important features of the buck converter areTo = RC

1 The gain may be set below or above unity (hence buck-boost converter). Theoutput polarity is opposite to that of the input polarity.

2 The gain is independent of the switching frequency so long as . HoweverTs << RCthis design inequality is a function of the load.

3 The output voltage ripple percentage is dependent on the load on the converter.The output ripple has a first order roll-off with the switching frequency.

4 The parasitic resistances in the converter degrades the gain of the converter. Thegain though ideally is a monotonically increasing function, in reality on account ofthe parasitic resistances, falls sharply as the duty ratio approaches unity. It

reaches a peak of (3.26) Vo(peak) = α + β /[2α + 2β − β α + β ]

and falls rapidly to zero at d = 1. The duty ratio at which this peak occurs is at d =. The efficiency at this duty ratio will be about 0.5 which is quite low.1 − α + β

Therefore there is an indirect limit on the operating duty ratio. In practicebuck-boost converters are not operated beyond a duty ratio of about 1/2 to 2/3.

5 The ideal efficiency is unity. When the nonidealities are considered the efficiencydegrades.

(3.27) η =

1 − VsnVg

−Vsf(1−d)

dVg

1

1+α+βd

(1−d)2

The efficiency of power conversion is good when , ,Rl, Rg << R Vsn << Vg and at low duty ratios. Vsf << Vo



6 The input current is discontinuous and pulsating. It will therefore be necessary tohave an input filter also with the buck-boost converter, if the source is not capableof supplying such pulsating current.

TABLE 3.1

Buck Boost Buck-Boost

Ideal Gain d 11−d

− d1−d

Current Ripple (1−d)RTsL

d(1−d)2RTsL

(1−d)2RTsL

Voltage Ripple (1−d)Ts2

8LC

dTsRC

dTsRC

Duty Ratio d 23

≤ d ≤ 1 0 ≤ d ≤ 23

0 ≤ d ≤ 23

Efficiency Degradation on Account of the Different Nonidealities

Rl and Rg 11+α+βd

1

1+α+β

(1−d)2

1

1+α+βd

(1−d)2

Vsn and Vsf 1 − δVsn −δVsf

d

1 − δVsn − (1 − d)δVsf 1 − δVsn −(1−d)δVsf

d

Note : α =RlR

; β =RgR

; δVsn = VsnVg

; δVsf =VsfVg

The Table 3.1 gives the summary of the steady state results for the three basic converters. Thepractical realisation of the three converters with controlled (transistor) and uncontrolled(diode) switches for unidirectional power conversion is shown in Fig. 3.6.

64

Fig. 3.6 Practical Configuration of the Three Basic dc to dc Converters

4. DISCONTINUOUS MODE OF OPERATION IN DC TO DC CONVERTERS

In the analysis of the dc to dc converters in the previous section we forced a conditionthat the output ripple voltage is small. This is absolutely essential in order that the loadconnected to the dc to dc converter sees an ideal dc voltage source at the output of theconverter. However, the inductor current in the dc to dc converter is an internal quantity ofthe converter and it is not necessary that the inductor current ripple is small. We have seenthat the current ripple in all the basic converters is a function of [ ]. It is possible toTs/(L/R)operate the converter at low switching frequency or with a low value of inductance where thecurrent ripple is high. We have also seen that the ripple voltage in all the basic converters isinversely proportional to the filter capacitance. Hence it is possible to independently controlthe voltage ripple to be small (with high ripple current).

A typical buck converter realised with electronic switches and the inductor currentwaveform when is shown in Fig. 4.1. The transistor T conducts during andδIL/IL = 2 dTsthe diode conducts during . Consider the case when is further increased keeping(1 − d)Ts Ts

to be the same. The current waveform is shown in Fig. 4.2. Notice that now the currents”d”through the switch elements are bidirectional. The power circuit shown in Fig. 4.1 cannotsupport this mode of operation since the switches can carry only unidirectional current. Insuch a case the converter enters a mode of operation called the discontinuous inductor current



Fig. 4.1 Typical Buck Coverter and its Inductor Current Waveform

Fig. 4.2 Discontinuous Inductor Current in the Buck Converter

mode (DCM) of operation. In such an operation the inductor current starts in every cycle fromzero current and before the end of the cycle falls back to zero. The discontinuous mode(DCM) of operation results in steady state performance that is different from the continuousinductor current mode of operation (CCM) that we have seen in Section 3.

4.1 Buck Converter in DCM Operation

The equivalent circuit of the buck converter in the varios subperiodsand the steady state inductor current and voltage are shown in Fig. 4.3. Again the outputvoltage is assumed to have negligible ripple. The current in the inductor periodically goes tozero. There are three subperiods in a cycle.

1 During , energy is pumped from the source and the inductor current ramps up.dTs2 During , energy from the reactors feeds the load and the inductor currentd2Ts

ramps down.3 During , inductor has no energy and the capacitor supplies the load.d3Ts

The analysis of the converter is done as before invoking the condition that the output voltageripple is negligible.

Voltage Gain:

Apply volt-sec balance on the inductor.

(4.1)(Vg − Vo)dTs + (−Vo)d2Ts = 0

66

Fig. 4.3 Equivalenc Circuits of the Buck Converter in the Subperiods

(4.2)VoVg

= dd+d2

This is not a very useful form of result. is the control input and is the independent variable.”d”depends on and the circuit parameters , , etc. It will be more useful to”d2” ”d” Ts L R

determine the gain (defined M) in terms of independent control variable and theVo/Vg ”d”parameters of the circuit. and are related through and .”d” ”d2” Ip Io

(4.3)Ip =d2TsVo

L

(4.4)Io = VoR

=Ip(d+d2)

2Combining Eqs (4.3) and (4.4), we get

(4.5)d2(d + d2) = 2LRTs

= K

is defined as the conduction parameter of the converter. Equation (4.5) relates to K ”d2” ”d”and the parameters of the converter. Solving for the dependent quantity , we get”d2”

(4.6)d2 =−d+ d2+4K

2=

−d+d 1+4K

d2

2

(4.7)M = 2

1+ 1+4K

d2

Equations (4.6) and (4.7) give the intermediate variable and the voltage gain under”d2”DCM in terms of the control variable and the circuit parameters of the converter (”d”

). It may be observed that the gain under DCM is more than that obtained underK = 2L/RTsCCM.

Current Ripple:

In each subperiod, the rate of change of current is constant; during , (Vg − Vo)/L dTs Vo/Lduring , and zero during d2Ts d3Ts

(4.8)δIL = Ip =Vod2Ts

L

(4.9)δILIL

= δi = 2d+d2

Voltage Ripple:

The voltage ripple is decided by the capacitor current (hatched region in Fig. 4.3).

(4.10)δVo =δQC

=(d+d2)(Ip−Io)2

2CIp

(4.11)δVoVo

= δv =

1− 1

δi

2

RC

Input Current:

The input current is drawn only during .dTs



(4.12)Ig = Iodd+d2

In order that our analysis results are valid, must be small. We may ensure this byδVo/Voimposing the condition from Eq. (4.11) that . The important features[(1 − 1/δi)

2 << RC]of the buck converter in DCM are

1 The gain is less than unity; but more than that in CCM operation for the same dutyratio.

2 The gain is dependent of the switching frequency through the conductionparameter ( ).K = 2L/RTs

3 The output voltage ripple percentage is dependent of the load on the converterthrough the conduction parameter . The output ripple has a first order roll-offKwith the switching frequency.

4 The ideal efficiency is unity. When the nonidealities are considered the efficiencydegrades.

(4.13) η =

1 − VsnVg

−Vsfd2dVg

1

1+αd2K

; α =RlR

The efficiency of power conversion is good when , ,Rl, Rg << R Vsn << Vgand . Notice that when very low output voltages are required (Vsf << Vo Vsfnearly equal to ), the efficiency will be particularly poor. Vo

5 The input current is discontinuous and pulsating. It will therefore be necessary tohave an input filter also with the buck converter, if the source is not capable ofsupplying such pulsating current.

68

Fig. 4.4 Kcri as a Function of the Duty Ratio

6 When the duty ratio is such that , the converter will be operating on(1 − d) = d2the boundary between continuous and discontinuous mode of operation. We mayfind out the value of the conduction parameter , which will cause thisKcriboundary at the duty ratio of . This is found by equating for d d2 = (1 − d)

. K = Kcri

(4.14) d2 = (1 − d) =

−d+d 1+4Kcri

d2

2 (4.15) Kcri = (1 − d)Figure 4.4 shows the value of as a function of duty ratio . If theKcri ”d”conduction parameter is known for a converter, then we may see that for all dutyKratios when is less than , the converter will operate in DCM. For all dutyK Kcriratios when is greater than , the converter will operate in CCM.K Kcri



Fig. 4.5 Configurations of dc to dc Converter with Bidirectional Switches

Table 4.1 shows the quantities of interest in the other converters when they are operated inDCM. It is left as an exercise to carry out the analysis and verify these quantities. In case, theconverters are to be operated only in CCM, this may be readily done by realising the switchesin the converter with bidirectional switches as shown in Fig. 4.5.

TABLE 4.1

Buck Boost Buck-Boost

d+d2d

− dd2

d2 −d+d 1+4K

d2

2

K+ K2+4d2

K2

K

Voltage Gain Vo/Vg 2

1+ 1+4K

d21+ 1+4d2

K2

dK

Current Ripple δi 2d+d2

2d+d2

2d+d2

Voltage Ripple δv 1−1/δi

2

RC

1−d2/2

2

RC

1−d2/2

2

RCBorder of CCM/DCM Kcri = (1 − d) Kcri = d(1 − d)2 Kcri = (1 − d)2

Efficiency Degradation on Account of Different Nonidealities

Rl and Rg 1

1+α+βdd+d2

1

1+(α+β)(d+d2)

dd2

1

1+(α+β)d+αd2

d22

Vsn and Vsf 1 − δVsn −d2δVsf

d1 −

dδVsn+d2δVsfd+d2

1 − δVsn −d2δVsf

d

Note : α =RlR

; β =RgR

;δVsn = VsnVg

; δVsf =VsfVg

70

5. ISOLATED DC TO DC CONVERTERS

The converters seen in the previous sections are the basic dc to dc converters. Theoutput in those converters are not electrically isolated from each other. Though suchconverters find limited applications in power conversion, the majority of the dc to dcconverters require that the input and the output are galvanically isolated from each other.Several circuits with the feature of isolation between input and output are derived from thesebasic converters. Some of these isolated converters are briefly indicated in this section.

5.1 Forward Converter

The forward converters shown in Fig. 5.1 are derived from the buck converter. Theideal gain of this converter under CCM is . Figure 5.1 shows three variations ofVo/Vg = d/nthe forward converter. The magnetising current is reset in the circuit shown in Fig. 5.1adissipatively. The same feature in the circuits shown in Fig. 5.1b and 5.1c are achievedconservatively. The duty ratio of operation is limited; for the circuit in0 ≤ d ≤ Vz/(Vg + Vz)Fig. 5.1a, and for the circuits shown in Figs 5.1b and 5.1c. The output ripple0 ≤ d ≤ 0.5frequency is the same as the switching frequency. In all these converters, both DCM and CCMoperation are possible. Next to the flyback converter (Section 5.4) this is the simplest amongthe dc to dc converters and is the preferred topology for low power dc to dc converters (up toabout 100W).



Fig. 5.1a Forward Converter with Lossy Reset of Transformer Flux

Fig. 5.1c Two Switch Forward Converter

5.2 Push-Pull Converter

This circuit shown in Fig. 5.2 is also derived from the buck converter. The ideal gain inCCM is . The secondary switches are passive switches (diodes). The primaryVo/Vg = 2d/nswitches are controlled switches operating in push-pull fashion. Notice the diodes in the

primary to handle the magnetising energy of the isolation transformer. The duty ratio of eachof the switches is variable in the range of 0 to 0.5. The output ripple frequency is double thatof the switching frequency of the primary switches. Adequate care (like matched pair ofswitches) has to be taken in the design to prevent the saturation of the isolation transformer.Both DCM and CCM operation are possible. This circuit is preferred for power converterswith low input dc voltages (less than 12V) and medium output power (about 200W).

5.3 Half & Full Bridge Converter

These circuits shown in Figs 5.3a and 5.3b are also derived from the buck converter.The control of the switches is in push-pull fashion ( ) for the half bridge0 ≤ d ≤ 0.5converter. The voltage gain is . Notice the diodes used in the half bridgeVo/Vg = d/nconverter to handle the magnetising energy of the isolation transformer. In the full bridgeconverter the control is by the phase difference between the two halves of the bridge with theswitches in each arm switched with 50% duty ratio. The primary switches are bidirectionalcontrolled switches in order to handle the magnetising energy of the isolation transformer. Thegain of the converter is where the duty ratio d is as seen on the secondaryVo/Vg = d/noutput. The secondary switches are passive switches (diodes). There is no possibility ofsaturation of the isolation transformer on account of the dc blocking employed in the primary

72

Fig. 5.2 Push-Pull Converter

Fig. 5.1b Forward Converter with Lossless Reset of Transformer Flux

circuit. The ripple frequency at the output is double the switching frequency of the primaryswitches. Both DCM and CCM operation are possible. Most high power converters (above200W) are designed with bridge circuits.

5.4 Flyback Converter

The circuit shown in Fig. 5.4 is the flyback converter derived from the buck-boostconverter. The isolation is achieved through a coupled inductor (Note: The isolation element

is not a transformer in that it is capable of storing energy). The ideal gain in CCM is. The output ripple frequency is the same as switching frequency. BothVo/Vg = d/n(1 − d)

DCM and CCM operation are possible. This circuit employs the minimum number of



Fig. 5.3a Half Bridge Converter

Fig. 5.3b Full Bridge Converter

Fig. 5.4 Flyback Converter

components among all the dc to dc converters (one active switch, one passive switch, onemagnetic element and one capacitor) and hence the preferred circuit for low power (up toabout 50W).

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Switched Mode Power Conversion Indian Institute of Science ...

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