Sun Starfire: Extending the SMP Envelope

Presented by Jen Miller2/9/2004

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Starfire Overview

• 24 – 64 processors– Maximum of 4 processors per board

• Based on UMA, SMP snooping architecture

• Design focus on interconnect

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System

• 250 MHz processors with 4 MB external caches

• 16 x 16 data crossbar• Active centerplane• Point to point routing• 4 GB memory separated into 4

banks– 4 way interleaved address bus

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Interconnect

• Point to point routing: centerplane transfers addresses and data between boards- Higher latency than traditional bus- Better bandwidth, reliability,

availability• 2 cycle address transactions

- Bus determined by 2 low-order cache bits

• Data transactions- Waiting packets are buffered and

sent in 8 cycles buffer-to-buffer

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Dynamic System Domains

• Can be dynamically subdivided into multiple computers

• Each domain is a separate shared-memory SMP system– Errors confined to domain

• Great for testing and development• Starfire can replace multiple smaller systems• Domains can be created for special functions• Implemented in centerplane and system

boards via registers

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Reliability

• ECC for data transfers and address packets

• Optional hardware redundancy– Auto-reboot crash recovery

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Performance

• Bandwidth increased dramatically over prior generations

• Unix server flexibility with Dynamic System Domains

• Reliable, available, and serviceable• “Can match or exceed performance of other

parallel architectures for a lower system cost”