StreamBlade TM Architecture Introduction To The StreamBlade TM Architecture Rev 1.2.

StreamBladeTM Architecture

Introduction To The StreamBladeTM Architecture

Rev 1.2

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Contents

• Background

• Concept

• Technology

• Architecture

• Products

• Applications

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Background• StreamBladeTM Architecture Goals:

– Reduce the initial investment for signal processing solutions

– Reduce the time to deliver signal processing solutions

– Provide a path to scale signal processing solutions

– Provide an open architecture application framework

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Initial Investment

• Getting that first “thread” through…– Signal Source– RF to IF– IF to Channels– Channels to Data– Data to Follow-on-Processor (FOP)

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COTS hardware available today…

• Mercury• Pentek• AST• DRT• DRS

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COTS operating systems available today…

• VxWorks• MC/OS• Windows• Linux

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How much does a prototype system cost today?

• DRS Receiver VME….……..= $30,000.00• Mercury Quad G4 VME…….= $60,000.00• Slot One Controller VME…...= $5,000.00• VxWorks BSP for controller..= $15,000.00• VxWorks License……………= $25,000.00• C or C++ Compiler................= $4,000.00• Total = $139,000.00 (just to get started)

Note: Workstation, Chassis, and other Items are not included above.

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Time to deliver today…

• Integrating multi-vendor products is time consuming

• Getting board support packages (BSPs) and development environments set up is time consuming

• Installing and learning to use new tools is time consuming

• Debugging embedded applications is time consuming

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How do we scale our prototype system today?

• Add DRS Receivers?

• Add Mercury QUAD G4 boards?

• How many slots are in the chassis?

• How many chassis do we need?

• Will the backplane width restrict scalability?

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What if we want to see COTS vendor source code today?

• Good Luck…

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Concept• StreamBladeTM Architecture adopted these principles:

– Keep It Simple Stupid (KISS)

– Use proven technology

– Simplify connectivity

– Simplify development

– Use plug and play components

– Keep an eye on cost

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Remember “breadboard” prototypes?

• KISS• Proven technology• Simple connections• Easy to build• Plug and play• Cheap

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It is not as easy to “breadboard” prototype today…

• Today functional blocks are implemented in hardware, software, and firmware

• Today the signals are higher frequency and more complicated

• Today the interfaces between functional blocks are higher speed and more complicated

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Technology• StreamBladeTM Architecture leverages existing, proven, inexpensive,

easy to use, scaleable, standards based technologies such as:

– TCP/IP

– Ethernet

– FPGA

– DSP

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TCP/IP

• Sockets based programming is well understood today

• Today the real-time processing can be pushed into DSP or FPGA material

• Inexpensive operating systems, such as Linux, can be used in embedded applications as configuration and control fabric

• TCP Offload Engines (TOEs) and protocols such as RDMA reduce host processor cycles required to transfer data

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Ethernet

• Real-time processing nodes can be connected by 10/100/1000 Ethernet and 10 Gig-E is just around the corner

• Ethernet will work over twisted pair or fiber interfaces

• Ethernet is inexpensive, available, and standards based

• Today just about every type of computer or peripheral has a Ethernet interface

• Today network switches provide real-time processing nodes with non-blocking bandwidth connectivity

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FPGA & DSP

• FPGA technology has advanced and is providing multi-million gate solutions

• FPGA technology is less expensive today

• Today FPGA manufacturers are providing Ethernet building blocks and DSPs as hard cores in FPGA products

• Today many companies such as RFEL develop FPGA cores to perform signal processing functions such as FFTs, filters, and digital drop receivers (DDRs) at reasonable cost

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Architecture

FPGA

FPGA FPGA

FPGA

FPGA

FPGAFPGA

FPGA

FPGA

FPGA

Network

Input

Output

FPGA

FPGA TCP/IP based configuration control,status, and data distribution

FPGAs contain DSPs

Plug and playdistributed solutions

Scalability is not limitedby chassis boundaries

Combined hardware andSoftware solutions

Socket interface

Non-blocking GigabitEthernet switch

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Processes can be located anywhere on the network…

Input

Output

=

=

Socket Interface

Process or Application(software and/or hardware)

Application Program Interface (API)

NetworkNon-blocking Gigabit

Ethernet switch

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Network based application framework…

FPGA

FPGA FPGA

FPGA

FPGA

FPGAFPGA

FPGA

FPGA

FPGA

Network

Input

Output

FPGA

FPGA TCP/IP based configuration control,status, and data distribution

FPGAs contain DSPs

Plug and playdistributed solutions

Scalability is not limitedby chassis boundaries

Combined hardware andSoftware solutions

Embedded socketbased agent


FPGA Application HW/SWAPI

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Most devices support the Ethernet standard…

FPGA

FPGA

FPGA FPGA

FPGA

Control&

Status

OutputInput NAS

Server

FPGA


Network

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StreamBladeTM Signal Processing (Electrical I/O)

Network

FPGAFPGA FPGAInput Output

FormatDemodTune


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StreamBladeTM Signal Processing (Ethernet I/O)

FPGAFPGA FPGA

Input Output

FormatDemodTune


Network

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StreamBladeTM Signal Processing (Hybrid I/O)

FPGAFPGA FPGAInput

Output

FormatDemodTune


Network

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StreamBladeTM ScalabilityStreamBladeTM Scalability

NetworkSwitch

A

NetworkSwitch

BFPGA

FPGA

FPGA

FPGA

FPGA

FPGA

FPGA

FPGA

FPGA

Input

Output

Today Foundry and Cisco provide non-blockingGigabit Ethernet switches with up to 500 ports

FPGAFPGA

FPGA

FPGA

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Products

FPGA

FPGA

XilinxVirtex-4FX60

XilinxVirtex-4FX60

SOE-4

1 Gig-E

1 Gig-E

1 Gig-E

1 Gig-E

40

40

40

40ATA

ATA

ATA

ATA FPGA

FPGA

XilinxVirtex-4LX100

XilinxVirtex-4LX100

SOE-2-2V4

1 Gig-E

1 Gig-E

40

40ATA

ATA FPGAXilinx

Virtex-4FX60

Note: ESD is developing a family of StreamBladeTM Single BoardComputers (SBCs). The SOE-4-PCI and SOE-2-2V4-PCI are thefirst to be developed.

4 channel Stream Offload Engine (SOE) 2 channel Stream Offload Engine (SOE) with 2 Virtex-4 Application FPGAs

SOE-2 boards are available withthe following Xilinx Virtex-4application FPGAs:

LX(40, 60, 80, 100, 160),SX(55)

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Two Independent Stream Offload Engines (SOEs)

PHY

PHY

FPGAVirtex-4

FX60

DDRSDRAM

ZBTSRAM

DDRSDRAM

ZBTSRAM

1 Gig-E

1 Gig-E

40

40

Data

Data

• Each SEOTM is implemented by:– ½ Xilinx Virtex-4 FX60; 8MB

ZBT SRAM; 128MB DDR SDRAM

– (10BaseT/100BaseTX/1000BaseTX) PHY

– RJ-45 Ethernet connector with link status LEDs

– RS-232 Monitor Port; Status LEDs

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SOE Technology

The Stream Offload Engine (SOETM) is at the core of the Embedded Systems Design, Inc. (ESD) StreamBladeTM family of single board computers. StreamBladeTM single board computers utilize ESD’s SOETM technology to provide zero-copy, full TCP/IP offload, and 10/100/1000 Ethernet connectivity between the application FPGAs and external real-time streaming data processing nodes. ESD’s SOETM technology acts to decouple real-time streaming data source and sink processing nodes allowing real-time processing jitter to occur without data loss. When necessary, it is possible to run data distribution service (DDS) source/sink agent software on the PPC405 inside the SOETM.

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J1

J2

J7 J9

SOE-4-PCI J6 J8

J3

J4

PCI

CPLD

FLASH

J5

PHY

PHY

FPGAVirtex-4

FX60

DDRSDRAM

ZBTSRAM

DDRSDRAM

ZBTSRAM

PHY

PHY

FPGAVirtex-4

FX60

ZBTSRAM

ZBTSRAM

DDRSDRAM

DDRSDRAM

Local Bus

U10

U1

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SOE-4-PCI

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P1

P2

P5

PHY

PHY

CPLDFLASH

PCI

ApplicationFPGA#1Virtex-4

ZBTSRAM

FPGAVirtex-4

FX60

DDRSDRAM

ZBTSRAM

ApplicationFPGA#2Virtex-4

P3 P4

DDRSDRAM

ZBTSRAM

ZBTSRAM

SOE-2-2V4-PCI

Local Bus

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SOE-2-2V4-PCI

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Foundation Tools:

ESD StreamBedTM firmware is provided with each board. The StreamBedTM firmware CD includes a Bootloader, Flash Burner, and StreamBladeTM Diagnostics. Developers may download and run applications, test StreamBladeTM hardware, and burn images to Flash via Ethernet, serial port, or the PCI bus.

ESD StreamBedTM software is provided with each board. The StreamBedTM software CD includes executable Linux and Windows device drivers. The drivers provide the host computer, via the PCI bus, the ability to control and receive status from one or more StreamBladeTM single board computers. ESD StreamBedTM software comes complete with device driver documentation, driver source code, pre-compiled driver images, and driver build files for StreamBladeTM single board computers. Contact ESD for more information:

www.ESD-StreamBed.com

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Application Development:

A Xilinx Virtex-4 FX60 BSP is available from ESD. The BSP development CD comes complete with documentation, source code, pre-synthesized designs, and project files. Sample applications demonstrate how to interface user configurable I/O from a 40 Pin ATA connector with a Stream Offload Engine (SOE).

Xilinx development tools and the Xilinx Embedded Development Kit (EDK) are available from Xilinx. Contact Xilinx for more information:

www.Xilinx.com

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• Full Stream Offload Engine (SOE)• Plug-In Data Distribution Service (DDS)• Conversion of configurable I/O Input to Data Distribution Format• Conversion of Data Distribution Format to configurable I/O Output• Equipment Control via 40pin ATA or RJ-45 connectors• Network: Bridge, Monitor, and Test• Software Based Radio Applications

– Digital Drop Receiver (DDR); Demod; and Demux– Adaptive Beam Forming– Interference Mitigation; Direction Finding

• Protocol Processing; Filtering & Selection• Data Generation; Data Recording; Data Playback

Applications

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SOE-4-PCI Application Example

StreamBladeTM

SOE-4

PCI

ATA

ATA

Each SOE is implementing an embedded DDS Source/Sink Agent making the Gig-E interfacesDDS compliant. Each Gig-E interface may be carrying real-time streaming data channels withan aggregate rate exceeding 80 E1s with multi-casting enabled.

ATA

ATA

Other Vendor PCI Card




Gig-E

Bits

Bits

Bits

Bits

DDSNetwork

Gig-E

Gig-E

Gig-E

(Data)

(Data)

(Data)

(Data)

Host

(Control, Status, Config, Power)

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SOE-2-2V4-PCI Application Example A



StreamBladeTM SOE-2-2V4(Using application FPGAs

independently)

PCI

ATA

ATA

DDSNetwork

Gig-E

Gig-E

Each SOE is implementing an embedded DDS Source/Sink Agent making the Gig-E interfacesDDS compliant. Each Gig-E interface may be carrying real-time streaming data channels withan aggregate rate exceeding 80 E1s with multi-casting enabled.

(Data)

(Data)

Host


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SOE-2-2V4-PCI Application Example B


StreamBladeTM SOE-2-2V4(Using cross wired application

FPGAs)

PCIATA

DDSNetwork

Gig-E

In this application both application FPGAs are required to process the data from the othervendor card. The SOE is implementing an embedded DDS Source/Sink Agent making theGig-E interface DDS compliant. The Gig-E interface may be carrying real-time streaming datachannels with an aggregate rate exceeding 80 E1s with multi-casting enabled.

Host


(Data)

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SOE-2-2V4-PCI Application Example C


StreamBladeTM SOE-2-2V4(Using application FPGAs

independently)

PCIATA

DDSNetwork


ATA

Each SOE is implementing an embedded DDS Source/Sink Agent making the Gig-E interfacesDDS compliant. Each Gig-E interface may be carrying real-time streaming data channels withan aggregate rate of 80 E1s.

16 E1s

16 E1s

4 E3s

4 E3s

Gig-E

Gig-E

Host


(Data)

(Data)

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SOE-4 and SOE-2 Architecture Example

FPGA

FPGA

FX60

FX60

SOE-4

FPGA

FPGA

Application

Application

SOE-2

FPGAFX60

Network

ADC

ADC

RX

RX

TUNE

TUNE

TUNE

TUNE

DEMOD

DMOD

DMOD

DMOD

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SOE-2 Architecture Example

Network

ADC

ADC

FPGA

FPGA

Application

Application

SOE-2

FPGAFX60

Format

FPGA

FPGA

Application

Application

SOE-2

FPGAFX60

Demod

FPGA

FPGA

Application

Application

SOE-2

FPGAFX60

Tune

X

X

X

X

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No longer limited by chassis boundaries…

48 PortNon-Blocking

1 Gigabit EthernetNetwork Switch

FPGA

FPGA

Application

Application

SOE-2

FPGAFX60FPGA

FPGA

Application

Application

SOE-2

FPGAFX60FPGA

FPGA

Application

Application

SOE-2

FPGAFX60FPGA

FPGA

Application

Application

SOE-2

FPGAFX60FPGA

FPGA

Application

Application

SOE-2

FPGAFX60FPGA

FPGA

Application

Application

SOE-2

FPGAFX60FPGA

FPGA

Application

Application

SOE-2

FPGAFX60FPGA

FPGA

Application

Application

SOE-2

FPGAFX60FPGA

FPGA

Application

Application

SOE-2

FPGAFX60FPGA

FPGA

Application

Application

SOE-2

FPGAFX60FPGA

FPGA

Application

Application

SOE-2

FPGAFX60FPGA

FPGA

Application

Application

SOE-2

FPGAFX60

FOPFOP

FOP

The “Network” is the: Bus, Computer, and Signal Processing System…

12 SlotPassive PCI

Backplane Chassis

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POC Contact Information

• Mark Wecht - President– [email protected]

• Jeff Clements – Vice President– [email protected]

• Scott Wecht – Vice President Product & Research– [email protected]

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Corporate Contact Information

This material is the Copyright of Embedded Systems Design, Inc. 1996-2007. ESD, StreamBlade, StreamBed, StreamServer, StreamHunter, and Stream Offload Engine (SOE) are Trademarks. Other company and product names may be trademarks of their respective owners.

Contact Embedded Systems Design, Inc. sales:

www.Embedded-Sys.com

www.ESD-StreamBlade.com

Phone: (410) 712-7290

Embedded Systems Design, Inc.

6810 Deerpath Road

Suite 300

Elkridge, Maryland 21075

USA

StreamBlade TM Architecture Introduction To The StreamBlade TM Architecture Rev 1.2.

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