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PC PeripheralsforTechniciansChapter 2.1 -
Storage: Floppy Drives
Systems Manufacturing Trainingand Employee Development
Copyright 1998 Intel Corp.
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Storage:
Floppy DrivesOBJECTIVES: At the end of this section, the
student will be able to do the following:
Describe the components of the Diskette Sub-system
Describe the floppy disk drive interface cables.
Discuss the Floppy Disk Controller registers and list
the FDC I/O addresses.
List the sequence of operations in a DMA Transfer.
Discuss floppy diskette BIOS INT 13h support.
Explain the structure of DOS and the MS-DOS floppy
boot process.
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Block Diagram of Floppy Sub-system
Inputs: Rd, Wr, A[0:2],
TC, CS, RST, DACK2, etc.
Outputs: DRQ2, IRQ6, etc.
Bi-Dir: DB[7:0]
Bus I/F Logic
Inputs: RdData, DskChg,
INDX, WrProt, TRK0, etc.
Outputs: WrData DrvSel,
Step, HdSel, DenSel, etc.
Drive I/F Logic
FDC (Floppy Disk Controller)
Host
Bus
Interface
Logic
ControlRegister
Status
Register
Drive
Interface
Logic
Floppy
Drive(s)
System
Bus
(e.g. ISA)
Floppy Drives are accessed through the FDC and not directly by the CPU.
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Floppy Disk Sub-system: Diskette
360K (Double Density) was the PC/XT format.
5.25 inch, 1.2 Meg format (High Density) wasintroduced by IBM with the PC/AT in 1984.
3.5 inch, 720K disk (Double Density) was introducedby IBM in its first PS/2 computers in 1987.
3.5 inch, 1.44 Meg Disk (High Density) is now the"new" industry standard.
3.5 inch, 2.88 Meg format (Extra Density) was
introduced by IBM but has not been used much.Note: There is also a Density Select output from the FDC to the
drive (Pin 2) that refers to data transfer rates (e.g. 500Kbps) whichis different than the Recording Density (e.g. Double, High, Extra).
0=Low Density: 250-300 Kbps; 1=High Density: 500Kbps -1 Mbps
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Floppy Disk Sub-system: Head
The head reads or writes magnetically encoded
patterns (serial bit streams) that represent digital data.There are two heads so data is stored on both sides of
the diskette--heads are numbered 0 and 1.> Note: The first IBM PC's used a single sided floppy disk drive.
As the disk rotates under the write-head, a small currentis applied to the coil in the disk head.
Spots of the disk metallic oxide become magnetized andthus "remember" the magnetic field which was imposed.
Reading is essentially the writing process in reverse. Magnetic spots on the disk create protruding magnetic fields
and a small electric current is induced in the head.
A sensitive Read Amplifier boosts this signal up to useable
strength for interpretation as the data stored on the disk.
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Floppy Disk Sub-system: Track
The area of the disk that passes under a single head
during one complete spin of the disk traces a circle.Data is recorded in concentric circles called tracks or
cylinders.
The terms are often used interchangeably, but track
traditionally refers to a single ring on one side of a disk, andcylinder refers to a stack of tracks.
The positioning of the heads from track to track by astepper motor is called seeking.
Tracks are numbered sequentially, starting with theoutermost track (track 0) and can be a maximum of either39 or 79 per side (40 or 80 tracks).
The head is recalibrated (moved to track 0) by issuing the
recal command to the FDC.
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Floppy Disk Drive Interface
Floppy Drives normally use two cables
4-wire Powercable.5.25 inch drives require a +12 volt and a +5 volt supply
Current 3.5 inch drives only require a +5 volt supply.
34-wireControl/Data
cableThe Control/Data connector, at the floppy controller is
dual-row pin type connector (2X17).
The Control/Data connector at the floppy drive is a card-
edge type for 5.25" drives, and a mixture of pin or card-edge types for 3.5" drives
NOTE: Pin #1 on any drive cable SHOULD be indicatedby a coloredstripe.
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Floppy Disk Drive InterfaceController Drive-2 (B:) Twist Drive-
1(A:) - After the Twist
|::|===================|::|========x=======|::|1 Ground 18 Head direction
2 Density select (Data Rate) 19 Ground
3 Ground 20 Step
4 Not connected 21 Ground
5 Key (pin missing) 22 Serial Write data6 Extended density in 23 Ground
7 Ground 24 Write enable
8 Index 25 Ground
9 Ground 26 Track 0
10 Motor A on 27 Media Sense 0
11 Ground 28 Write protect12 Drive B select 29 Ground
13 Ground 30 Serial Read data
14 Drive A select 31 Ground
15 Ground 32 Head select side 1
16 Motor B on 33 Ground
17Media Sense 1 34 Disk change
A twist in the 34-wire
cable between wires 10
and 16 just before the
connector for drive 1,
transposes the controlsignal between one drive
and the next.
If only one drive (A:) is
used , leave middle
connector free.Details next pages.
Media Sense Pins 17, 27--Drive outputs to indicate type of media installed (720k, 1.44M, etc)
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Floppy Disk Drive Interface
IBM devised a method to eliminate having to change
floppy drive jumpers on the assembly line. Floppy disk drive select jumpers configure the drives
as either the 1st (jumper= 0) or 2nd (jumper= 1) drive.
Most PC's use a standard cable where both drives are
jumpered as the 2nd drive (Physical Drive 1).Adding the twist in the the 34-wire cable between wires
10 and 16 effectively changes the drive number settingon the floppy drive after the twist from Physical Drive 1
(B: 2nd drive) to Physical Drive 0 (A: 1st drive). If only A: drive is used, leave the middle connector free.
Note: Some O/Ss allow a single physical drive to
appearlogically as both A: and B:
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Floppy Disk Controller: Overview
The FDC incorporates a PLL, microcontroller, a data
separator, and drive, host & serial interface logic.The FDC architecturally resides on the ISA bus.
The FDC is typically clocked by a single 24 MHz signal.
The FDC can be reset by hardware or software
The FDC controls all communications & data bustransfers between the system bus & the floppy drives(s).
FDC interface consists of an 8-bit bi-directional data
bus & several registers.
Data transfers to/from the FDC are controlled by theDMA controller.
The FDC is hardwired to DMA Channel 2 (DRQ2, DACK2)for compatibility with the IBM-defined standard.
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Floppy Disk Controller: Registers
The FDC receives commands, transfers data, and
returns status information using CPU I/O read & writeoperations to the FDC registers.
FDC I/O addresses are 3F2, 3F4, 3F5 & 3F7
3F2 = Digital Output Reg [control]; 3F4 = Main Status Reg
3F5 = Data Reg [FIFO]; 3F7 = Digital Input Reg.
Note: Register support and use vary by platform.
Ports 3FO & 3F1 used by some systems.
Detailed FDC register description and programming isbeyond the scope of this course.
Techs may find the following registers (which apply to allsystems) useful for debugging floppy problems.
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Floppy Disk Controller: Registers
FDC Digital Output Register (DOR) at port 3F2h
Controls drive motors & drive selection Note: All DOR bits are cleared during controller reset
Bit 0 & 1: floppy drive select (0=A, 1=B, 2=floppy C, ...)
Bit 2: 1 = FDC enable, 0 = FDC reset
Bit 3: 1 = DMA & I/O interface enabled
Bit 4: 1 = turn floppy drive A motor on
e.g. Writing 10h to port 3F2 turns on Drive A: motor
> Software may write 0C to turn off motor(s)--Bits 2 & 3 enabled.Bit 5: 1 = turn floppy drive B motor on
Bit 6 & 7 used for Floppy C & D on older systems.
Most systems only support 2 drives (A & B).
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Floppy Disk Controller: Registers
FDC Digital Input Register at 3F7h (Read only)
Returns the state of the diskette change line whichsignals when the door is open.
Bit 7:0 = Present & not changed; 1= Diskette changed
Software uses the change line to know that a disk may
have been changed by reading Port 3F7 bit 7. Then the O/S does not have to access the FAT on the
floppy disk to recognize that a new disk has been inserted.
> Note: Use an O/S such as DOS to access the diskette to seethis bit change.
Only bit 7 of Port 3F7 is used in PC/AT mode.
Note: Port 3F7 is sharedby the hard disk controller on thePC/AT which returns information on the lower 6 bits.
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Floppy Disk Controller: Operation
Overview of a read operation:
Turn disk motor on and set delay time for drive spin up Perform seek operation; wait for disk interrupt (IRQ 6)
Prepare DMA chip to move data to memory
Send read cmd; wait for xfr complete interrupt (IRQ 6)
Read status information
Turn disk motor off
Note: These tasks are usually performed by the O/S
[Operating System] and/or the BIOS using INT 13h.See following pages for description of BIOS INT 13h.
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DMA Transfer Example : Floppy Read
1) When the floppy controller reads data from thediskette, it requests a transferby raising the DMArequest line (DRQ2) to the DMAC.
2) The DMAC responds by asserting (PCI) Hold Request(PHOLD# on the 82430 Chip-set)
3) When the bus is granted to the DMAC, Hold Ack. isasserted (PHLDA# on the 82430 Chip-set).
4) The DMAC asserts the DACK2# signal to notify theFDC that the transfer cycle is now started.
The #DACK is effectively the device select and is similar toan I/O address decode for the selected device.
The FDC now deasserts DRQ2 because the DMA controlleris servicing the data transfer request.
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The Structure of DOS
Interrupt VectorTable
BIOS DATA
DOS DATA
I/O . SYS
Non-resident BIOS
COMMAND.COMCommand Processor
MSDOS . SYS
Kernel
0000h
0400h
0500h
256K
512K
A0000h
640K
~0700h
~12F0h
~2740h
~5DD0h / FB10h
DEVICE DRIVERS
BOOTLOADER
@7C00h
64K
128K
COMMAND.COM
Transient
Command Processor
Look at the structure of MS-DOS before describing the DOS Boot Process.
Note: Addresses will
vary depending on
DOS Version!
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The Structure of DOS
APPLICATIONS
O/S: [BIOS / KERNEL /COMMAND PROCESSOR]
SYSTEM BIOS(RESIDENT)
HARDWARE
The PC/AT has a layered operating system.
The O/S serves as an interface between the Application
Program (Word, Excel, etc) and the Hardware.
SYSTEM BIOS provides low-level interaction with the hardware.
DOS has a hierarchical structure.
Three layers isolate the user and the
application program from the hardware.
>Non-resident BIOS
>IO.SYS or IBMBIO.COM
>Kernel
>MSDOS.SYS or IBMDOS.COM
>Command processor
>COMMAND.COM
IO.SYS & MSDOS.SYS "Hidden" & "ReadOnly" so they can't be deleted from the disk.
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Th S f DOS
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The Structure of DOS
The third component is the Command Processor.
In MS-DOS this file is called COMMAND.COMThis is the shell that contains all of the internal DOS
commands, produces the familiar A:\> or C:\> prompt,and carries out user commands.
On a floppy disk, the BOOT SECTOR is located inlogical sector 0 (Sector One of Track Zero, Side Zero).
The Boot Sector is only 512 Bytes long and contains:
A record of the disks format.
A Boot Strap Loader program which reads the bulk of theoperating system (IO.SYS, MSDOS.SYS, & COMMAND.COM) intomemory from elsewhere on the disk and then to transferscontrol to the operating system.
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MS DOS BOOT PROCESS (C t )
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MS-DOS BOOT PROCESS (Cont.)
The major sections in the BOOT SECTOR are:
The first byte in the boot sector is an x86 jump instruction(i.e. eb 3c) to the bootstrap code in the final section.
The next section is where an OEM software manufacturers
name and version can be found (e.g. - MSDOS5.0.)
The next section contains information about the disks
physical characteristics which is needed by MS-DOS.
The final section in the boot sector contains the diskbootstrap (starts at offset 3Eh and ends at offset 19Dh forthe version of DOS shown.)
The last 2 bytes (1FE & 1FF) of the boot sector contain the55AAh signature to indicate that the data in the boot sectorrepresents a bootstrap program.
MS DOS BOOT PROCESS (C t )
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MS-DOS BOOT PROCESS (Cont.)
A high level view of the process of loading DOS
1 - Power up and run POST.The remaining steps are accomplished at the end of
POST and are the beginning of the O/S Boot process.
The Bootstrap Loader interrupt is invoked via the INT 19h
instruction imbedded in the System BIOS EPROM's.> The Boot Strap Loader is a very simple program used with
the BIOS ROM to load the O/S from the boot disk.
2 - System BIOS reads the disk boot sector (track 0,
head 0, sector 1) into system memory at 0000:7C00h,then transfers control to that address.
If no boot sector is found on the primary boot device,BIOS looks for a boot sector on a secondary boot device
if present.
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MS DOS BOOT PROCESS (C t )
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5 - Program control is then transferred from the
bootstrap loader to IO.SYS. 6 - IO.SYScalls MSDOS.SYS.
MSDOS.SYS initializes interrupt vectors used by DOS.
DOS primarily uses vectors 20h, 21h, 25h, 26h, & 27h.
7 - MSDOS.SYS checks to see if a CONFIG.SYS fileexists.
If CONFIG.SYS exists, modify DOS parameters & installuser-specified device drivers (i.e. DEVICE=ANSI.SYS)
Otherwise, use default DOS parameters.
8 - IO.SYS loads COMMAND.COM as the default shell(Command Interpreter).
MS-DOS BOOT PROCESS (Cont.)
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REVIEW & SUMMARY
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REVIEW & SUMMARY
FDC (Floppy Disk Controller)
Host
Bus
Interface
Logic
ControlRegister
StatusRegister
Drive
Interface
Logic
Floppy
Drive(s)
System
Bus
Floppy Drives are accessed through the FDC and not directly by the CPU.
1. Drive head
2. Track
3. Sector
2
3
Each track is divided into
individually addressable sectors
REVIEW & SUMMARY
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REVIEW & SUMMARY
WE HAVE DISCUSSED THE FOLLOWING:
The components of the Diskette Sub-system
The FDC controls all communications & data transfersbetween the system bus & the floppy drives(s).
3.5 1.44 Meg (High Density) is the industry standard.
The floppy disk is rotated only when accessed & thehead stays in physical contact with the disk medium.
The head assembly is moved by a stepper motor, and thereis no feedback on where the head is on the disk.
Data stored on both sides of the disk--heads #0 & #1.
Data is recorded in concentric circles called tracks.
Each track is divided into equal size sectors--512 bytes.
REVIEW & SUMMARY
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REVIEW & SUMMARY The floppy disk drive interface cables.
4-wire Power cable. +12 volt & +5 volt supply.34-wire Control/Data cable--twist between wires 10 & 16
changes the drive number after the twist from B to A.
If only one drive (A:) is used , leave middle connector free.
Floppy Disk Ctlr registers & the FDC I/O addresses.
The FDC architecturally resides on the ISA bus, consistsof an 8-bit data bus, control signals, & several registers.
The FDC receives commands, transfers data, & returns
status information using CPU I/O read & writeoperations.
FDC operations are processed in phases:
1-Command; 2-Execution; 3-Result; 4-Idle phase.
REVIEW & SUMMARY
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REVIEW & SUMMARY The sequence of operations in a DMA Transfer.
FDC requests a transfer by raising DRQ2.Bus arbitration--PCI Hold Req (PHOLD#) & PHLDA#.
DACK2# from DMAC to FDC.
Mem address put on the bus; activate #IOR & #MEMW.
1 byte transferred; PHOLD# & DACK2# deasserted.
After 512 bytes transferred, DMAC sends TC to the FDC.
FDC activates IRQ6 (results phase).
Floppy Drive motor shut off by IRQ0 ISR. The floppy diskette BIOS INT 13h support.
INT 13h Function 2 reads specified sector(s) and storesthe data in a memory buffer at address ES:BX.
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