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STK526 Rev. B ..............................................................................................

Hardware User Guide

STK526 rev. B Hardware User Guide 1

7709B–AVR–07/08

Section 1Introduction ........................................................................................... 1-2

1.1 Overview ...................................................................................................1-21.2 STK526 - AT90USB82/162 Starter Kit Features.......................................1-3

Section 2Using the STK526................................................................................. 2-5

2.1 Overview ...................................................................................................2-52.2 Power Supply ............................................................................................2-62.3 RESET ....................................................................................................2-102.4 AT90USB82/162 AVR Microcontroller ....................................................2-112.5 Serial Links .............................................................................................2-112.6 On-board Resources...............................................................................2-152.7 STK500 Resources.................................................................................2-172.8 In-System Programming .........................................................................2-182.9 Debugging...............................................................................................2-222.10 Test Points ..............................................................................................2-232.11 Configuration Pads .................................................................................2-242.12 Solder Pads ............................................................................................2-25

Section 3Troubleshooting Guide ....................................................................... 3-26

Section 4Technical Specifications ..................................................................... 4-28

Section 5Technical Support ............................................................................... 5-29

Section 6Complete Schematics......................................................................... 6-30

6.1 Document Revision History.....................................................................6-386.2 7709B......................................................................................................6-38

Section 1Introduction

Congratulation for acquiring the AVR® STK526 - AT90USB82/162 Starter Kit. This kit isdesigned to give designers a quick start to develop code on the AT90USB82/162 andfor prototyping and testing of new designs.

1.1 Overview

This document describes the STK526 dedicated to the AT90USB82/162 AVRmicrocontroller. This board is designed to allow an easy evaluation of the product usingdemonstration software. This document applies to the revision B of the board.

To complement the evaluation and enable additional development capability, theSTK526 can be plugged into the Atmel STK500 Starter Kit Board in order to use theAT90USB82/162 with advanced features such as variable VCC, variable XTAL, ParallelProgramming, and supports all AVR development tools.

It can also receive extension modules that Atmel or 3rd parties may release in future orthat customers can develop for their projects.

To increase its demonstrative capabilities, this stand alone board has several on-boardresources : USB, RS232, joystick, data-flash, LEDs.

STK526 rev. B Hardware User Guide 1-2

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Introduction

Figure 1-1 . STK526 Board

1.2 STK526 - AT90USB82/162 Starter Kit Features

The STK526 rev. B provides the following features:

AT90USB82/162 TQFP device (2.7V<Vcc<5.5V)

AVR Studio® software interface (1)

USB software interface for Device Firmware Upgrade (DFU bootloader) (2)

STK500 compatible (supports Parallel High-Voltage Programming)

Power supply flagged by “POWER-ON” LED:– from an external power connector, with a 3.3V or 5V regulation– from the USB interface (USB device bus powered application)– from STK500– using or not the 3.3V on-chip regulator of AT90USB82/162

ISP connector :– for on-chip ISP– for on-chip debugging using JTAG ICE and debugWire protocol

Serial interfaces:– 1 USB full speed device interface– RS-232C ports with RTS/CTS handshake lines

On-board resources:– 4-ways + 1-select joystick– 4 LEDs– serial 8Mo dataflash memory

On-board RESET button

On-board HWB button for force bootloader execution at reset.


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Introduction

System clock:– external clock from STK500 expand connectors– 8 MHz crystal

Numerous access points for test

Notes: 1. The STK526 is supported by AVR Studio®, version 4.12SP2 or higher. For up-to-dateinformation on this and other AVR tool products, please consult our web site. The lat-est version of AVR Studio®, AVR tools and this User Guide can be found in the AVRsection of the Atmel web site, http://www.atmel.com.

2. ATMEL Flip®, In System Programming Version 3 or Higher shall be used for DeviceFirmware Upgrade. Please consult Atmel web site to retrieve the latest version of Flipand the DFU bootloader Hex file if needed.

1-4 STK526 rev. B Hardware User Guide

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Section 2Using the STK526

This chapter describes the board and all its features.

2.1 Overview

Figure 2-1 . STK526 Overview

USB RS232SPI / debugWire

Power

Crystal

Joystick

ResetHardware Boot

LEDs

Dataflash

Vcc Source

3V3 Reg


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EXT (JACK)

VBUS

STK500

5V

3V3

AT90USBxx2

Vsource

(VCC SOURCE)

Internal3V3 100mARegulator

(1) (2)

UV

cc

Vcc

Uca

p

NOREG INTREG

REG5V

REG3V3

VBUS

STK

(3V3 REG)

PO

WE

R-O

N

1µF

2.2 Power Supply

The on-board power supply circuitry allows different power supply configurations.Because the AT90USB82/162 contains an internal 3V3 regulator that can be used topower an external circuitry, several power configurations are handled by the STK526.The power path is represented by the figure below :

Figure 2-2 . STK526 Power Configuration

First, the board allows to drain power from three external sources, leading to fourdifferent solutions. The selected voltage is applied to the regulator input of theAT90USB82/162. Then the user can choose to power the MCU I/O either directly withthe primary power source (external 5V/3V3), or from the internal regulator itself (MCUauto-power).

2.2.1 Power Supply Sources

The power supply can come from three different (1) sources:

USB connector,

JACK PWR connector (J5, See Figure 2-3),

STK500

USB powered: When used as a USB device bus powered application, the STK526 can be powered viathe USB VBUS power supply line.

JACK PWR connector: – Use the JACK outlet provided with the kit (See Figure 2-4)– Input supply from 9 up to 15V (2) DC,– No specific polarization (3) is required.


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Figure 2-3 . JACK PWR Connector (J6)

Figure 2-4 . Male JACK Outlet and Wires

STK500 Powered: (c.f. “STK500 Resources” on page 17).

Notes: 1. Caution: Do not set more than one power supply source on STK526.2. 15V is the maximum level limitation of an unidirectional transit diode.3. There is a diode (bridge) voltage drop between the negative output of the power

supply and the STK526 “GND”. This could introduce some gap of voltage duringmeasurement and instrumentation.

+-


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2.2.2 Power Source Setting

Table 2-1 . Power Supply (1) Setting

Notes: 1. Caution: The STK500 has its own “ON/OFF” switch

Vcc SourceJumper position

VCC powersupply value

Comments View

VBUSVBUS

(4,8V to 5.2V)

This is the default configuration.This should be used for a typical USB device “bus powered” application.In this mode, the STK526 is powered directly from the USB bus, and no other external power supply is required.

REG 5V 5V

This configuration can be used for a USB “self powered” device application”.

To use this configuration an external power supply must be connected to J5 connector. The on-board 5V regulator is used.

REG 3V3 3.3V

This configuration allows the STK526 to be used in a 3V range application.

To use this configuration an external power supply must be connected to J5 connector. The on-board 3V3 regulator is used.

STK & REG 5VDepends on STK500 VTG

setting

This configuration allows the STK526 to be used with an STK500 board.In this mode, the STK526 power supply is generated and configured according to the “VTG” parameter of the STK500 (1).Caution : NO external power supply must be connected to STK526 to avoid conflict with STK500 power supply.

VCCSource

Reg 5

Reg 3.3

VBUS 5

STK

VCCSource

Reg 5

Reg 3.3

VBUS 5

STK

VCCSource

Reg 5

Reg 3.3

VBUS 5

STK

VCCSource

Reg 5

Reg 3.3

VBUS 5

STK


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2.2.3 AT90USB82/162 Power Configuration Settings

This section applies to the following part of the power path diagram :

Figure 2-5 . MCU Power Configurations

Once the power source selected, the input of the AT90USB82/162 internal regulator(UVcc) is powered. Firmware has the responsability to enable or disable the regulator.Ucap is the output pin of the internal regulator, and Vcc is the core power input of theMCU. Several cases may be required by the user :

Vsource = 5V, Vcc = 5V: for this mode, the configuration switch (see figure above)must be in the position labelled “NOREG”. The MCU can still run a USB Deviceapplication if it enables the internal regulator that will power the USB pad and macro.

Vsource = 5V, Vcc = 3.3V: for this mode, the configuration switch must be in theposition labelled “INTREG”. The Vcc pin will be tied to the regulator output, so thatthe AT90USB82/162 itself will power itself from its regulator, and the I/O will be at3V3 level.

Vsource = 3.3V, Vcc = 3.3V: for this mode all the MCU power inputs are at the 3V3level. The configuration switch must be in the position “NOREG”. In normal operationit is recommended to tie all the power pins together (UVcc, Vcc, Ucap) and to disablethe regulator. However, the board configuration does not allow to tie together all thepower pins, so that the regulator must be enabled by firmware in order to power theUSB pad and macro (that can lead to some extra-consumption).

Table 2-2 . MCU Power Configuration Jumpers

AT90USBxx2

Vsource

)

Internal3V3 100mARegulator

(1) (2)

UV

cc

Vcc

Uca

p

NOREG INTREG(3V3 REG)

POW

ER-O

N

1µF

“3V3 REG”Jumper position

AT90USB16 I/O power supply Comments View

“NOREG” Primary power sourceThis is the default configuration.

“INTREG” Internal regulator

This configuration is relevant with a 5V primary powered application requiring I/O levels at 3.3V on the AT90USB82/162.

3V3 REG

NO

REG

INTR

EG

3V3 REG

NO

REG

INTR

EG


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2.2.4 “POWER-ON“ LED

The POWER-ON LED is lit whenever power is applied to STK526 regardless of thepower supply source and the voltage settings.

Figure 2-6 . “VCC-ON” LED

2.3 RESET

Although the AT90USB82/162 has its on-chip RESET circuitry (c.f. AT90USB82/162Datasheet, section “System Control and Reset), the STK526 provides theAT90USB82/162 a RESET signal which can come from 3 different sources:

2.3.1 Power-on RESET

The power supply rise will conduce to an on-chip power-on RESET.

2.3.2 RESET Push Button

By pressing the RESET push button on the STK526, a warm RESET of theAT90USB82/162 is performed.

Figure 2-7 . RESET Push Button (RST) Implementation

2.3.3 STK500 RESET

See Section 2.7.4, page 18.


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2.4 AT90USB82/162 AVR Microcontroller

2.4.1 Main Clock XTAL

To use the USB interface of the AT90USBxxx, the clock source should always be acrystal or external clock oscillator (the internal 8MHz RC oscillator is not accurateenough to comply with the USB specification). Only the following crystal frequencyallows proper USB operations: 8MHz and 16MHz. The STK526 comes with a default8MHz crystal oscillator.

If STK526 is connected to an STK500 and the jumpers “STKX1” and “STKX2” are set,the STK526 microcontroller operates with the “STK500 Osc” frequency parameter. TheSTK500 clock prevails over the STK526 crystal.

Figure 2-8 . STKX1 and STKX2 jumpers on STK526

2.4.2 Analog Power Supply

AVCC AVCC is tied to VCC by hardware.

2.5 Serial Links

2.5.1 USB

The STK526 is supplied with a standard USB type-B receptacle (identifying the board asa Device only) that aims to receive a B-plug

Figure 2-9 . USB type-B receptacle


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VBUS Detection The board also implements a VBUS detection on a generic I/O. A low-power (50µA)voltage divider (/2) is connected from VBUS to PortC bit 2 pin. The VBUS presence isdetected with a high level on the MCU pin.

VBUS Power Source Moreover, even if not selected as primary power source, VBUS powers the on-board3.3V regulator (through a diode to avoid current being supplied to USB Host) in order toget 3V3 voltage in any condition (this allows to power the dataflash at any time, or toallow a USB Bus-powered operation with all the board at 3.3V.

However, this feature can make current flowing from VBUS to some board peripheralseven if an alternate power source is used to power the board. That may lead tounwanted extra-consumption, so it can be disabled by cutting the configuration pad.

Figure 2-10 . Configuration Pad Location

Note: See Section “Configuration Pads”, page 24 for details.


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2.5.2 RS-232C

The AT90USB82/162 is a microcontroller with an on-chip USART peripheral (USART1).Only the asynchronous mode is supported by the STK526.

The STK526 is supplied with a RS-232 driver/receiver. One female DB9 connectorprovides the RS-232 connections.

Figure 2-11 . RS-232 DB9 Connections

Figure 2-12 . Typical PC Connection Layout

1

RS-232 DB9 front view

pin 2

569

23478

RS-TxDpin 3 RS-RxD

pin 4pin 6

pin 5 GND

pin 7 RS-CTSpin 8 RS-RTS

STK526 / RS-232 DB9 PC / DB9 serial port

Pin No

(COM1 or COMx)

Function Pin No Function

2TxD (AT90USBxxx)

5GND

23

RxD (PC)TxD (PC)3RxD (AT90USBxxx)

5 GND

7CTS (AT90USBxxx) 78

RTS (PC)CTS (PC)8RTS (AT90USBxxx)

If Hardware Data Flow Control


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The STK526 USART implementation allows an optional hardware flow control that canbe enabled thanks to SP2, SP3, SP4, SP5 solder pads.

Figure 2-13 . USART Schematic

Note that the USART peripheral of the AT90USB82/162 includes an automaticHardware Flow Control feature that makes the operation transparent for the user.

Table 2-3 . UART Settings

Note: 1. Tx reference: STK526 source, Rx reference: STK526 destination

Figure 2-14 . RS232 Solder Pad Location

Mode Solder Pads Configuration

DB9Connection (1)

Software Data FlowControl

(default configuration)

SP2: openSP3: openSP4: openSP5: open

TxRx

Pin 2Pin 3

Optional Hardware Flow Control

SP2: closeSP3: closeSP4: closeSP5: close

TxRx

CTSRTS

Pin 2Pin 3Pin 7Pin 8

594837261

10

11

P1

SUB-D9 FEMALERS232

VCC

CTS

C13100nF

RTS

.11

.12

.10

.9

.8

.7

.13

.14

.15

.16

C1+1

V+2

C1-3

C2+4

C2-5

V-6

RS 232TTL

GND

VCC

U3

MAX3232RS232 BUFFER

C10

100nF

C9

100nFC11

100nF

C12100nF

RxDPD2

DECOUPLING CAPACITOR CLOSE TO THE DEVICE

RS-TxD

RS-RxD

PD[7..0]

VCC

SP4

SP5

PD7

PD6

PD3 TXDSP3

RS-CTS

SP2

RS-RTS

SP2SP3

SP4

SP5 SP2SP3

SP4

SP5


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2.6 On-board Resources

2.6.1 Joystick

The 4+1 ways joystick is convenient for developing input device (USB) application: itcan easily emulate mouse movements, keyboard inputs, etc.Closing a switch causes the corresponding signal to be pulled low, while releasing (notpressed) causes an H.Z state on the signal. The user must enable internal pull-ups onthe input pins, removing the need for an external pull-up resistors on the switch.

Figure 2-15 . Joystick Schematic

Figure 2-16 . Joystick Implementation

2.6.2 LEDs

The STK526 includes 4 green LEDs implemented on one line. They are connected tothe low nibble of “Port D” of AT90USB82/162 (PORTD[3..0]).

To turn ON one LED, the corresponding port pin must drive a high level. To turn OFFone LED, the corresponding port pin must drive a low level. It is the opposite methodused in STK500.

Figure 2-17 . STK526 LEDs

Select5

Lef t7

Up3

Right6

Down4

Com11

Com22

SW3

TPA511G

PB[7..0]

PB0PB4PB5PB6PB7

Select5

Lef t7

Up3

Right6

Down4

Com11

Com22

SW3

TPA511G

PB[7..0]

Select5

Lef t7

Up3

Right6

Down4

Com11

Com22

SW3

TPA511G

PB[7..0]

P


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Figure 2-18 . LEDs Implementation Schematic

2.6.3 Data Flash Memory

For USB Mass-storage class demonstration purposes, the STK526 provides an on-chipserial Flash memory (AT45DB642x) connected to the AT90USB82/162 Serial PortInterface (SPI).

The data-flash chip select signal is connected to PortC bit 2 of the AT90USB82/162(See Figure 2-19).

Figure 2-19 . On-board data flash schematic

Although the dataflash is 3.3V powered, it withstands without problem 5V level signals.

PD1

PD4

PD5

PD0

In-line Grouped LEDs

D0TOPLED LP M676

LED 0 (green)

D1TOPLED LP M676

LED 1 (green)

D2TOPLED LP M676

LED 2 (green)

D3TOPLED LP M676

LED 3 (green)

R11k

R21k

R31k

R41k

PD[7..0]

3.3V

U9

AT45DB642D CASON8

SI1

SCK2

RESET3

CS4

WP5VCC6GND7SO8

R12347k

PC2

C123

C8100nF

PB[7..0]

R1447k

3.3V

PB3

R1310k

PB2PB1


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2.7 STK500 Resources

Figure 2-20 . Connecting STK526 to the STK500 Board

Note: Caution: Do not mount an AVR microcontroller on the STK500 board when STK526 isplugged on STK500.

2.7.1 Supply Voltage from STK500

The AVR supply voltage coming from STK500 (VTG) can also be controlled from AVRStudio®.

The supply voltage coming from STK500 is controlled by power supply circuitry ofthe STK526. Refer to Table 2-1 on page 8 to configure “Vcc Source” jumper.

2.7.2 EXP.CON 0 & EXP.CON 1 Connectors


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Figure 2-21 . EXP.CON 0 and EXP.CON 1 Connectors

2.7.3 Main Clock from STK500

The AVR clock frequency (external) coming from STK500 (XT1/XT2) can also becontrolled from AVR Studio®.

“STKX1” and ”STKX2” jumpers should be closed

2.7.4 RESET from STK500

The AVR RESET coming from STK500 (NRST - EXP.CON 0) can also control theSTK526.

2.8 In-System Programming

2.8.1 Programming with USB bootloader: DFU (Device Firmware Upgrade)

AT90USB82/162 part comes with a default factory pre-programmed USB bootloaderlocated in the on-chip boot section of the AT90USB82/162. This is the easiest andfastest way to reprogram the device directly over the USB interface. The “Flip” PC-based application offers a flexible and user friendly interface to reprogram theapplication over the USB bus.

The HWB pin of the AT90USB82/162 allows to force the bootloader execution afterreset. (Please refer to AT90USB82/162 datasheet section “Bootloader support”). Toforce bootloader execution, operate as follows:

Press both “RST” and “HWB” push buttons

First release the “RST” push button

Then release the “HWB” push button

EXP. CON 1

GND GND1 2n.c. (AUXI0) n.c. (AUXO0)3 4

n.c. (CT7) n.c. (CT6)5 6n.c. (CT5) n.c. (CT4)7 8n.c. (CT3) n.c. (CT2)9 10n.c. (CT1) n.c. (BSEL2)11 12

n.c. REF13 14NRST PG215 16

PG1 PG017 18GND GND19 20

PC7 PC623 24VTG VTG21 22

PC5 PC425 26PC3 PC227 28PC1 PC029 30PA7 PA631 32PA5 PA433 34PA3 PA235 36PA1 PA037 38

GND GND39 40

GND GND1 2n.c. (AUXI1) n.c. (AUXO1)3 4n.c. (DATA7) n.c. (DATA6)5 6n.c. (DATA5) n.c. (DATA4)7 8n.c. (DATA3) n.c. (DATA2)9 10n.c. (DATA1) n.c. (DATA0)11 12

n.c. (SI) n.c. (SO)13 14n.c. (SCK) n.c. (CS)15 16

XT1 XT217 18VTG VTG19 20

PB7 PB623 24GND GND21 22

PB5 PB425 26PB3 PB227 28PB1 PB029 30PD7 PD631 32PD5 PD433 34PD3 PD235 36PD1 PD037 38

GND GND39 40

EXP. CON 0Top View


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For more information about the USB bootloader and FLIP software, please refer to the‘USB bootloader datasheet’ and ‘FLIP User Manual’.

2.8.2 Programming with AVR ISP mkII Programmer

The AT90USB82/162 can be programmed through SPI. This section explains how toconnect the programmer.

The Flash, EEPROM, all Fuses and Lock Bits can be programmed individually or withthe sequential automatic programming option.

Note: The SPIEN fuse must be enabled in AT90USB82/162 to allow ISP operation. TheSPIEN fuse is disabled when using debugWire channel (Section “Debugging”,page 22)

The AVR ISP mkII programmer is a compact and easy-to-use In-System Programmingtool for developing applications with AT90USB82/162. Due to the small size, it is also anexcellent tool for field upgrades of existing applications.

The AVR ISP programming interface is integrated in AVR Studio®.

To program the device using AVR ISP programmer, connect the 6-wire cable on the ISPconnector of the STK526 as shown in Figure 2-22.

Note: See AVR Studio® on-line Help for information.

Figure 2-22 . Programming from AVR ISP mkII programmer

2.8.3 Programming with AVR JTAG ICE


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The AT90USB82/162 can be programmed using ISP capability of the JTAGICE (usingthe connector adapter that comes with the programmer). This section explains how toconnect and use the AVR JTAG ICE.

Note: The SPIEN fuse must be enabled in AT90USB82/162 to allow ISP operation. TheSPIEN fuse is disabled when using debugWire channel (Section “Debugging”,page 22)

Figure 2-23 . Connecting AVR JTAG ICE to STK526

The Flash, EEPROM, all Fuse and Lock Bit options ISP-programmable can beprogrammed individually or with the sequential automatic programming option.

Note: See AVR Studio® on-line Help for information.

2.8.4 Programming with STK500

Serial Programming The AT90USB82/162 can be programmed using the serial programming mode fromSTK500 firmware. The software interface (In-System Programming of an external targetsystem) is integrated in AVR Studio®.

To program the device using ISP from STK500, connect the 6-wire cable between theISP6PIN connector of the STK500 board and the ISP connector of the STK526 asshown in Figure 2-20.

See Figure 2-20 to see connection example for ISP with STK500.


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Parallel High-VoltageProgramming

The STK526 is compatible with the Parallel Programming mode of the STK500. Theembedded RESET circuitry supports the HighVoltage pulses used during programming.

Once the STK526 is plugged into the STK500 Expand connectors, the followingconfiguration must be set before powering the boards :

On the STK526 :– set the primary power source (Vcc Src jumper) to STK and REG 5V– set the 3V3REG jumper to “NOREG”– mount the jumper STKX1 to enable the STK500 clock signal

On the STK500 :– connect the PROG_CTRL header (10 pts) to the PORTD header (10pts)– connect the PROG_DATA header (10 pts) to the PORTB header (10pts)– mount the following jumpers : VTARGET, RESET, XTAL1, BSEL2– mount a jumper on the position 1-2 (= right side) of the OSCSEL header

All the Flash memory, EEPROM, all Fuse and Lock Bit can be programmed individuallyor with the sequential automatic programming option.

Figure 2-24 . Connecting STK526 to STK500 for High Voltage Parallel Programming


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Figure 2-25 . STK526 Configuration for Parallel Programming

High Voltage Parallel Programming allows any operation on the device. This mode isvery usefull if a crucial fuse has been erased inadvertently. For example, if user disablesthe SPIEN fuse from ISP mode, it can only be restored using Parallel Programming.

2.9 Debugging

2.9.1 Debugging with AVR JTAG ICE mkII

Every STK526 can be used for debugging with JTAG ICE MK II using the debugWireprotocol through the ISP connector.

Connect the JTAG ICE mkII as shown in Figure 2-23 (like for a simple programmingoperation), for debugging help, please refer to AVR Studio® Help information.

As AT90USB82/162 parts are factory configured with the higher security level set, a chiperase operation will be performed on the part before debugging with JTAG ICE MK II.Thus the on-chip flash bootloader will be erased. It can be restored after the debugsession using the bootloader hex file available from ATMEL website or from the CD-ROM included in the starter kit.

Note: Starting a debugWire session will enable the DWEN fuse and disable the SPIEN fuse,that will prevent ISP programming. AVR Studio® can restore the SPIEN fuse before clos-ing a debugWire session. However the fuse bits can also be restored in ParallelProgramming mode.


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2.10 Test Points

There are 7 test points implemented, these test points are referred in the full schematicssection.

Config. Pads

ReferenceRelated Signals Function

TP1 D+ USB D+ data line

TP2 D- USB D- data line

TP3 3.3V 3.3V on-board regulated power supply

TP4 5V 5V on-board regulated power supply

TP5 Gnd Ground (measure reference)

TP6 VBUS USB Vbus power line

TP121 Ucap AT90USB82/162 internal 3V3 regulator output


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2.11 Configuration Pads

Configuration pads are used to disconnect/connect on-board peripherals or elements, theirdefault configuration is: connect.

2.11.1 Configuration Pads Listing

Table 2-4 . Configuration Pads

2.11.2 Configuration Pads - Disconnection

Figure 1. Configuration Pad - Disconnection

2.11.3 Configuration Pads - Connection

Figure 2. Configuration Pad - Re-connection

Config. Pads

Reference

Related Signals Function

CP121 VBUSConnect VBUS to the on-board 3V3 regulator. Cut to avoid extra-consumption from USB (in self-powered application only).

Cut Connection

WireDrop of solder


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2.12 Solder Pads

Solder pads are used to disconnect/connect on-board peripherals or elements, their defaultconfiguration is: disconnect. User may solder the pad to enable it.

2.12.1 Solder Pads Listing

Table 2-5 . Solder Pads

Solder. Pads

Reference

Related Signals Function

SP4 PD7 / CTS This solder pad allows to enable the logical CTS signal for hardware control flow on RS232 interface.

SP3 RS232 / CTS This solder pad allows to enable the physical CTS signal for hardware control flow on RS232 interface.

SP5 PD6 / RTS This solder pad allows to enable the logical RTS signal for hardware control flow on RS232 interface.

SP2 RS232 / RTS This solder pad allows to enable the physical CTS signal for hardware control flow on RS232 interface.


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Section 3Troubleshooting Guide

Figure 3-1 . Troubleshooting Guide

Problem Reason Solution

The Green “Power-ON” LED is not on

No power supply

Verify the power supply source level

Verify the power supply source selector

STK526 does not work Connect the DC power supply source, or USB interface or STK500.

The AT90USB82/162 cannot be programmed

STK500 Configuration not respected.

Connect ISP cable between STK500 and STK526. Check Parallel Programming hardware configuration on both STK500 and STK526.

The AVR ISP probe is not connected

Connect the AVR ISP 6-PIN header to the correct STK526 ISP header (page 19). Take care of polarity.

The AVR JTAG ICE probe is not connected

Connect the JTAG ICE 10-PIN header to the correct STK526 JTAG header (page 19). Take care of polarity.

The memory lock bits are programmed Erase the memory before programming

The fuse bits are wrongly programmed

Check the fuse bits (SPIEN, DWEN if previous operation was debugging).

Programming too fast with ISP SPI

Check oscillator settings and make sure it is not set higher than SPI clock

AVR Studio does not detect the AVR tool used

RS232/USB cable is not connected, or power is off

Connect the RS232 cable (STK500 - AVR ISP) and check power connections

Connect the USB (JTAG ICE MKII, AVR ISPmkIIl) and check power connections

PC COM port is in use

Disable other programs that are using PC COM port.

Change PC COM port

AVR Studio does not detect COM port.

Disable COM port auto-detection in AVR Studio file menu. Force COM port to the correct COM port


7709B–AVR–07/08

Troubleshooting Guide


7709B–AVR–07/08

Section 4Technical Specifications

System Unit– Physical Dimensions ................................................. L=119 x W=56 x H=27 mm– Weight ...........................................................................................................70 g

Operating Conditions– Internal Voltage Supply .....................................................................2.7V - 5.5V– External Voltage Supply ..........................................................9V -15V (100mA)– USB ...................................................................................4.4V -5.25V (100mA)

Connections– USB Connector .......................................................................Type-B receptacle– USB Communications ..................................................................Full speed 2.0

– RS 232C Connector .............................................................9-pin D-SUB female– RS 232C Communications Maximum Speed........................................ 250 kbps


7709B–AVR–07/08

Section 5Technical Support

For Technical support, please contact [email protected]. When requesting technicalsupport, please include the following information:

Which target AVR device is used (complete part number)

Target voltage and speed

Clock source and fuse setting of the AVR

Programming method (ISP, Parallel or specific Boot-Loader)

Hardware revisions of the AVR tools, found on the PCB

Version number of AVR Studio. This can be found in the AVR Studio help menu.

PC operating system and version/build

PC processor type and speed

A detailed description of the problem

Country and distributor or Atmel contact


7709B–AVR–07/08

Section 6Complete Schematics

On the next pages, the following documents of STK526 revision 4381B are shown:

Complete schematics

Assembly drawing

Bill of materials

Default configuration summary


7709B–AVR–07/08

Complete Schematics

Figure 6-1 . Schematics, 1 of 4

UCAP

UG

ND

UG

ND

UG

ND

UG

ND

PC4

STK5

26 M

EZZA

NINE

FOR

STK

500

PD1

D- PD5PD4

XTAL

1XT

AL2

D+

PC6

PC7

AVCC

PC4PC5

UVCC

UCAP

U20

AT90

USB

16

XTAL

11

XTAL

22

GN

D3

VCC

4

PC2

5

PD0

6

PD1

7

PD2

8

PD39

PD410

PD511

PD612

PD713

PB014

PB115

PB216

PB3

17PB

418

PB5

19PB

620

PB7

21PC

722

PC6

23R

eset

#24

PC525 PC426 UCAP27 UGND28 D+/SCK29 D-/SDATA30 UVCC31 AVCC32

BT33

PB4

GN

DG

ND

PD7

PB5

PB6

PD6UGND

PB7

PB0

PD2

PD3

VCC

RES

ET

PB1

PB3

PB2

Note

: U

20 i

s th

e ML

F32

foot

prin

tPC

2PD

0

CR

121

PGB0

0106

03

C12

24.

7uF

TP6

VBU

S1

VBU

S

UGND UGND UGND UGND UGND UGND UGND UGND UGND UGND UGND UGND UGND UGND UGNDUGND UGND UGND UGND UGND UGND UGND UGND UGND UGND UGND

Title

Size

Doc

umen

t Num

ber

Rev

Dat

e:Sh

eet

of

<Doc

>1.

1

CPU

B

14

Thur

sday

, Jul

y 10

, 200

8

TP12

1U

CAP

1U

CAP

CR

1PG

B001

0603

SW1

RST

PD1

PC2

UC

AP C

apac

itor

Clo

sed

to th

e M

CU

PD4PD5

UC

AP

D-

Y1

8MH

z C26

15pF

C27

15pF

XTAL

1

XTAL

1

XTAL

2

XTAL

2

D+

PC7

PC6

Rese

t Ci

rcui

t

Forc

e Bo

otlo

ader

Exe

cuti

on

VCC

R11

47k

PD7

PD7

USB

Rec

epta

cle

B

<ASS

EMBL

Y>

J3 1-V_

BUS

3-D

+2-

D-

4-G

NDSH

IELD

C12

12.

2uF

R17

0

PC4

C1

100n

F

SW2

HW

B

PC5

UVC

C

UVC

C

R12

147

KTP

1D

+

1

C25

1uF

UCAP UCAP UCAP

VCC

PC[7

..0]

R12

10k

PD[7

..0]

U1

AT90

USB

16

XTAL

11

XTAL

22

GN

D3

VCC

4

PC2

5

PD0

6

PD1

7

PD2

8

PD39

PD410

PD511

PD612

PD713

PB014

PB115

PB216

PB3

17PB

418

PB5

19PB

620

PB7

21PC

722

PC6

23R

eset

#24

PC525 PC426 UCAP27 UGND28 D+/SCK29 D-/SDATA30 UVCC31 AVCC32

VCC

C3

100n

F

DEC

OU

PLIN

G C

APAC

ITO

RS

CLO

SED

TO

TH

E D

EVIC

EM

CU

Pin

4

PB4

D+

PD7

PB5

PB6

PD6

AVC

C

VBU

S

R12

247

K

D-

PD3

PB7

TP2

D-

1

PB0

PD2

RES

ET

R9

22

RES

ET

VCC

PB1

R10

22

PB2

DEC

OU

PLIN

G C

APAC

ITO

RS

CLO

SED

TO

TH

E D

EVIC

EM

CU

Pin

31

PB3

PB[7

..0]

NR

ST

D+

D- R

ESIS

TOR

SC

lose

d to

the

MC

U

RES

ETC2

100n

F

AVC

C

PC2

DEC

OU

PLIN

G C

APAC

ITO

RS

CLO

SED

TO

TH

E D

EVIC

EM

CU

Pin

32

PD0

CR

2

PGB0

0106

03

Note

: U

1 is

TQF

P32

ZIF

Sock

et


7709B–AVR–07/08

Complete Schematics


C7

100n

FC

6

100n

F

PC

6P

C4

PC

5P

C2

PC

7

R7

10k

CO

N 2

x20

J2 EXP.

CO

N 0

GN

D1

GN

D2

AU

XI0

3A

UXO

04

CT7

5C

T66

CT5

7C

T48

CT3

9C

T210

CT1

11B

SE

L212

(n.c

.)13

RE

F14

NR

ST

15P

E2

16

PE

117

PE

018

GN

D19

GN

D20

VTG

21V

TG22

PC

723

PC

624

PC

525

PC

426

PC

327

PC

228

PC

129

PC

030

PA

731

PA

632

PA

533

PA

434

PA

335

PA

236

PA

137

PA

038

GN

D39

GN

D40

XTA

L2

CO

N 2

x20

J1 EXP.

CO

N 1

GN

D1

GN

D2

AU

XI1

3A

UXO

14

DA

TA7

5D

ATA

66

DA

TA5

7D

ATA

48

DA

TA3

9D

ATA

010

DA

TA1

11D

ATA

912

SI

13S

O14

SC

K15

CS

16

XT1

17XT

218

VTG

19V

TG20

GN

D21

GN

D22

PB

723

PB

624

PB

525

PB

426

PB

327

PB

228

PB

129

PB

030

PD

731

PD

632

PD

533

PD

434

PD

335

PD

236

PD

137

PD

038

GN

D39

GN

D40

Title

Siz

eD

ocum

ent

Num

ber

Rev

Dat

e:S

heet

of

<Doc

>1.

1

STK

500

Exp

and

conn

ecto

rs

A4

24

Wed

nesd

ay,

Dec

embe

r 13

, 20

06

R20

10k

R21

2k C28

1nF

STK5

26 M

EZZA

NINE

FO

R ST

K500

U8

BC

847B

PN

E_N

PN

1

B_N

PN

2

C_P

NP

3C

_NP

N6

B_P

NP

5

E_P

NP

4

NR

ST

PC

6

VTG

XTA

L1

R6

2k

PB

7

PB

3P

B5 P

D5

PD

7P

B1

PB

6

PD

1P

D3

PB

2P

B4

PD

6PB

0

PD

2P

D4

C21

1nF

PD

0

VTG

XT

2X

T1

VTG

VTG

VTG

PC

[7..

0]

PB

[7..

0]

PD

[7..

0]

JP1

STK

X1

12

JP2

STK

X2

12


7709B–AVR–07/08

Complete Schematics


Data Flash

LEDs

3.3V

U9

AT4

5DB

642D

CA

SO

N8

SI

1

SC

K2

RE

SE

T3

CS

4W

P5

VC

C6

GN

D7

SO

8

D

EC

OU

PLI

NG

CA

PA

CIT

OR

CLO

SE

TO

TH

E C

ON

NE

CTO

R

SW

3

TPA

511G

Sel

ect

5

Left

7

Up

3

Rig

ht6

Dow

n4

Com

11

Com

22

VC

C

PB

[7..

0]

P1

SU

B-D

9 F

EM

ALE

RS

232

594837261

1011

RS232 Interface

DEBUG WIRE Interface and Serial ISP Interface

PD

1

PD

4

PD

5

PB

2P

B2

PB

2P

B2

PB

2P

B2

PB

2P

B2

PD

0

STK5

26 M

EZZA

NINE

FO

R ST

K500

VC

C

R12

347

k

VC

C

PB

[7..

0]

PC

2

C12

310

0nF

CT

S

Title

Siz

eD

ocum

ent

Num

ber

Rev

Dat

e:S

heet

of

<Doc

>1.

1

Inte

rfac

es

A4

34

Wed

nesd

ay,

May

23,

200

7

C13

100n

F

RT

S

RS

232

TTL

GN

D

VC

C

U3

MA

X323

2R

S23

2 B

UF

FE

R

.11

.12

.10

.9

.8

.7

.13

.14

.15

.16

C1+

1V

+2

C1-

3

C2+

4

C2-

5V

-6

C10

100n

F

C9

100n

FC

1110

0nF

C12

100n

F

RxD

PD

2

DE

CO

UP

LIN

G C

AP

AC

ITO

R C

LOS

E T

O T

HE

DE

VIC

E

RS

-TxD

RS

-RxD

PD

[7..

0]

VC

C

DE

CO

UP

LIN

G C

AP

AC

ITO

R C

LOS

E T

O T

HE

DE

VIC

E

C8

100n

F

SP

4

SP

5

Cau

tion

Dat

aFla

sh

Fix

3V

Pow

er s

uppl

y O

nly

PB

[7..

0]

RE

SE

T

R14

47k

PB

0

CO

N 2

x3

J4 ISP

CO

N

PD

O1

VC

C2

SC

K3

PD

I4

RE

SE

T5

GN

D6

C14

100n

F

PD

7

PB

1P

B1

PB

1P

B1

PB

1P

B3

PB

3P

B3

PB

4

PD

6

PD

3T

XD

SP

3

PB

53.

3V

RE

SE

T

PB

6

PB

3

R13

10k

RS

-CT

S

In-li

ne G

roup

ed L

ED

s D0

TOP

LED

LP

M67

6

LED

0 (g

reen

) D1

TOP

LED

LP

M67

6

LED

1 (g

reen

) D2

TOP

LED

LP

M67

6

LED

2 (g

reen

) D3

TOP

LED

LP

M67

6

LED

3 (g

reen

)PB

2

R1

1k

R2

1k

PB

7

R3

1k

R4

1k

PB

1

PD

[7..

0]

SP

2

RS

-RT

S

Joystick Interface


7709B–AVR–07/08

Complete Schematics


UV

CC

UC

AP

-

C24

4.7u

F VC

C

VTG

U4

LM34

0

IN GN

D

OU

T

NOREG

INTREG

VB

US

D6

LL41

48

AV

CC

5V5V

- C23

4.7u

F

TP3

3.3V

1

TP4

5V

1

R19

124k

1%

UV

CC

U6o

ut=1

.25*

(1+R

28/R

29)

STK

CP

121

Vbu

s 3V

3

VBUS

REG 3V3

R15

100k

1%

REG 5V

TP5

GN

D

1

3.3V

STK5

26 M

EZZA

NINE

FO

R ST

K500

3.3V

D4

TOP

LED

LP

M67

6PO

WER

LED

(RED

)

R5

1k

Title

Siz

eD

ocum

ent

Num

ber

Rev

Dat

e:S

heet

of

<Doc

>1.

1

PO

WE

R

A4

44

Wed

nesd

ay,

Dec

embe

r 13

, 20

06

5V

C19

220n

F

JP4

VC

C S

ourc

e

12

34

56

78

D5

LL41

48

3.3V

R16

100k

1%

-+

U7

DF

005S

3

1

4

2

J5

CO

NN

EC

TOR

JA

CK

PW

RE

xt P

ower

Sup

ply

3 2 1

C16

100n

F

C20

33nF

JP12

13V

3 R

EG

11 2

2

33

U6

LP39

82

OU

T1

IN2

GN

D3

OU

T4

FA

ULT

8S

HD

N7

CC

6

SE

T5


7709B–AVR–07/08

Complete Schematics

Figure 6-5 . Assembly Drawing, 1 of 2 (component side)


7709B–AVR–07/08

Complete Schematics

Table 6-1 . Bill of Materials

Qtty Schematic Reference Part Reference Description Case

CAPACITORS14 C1, C2, C3, C6-

C14, C16, C123100nF Ceramic capacitor 0805

1 C121 2.2µF Tantalum capacitor Type A

1 C19 220nF Ceramic capacitor 0805

1 C20 33nF Ceramic capacitor 0805

2 C21, C28 1nF Ceramic capacitor 0805

3 C23, C24, C122 4.7µF Tantalum capacitor Type A

1 C25 1µF Tantalum capacitor Type A

2 C26, C27 15pF Ceramic capacitor 0805

DIODES3 CR1, CR2,

CR123PGB1010603MR ESD Protection (Littlefuse) 0603

4 D0-D3 KA-3022SGC Green LED Mini Topled

1 D4 KA-3022SRC Red LED Mini Topled

2 D5, D6 LL4148 Small signal diode, If max 200mA LL-34

CONNECTORS2 J1, J2 M20-6102005 PC104 2x20-pin through-hole female press-fit stackable

connector2.54mm pitch

1 J3 USB type B USB type B receptacle Special

1 J4 Header 2x3 Male header 2x3 pts for ISP connection 2.54mm pitch

1 J5 Jack Power 2.1 Jack Power Receptacle with diam. 2.1mm Special

1 P1 DB9 female DB9 Female 90° receptacle for RS-232 Special

CONFIGURATION2 JP1, JP2 Jumper 1x2 Header for configuration 1x2 pts 2.54mm pitch

1 JP4 Jumper 2x4 Header for configuration 2x4 pts 2.54mm pitch

1 JP121 Jumper 1x3 Header for configuration 1x3 pts 2.54mm pitch

1 CP121 Configuration Pad Enabled by default. Can be disabled cutting it. N/A

4 SP2-SP5 Solder Pad Disabled by default. Can be enabled with a solder drop. N/A

RESISTORS5 R1-R5 1 kOhms 1/16W-5% SMD 0805

2 R6, R21 2 kOhms 1/16W-1% SMD 0603

4 R7, R12, R13, R20

10 kOhms 1/16W-5% SMD 0603

2 R9, R10 22 Ohms 1/16W-5% SMD 0603

5 R11, R14, R121, R122,

R123

47 kOhms 1/16W-1% SMD 0805

2 R15, R16 100 kOhms 1/16W-1% SMD 0805

1 R17 0 Ohms / strap N/A 0603

1 R19 120 kOhms 1% 1/16W-1% SMD 0805

INTEGRATED CIRCUITS


7709B–AVR–07/08

Complete Schematics

6.0.1 Default Configuration - Summary

Table 6-2 . Default Configuration summary

1 U1 socket TQFP32 ZIF Socket for QFP 32 pitch 0.8 mm 7x7 - 9x9 mm Special

1 U20 AT90USBxx2 MCU TQFP32/QFN32

1 U9 AT45DB642C 8Mo dataflash memory CASON8

1 U3 MAX3232ECAE+ RS232 transceiver SSOP16

1 U4 LM340 5V regulator SOT223

1 U6 LP3982IMM-ADJ LDO regulator 3V3 (Vin max 6V), 300mA MSOP8

1 U7 DBS104G Diode bridge 400V 1A Special

1 U8 BC847BPN Transistor double NPN/PNP Ic max = 200mA SC-88

MISCELLANEOUS2 SW1, SW2 Pushbutton Normally Open ; 1.6N 6x3.5mm

1 SW3 TPA511G 4 ways joystick + center CMS mount Special

7 TP1-TP6, TP121

Test Point Test point for measurements D=1.32mm

1 Y1 8MHz 8MHz crystal HQ49/4H

4 JP1-JP4 Shunts Shunts for configuration headers N/A

Table 6-1 . Bill of Materials

Qtty Schematic Reference Part Reference Description Case

Name Ref. Function State

Jumpers

STK X1 JP1 AT90USB82/162 Clock configuration pin X1 OPEN

STK X2 JP2 AT90USB82/162 Clock configuration pin X2 OPEN

VCC SOURCE

JP4 Primary power source selection “VBUS” position

3V3 REG JP121 AT90USB82/162 I/O power selection “NOREG” position

Solder PADS

SP4 TTL - CTS OPEN

SP3 RS232 - CTS OPEN

SP5 TTL - RTS OPEN

SP2 RS232 - RTS OPEN

Configuration PADS

CP121 Connect VBUS to 3V3 on-board regulator CLOSED


7709B–AVR–07/08

Complete Schematics

6.1 Document Revision History

6.2 7709B

1. Schematic drawings updated.


7709B–AVR–07/08

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7709B–AVR–07/08 /xM

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