STC Annual Report 2007

STC

Ann

ual r

epor

t

The STC@MIUN research program 10/04/2008 Electronic systems for Sensible Things that Communicates

STC@MIUN - annual report 2007 1. Introduction

The evolution of the 3G mobile telephone systems, from the first point-to-point commu-nication used in the telephone prototype patented by Graham Bell in 1875, has been driven by man’s underlying dream of increasing the range of senses. The telephone extends the range of our voice and hearing. Wireless solutions provide additional flexibilities, which makes it pos-sible to extend our senses in our daily activities. The same technology can be utilized in all kinds of service applications. We define the technology that allows this as technology for Sensible Things that Communicate (STC). Electronic systems for Sensible Things that Com-municate include technology for data communication, data processing, and sensing. The re-search field covers a large area, which can be described by the access network presented in the Fig. 1.1. 2. The STC reference system

Access network node

Communication access point

Surveillance node

Telemedicine node

Visualization node Multimedia terminal

Dispensable communication terminal

Arbitrary STC

Fig. 1.1. Distributed electronic system used as the reference system for the research in the profile. The reference system in Fig. 1.1 contains areas of global interest and lies within the fields

of research interest for both the academic and industrial partners.

Within STC@MIUN we are developing four different technology platforms with tech-nologies that can be combined together to form an STC system. The technology platforms are

1. Computational platform (STC System and application)

- Optimization of computational routines in measurement systems utilizing FPGA hardware platforms

2. Network platform (STC Network Solutions)

- Optimization and design of network algorithms for efficient data aggrega-tion and system security

Mid Sweden University Page 1 Department of Information Technology


3. Wireless hardware platform (STC Wireless Solution)

- Low power wireless sensor node design and energy harvesting 4. Sensor hardware platform (STC Sensor Solution)

- Development of innovative sensor structures for industrial surveillance Within STC@MIUN, we have designed a wireless demonstrator platform called SENTIO

in which each technology platform can evaluate its research results in a full STC system solu-tion. A sensor node from the SENTIO demonstrator is presented in Fig. 1.2.

Fig. 1.2. SENTIO sensor nodes Left: first version, Right: second version

3. Research objectives The objective of STC@MIUN is to develop knowledge and technology to support-

distributed sensing in industrial applications. Distributed sensing technology will enable ad-vanced digital services such as, for example, remote presence or high precision visibility in industrial supply chains, as illustrated in Fig 1.3 below. The distributed sensing demands sta-ble intelligent sensor network solutions operating at low power levels, utilizing energy har-vesting or other smart power solutions. The focus of STC@MIUN is on particular sensor network technologies of relevance for our industrial partners and utilizing advantages associ-ated with both the research environment and competence at Mid Sweden University. The tar-geted research field is large and STC@MIUN will not be able to cover all aspects of the field.

Fig. 1.3. Illustration of the evolution of telecommunication towards true remote presence services. Our main focus is on key technology areas such as:



- real time video processing - power efficient routing and networking - low power collaborative sensing - energy harvesting - low cost radiation sensor solutions

Initially, our resources were concentrated on the development of key technologies of rele-

vance for different industrial partners. The next step in the project is to target the development of more system oriented demonstrators where the developed technologies will be utilized to show new functionalities and service solutions. Our ambition is to demonstrate both new technological solutions and new service concepts of general industrial interest. The evolution of the research objectives within STC@MIUN are presented in Fig. 1.4.

Development of technology plattforms

Development of con-cept demonstrators Further development of technology plattforms Demonstration of servi-ce concepts

Start End

Fig. 1.4. Time evolution of objectives for the STC@MIUN research program

4. Summary or research results During 2007 there has been significant development in STC@MIUN’s technology platforms. In the following section we will summarize the progress made so far. 4.1. STC Systems and applications The mission statement for the STC Systems and Applications was initially defined as being to discover when, where and how system integration on FPGA is a good implementation al-ternative for industrial and automotive embedded systems. Points of investigation were with regards to developing applications for the technology, investigating cost issues and optimizing low power consumption in FPGA based systems. This year has seen the start of a number of activities on embedded machine vision applications and these are perceived as being able to contribute application knowledge into the technology development during the project. The results for 2007 can be summarized as follows: Automatic design methods for optimized implementation of real-time video processing systems: We have extended our work into developing a behavioural memory synthesis design flow for FPGA implementation of real-time video processing, with methods to optimize the synthesis towards the selected FPGA architecture. The results so far have proved to be very promising and we will continue to investigate further use of this technology.



Investigation of specific challenges in real-time video processing systems: The results of the optimization work of a multi channel analogue video display computer were demon-strated. These results show that a multi channel video display (more than 4 sources) can be implemented using a small and inexpensive FPGA circuit thus, enabling compact and low-cost implementations. We are now investigating how to extend this work to digital IP-based video streams. In addition, a macro scale positioning system has been analyzed and implemented in order to demonstrate the developed CAD methods and also to identify new research challenges. The results from this work also indicate that the whole system can be implemented on a small FPGA and thus enable usage for the consumer market. Analysis and development embedded machine vision applications: During the year, two externally funded projects in embedded machine vision were started. These investigate real-time measurements of surface topology on paper and optical positioning. Additionally, in cooperation with Sensor Solutions, a joint project to detect and characterize magnetic particles in hydraulic fluid has been initiated. 4.2. STC Network solutions The overall goals for the network solution part of the profile are to discover efficient (lower power) and secure sensor data collection for applications such as environment monitoring, surveillance and network traffic monitoring. Our results for 2007 can be summarized as:

Performance analysis of information collection of wireless sensor network routing: We have achieved a formal routing analysis using our proposed analytical model and the new information based network lifetime definition. Experiments have shown that our model can generate tight upper bounds for different situations, and can be used to evaluate existing algo-rithms. Detecting Anomaly Node Behaviour in Wireless Sensor Networks: We present a method which builds accurate node profiles based on traffic modelling of each interested node. For the first time, the traffic patterns are learned in a way which is based on the arrival order of different packet events in wireless sensor networks. 4.3. STC Wireless solutions The objective for the work in Wireless solutions is to develop distributed measurement sys-tems based on wireless sensor technology. The focus has been on wireless sensor networks in industrial applications. The work has consisted of solving the implementation problems for an entirely contact-less positioning system for mobile heavy-duty cranes. Distributed angular sensor: We have presented a joint angular sensor consisting of four dis-crete wireless two-axis MEMS accelerometers spatially distributed on adjacent arm links. We have proved that the method is theoretically error-free and from the experimental results ob-tained we are able to demonstrate an accuracy level which is higher by a factor of 10. More-over the distributed sensor enables a gradual degradation of the accuracy in the event of the failure of one of the sensor devices, which is an important property for robustness operation. Analysis of the communication requirements for closed-loop control system: By analys-ing the proposed standard for wireless sensor networks (IEEE802.15.4) for applications hav-ing hard real-time requirements, we have concluded that only a very few applications are ful-



filled by it. Our proposal is a MAC protocol which fulfils the requirements associated with low energy consumption for the communication rather better. 4.4. STC Sensor solutions Low-cost sensor solutions in NIR radiation area and an integrated compact optical spectro-scopical solution have been developed and investigated during 2007. Development of low-cost thermal detector for detection of CO2 NDIR method: A metal film resistance bolometer and a thermopile have been fabricated. Both types of detector con-sist of a 4 um thin SU-8 membrane, into which the temperature sensitive elements were en-capsulated. The thermopile displays a sensitivity of approximately 5.6V/W and the bolometer solution a sensitivity of 9.3V/W (bias 2.5V@10 Hz). The measurements were performed us-ing a diode laser with a power of 4.5 mW and a wavelength of 1.56 um.

Integrated compact FT spectrometer based on a position sensitive detector and Fabry-Perot interferometer wedge: The spectrometer is based on a multi channel Fabry-Perot in-terferometer manufactured as a glass wedge. A Lateral Position Sensitive Detector (PSD) is used as the detector. The advantage using a PSD is the necessity for a simple readout circuit with only two analogue-inputs, compared to an array solution in which several hundred ana-logue-inputs are required. However the present solution requires a movable slit and the inten-sity must not change during measurements (during moving the slit). Nevertheless the move-ment of slit does not require any synchronisation with readout electronics, since the informa-tion of position is to be found in the two signals from the PSD. 4.5. The SENTIO demonstrator system The SENTIO platform for the rapid development of wireless sensor networks with short-range communication has been developed and the first version has been available for all part-ners in STC since 2005. SENTIO has been used extensively in various applications involving very different characteristics. During 2007, for example, it has been used to set up a fully working positioning system on HIAB’s cranes, in a pre-study of testing rims on armoured vehicles at BAE Systems, on horses for the detection of lameness, and for sensor-activated surveillance cameras. Course material and lab equipment for our students on our courses in wireless sensor net-works have been developed and in addition, it has also been used in thesis projects, in which, for example, a wireless ECG and a wireless gamma detector have been developed. 4.6. Publications 2007

• J. Sidén, M. Fein, A. Koptioug, H-E. Nilsson, “Printed Antennas with Variable Con-ductive Ink Layer Thickness”, IET Microwaves, Antennas & Propagation Magazine, Vol. 1, Iss. 2 April 2007

• H-E. Nilsson, J. Siden, A. Koptioug, S. Hussain, T. Olsson and P. Jonsson, “Evalua-tion of a printed patch antenna for robust microwave RFID tags”, IET Microwaves, Antennas & Propagation, Vol. 1, Iss. 3, June 2007.

• J. Sidén, M. Fein, A. Koptioug, H-E. Nilsson, “Logos as RFID Tag Antennas”, sub-mitted to International journal on wireless and optical communications, Special Issue on "Antennas for Emerging Radio Frequency Identification (RFID) Applications", 2007

• T. Olsson, J. Sidén, H-E Nilsson, “Comparative robustness study of planar antennas”, IET Microwaves, Antennas & Propagation Vol. 1, Iss. 3, June 2007 pp:674 - 680



• H.-E. Nilsson, C. Mattsson, J. Sidén, U. Geyer, “Printing of UHF modulators on em-bedded silicon in semi-passive RFID tags”, submitted to Smart Systems Integration 2008

• J. Sidén, X. Zeng, T. Unander, H.-E. Nilsson, “Remote Moisture Sensing utilizing Or-dinary RFID Tags”, Proc of IEEE Sensors 2007 Int. Conf. on., 2007

• D. Timpe, L. Olsson, J. Sidén, “Cost analysis of introducing a log identification sys-tem using RFID in the wood supply chain: A case study at a Swedish forest com-pany”, submitted to The Journal of Forest Economics, 2007

• T. Olsson, J. Sidén, M. Hjelm, H.-E. Nilsson, “Robustness of Printed Patch Antenna”, Accepted for publication in IEEE Transactions on Antennas and Propagation, 2007

• X. Zeng, J. Sidén, G. Wang and H-E. Nilsson, “Slots in Metallic Label as RFID Tag Antenna”, Proceedings of IEEE AP-S 2007

• J. Sidén and H.-E. Nilsson, “Line Width Limitations of Flexographic- Screen- and Inkjet printed RFID Antennas”, Proceedings of IEEE AP-S 2007

• X. Zeng, J. Sidén, G. Wang and H.-E. Nilsson, “Silver Ink Patch Antenna for RFID”, Int. Symp. on Ant. and Prop, ISAP’07

• J. Sidén, M. Fein, A. Koptioug, H-E. Nilsson, “Printed Antennas with Variable Con-ductive Ink Layer Thickness”, IET Microwaves, Antennas & Propagation Magazine, Vol. 1, Iss. 2 April 2007

• C. Fröjdh, S. Pettersson, G. Thungström, ” Characterization of 3D thermal neutron semiconductor detectors”, IWORID 8 2007-10-02

• H. Andersson , H.-E. Nilsson, G. Thungström, ” Evaluation of FT Spectrometer utiliz-ing a Lateral Effect Position Sensitive Detector with a scanning slit and Multi Channel Fabry-Perot Interferometer”, 2007

• H. Andersson, H.-E. Nilsson, G. Thungström, ” Principle of FT Spectrometer based on a Lateral Effect Position Sensitive Detector and Multi Channel Fabry-Perot Interfer-ometer”, Measurement 2007, Elsevier

• Claes Mattsson, Göran Thungström, Kent Bertilsson, Hans-Erik Nilsson and Hans Martin, "Fabrication and evaluation of a thermoelectric infrared sensor formed on a thin photosensitive epoxy membrane with low thermal conductivity", Paper accepted for publication in Journal of Physics: Conference Series.

• Claes Mattsson, Göran Thungström, Kent Bertilsson, Hans-Erik Nilsson and Hans Martin, "Development of an infrared thermopile detector with a thin self-supporting SU-8 membrane", Paper accepted for publication in IEEE Sensors Conference Pro-ceeding 2007.

• H. Norell, N. Lawal, M. O'Nils, Automatic Generation of Spatial and Temporal Mem-ory Architectures for Embedded Video Processing Systems, EURASIP Journal on Embedded Systems, Volume 2007, 2007.

• N. Lawal, M. O'Nils, B. Thörnberg, "C++ based System Synthesis of Real-Time Video Processing Systems targeting FPGA Implementation", Proceeding of the Re-configurable Architectures Workshop, 2007.

• N. Lawal, M. O'Nils, B. Thörnberg, "Power-aware Automatic Constraint Generation for FPGA Based Real-Time Video Processing Systems”, Proceedings of the IEEE Norchip Conference, 2007

• P. Österberg, T. Zhang, “Bid-based cost sharing among multicast receivers”, in Pro-ceedings of 4th ACM International Conference on Heterogeneous Networking for Quality, Reliability, Security and Robustness (QShine), Vancouver, Canada, August 2007

• J. Alfredsson and S. Aunet, "D-latch for Subthreshold Floating-Gate Circuits Exploiting Threshold Elements", IEEE Norchip Conference 2007



• S. Aunet, B. Oelmann, P.A. Norseng, Y. Berg, "Real-time Reconfigurable Subthresh-old CMOS Perceptron," IEEE Trans. on Neural Networks.

• P. Österberg and T. Zhang, "Fair Cost Sharing Among Multicast Receivers", In Pro-ceedings of 2nd IEEE International Conference on Digital Telecommunications, ICDT, Silicon Valley, CA, USA, July 2007. (Best Paper Award)

• P. Österberg, T. Zhang and M. Gidlund, "Bandwidth Allocation in Broadband Access Networks", In Proceedings of 12th European Conference on Networks & Optical Communications, NOC, Kista, Sweden, June 2007.

• Qinghua Wang, Tingting Zhang , "Detecting Anomaly Node Behavior in Wireless Sensor Networks", Proc. the 3rd IEEE International Symposium on Security in Net-works and Distributed Systems (SSNDS-07), Niagara Falls, Canada, May 21-23, 2007.

• Qinghua Wang, Tingting Zhang and Stefan Pettersson, "Bounding the Information Collection Performance of Wireless Sensor Network Routing", Proc. The 5th Annual communication networks and services research conference (CNSR2007), Fredericton, New Brunswick, Canada May 14 - 17, 2007. (Best Paper Award).

• U. Jennehag, T. Zhang, and S. Pettersson, "Improving Transmission Efficiency in H.264 Based IPTV Systems", the IEEE Trans. on Broadcasting, March 2007.

• Henrik A. Andersson, Göran Thungström, Hans-Erik Nilsson, "Electroless deposition and silicidation of Ni contacts into p-type Porous Silicon", Journal of Porous Materi-als, 2007

• J. Uher, C. Fröjdh, J. Jakůbek, C. Kenney, Z. Kohout, V. Linhart, S. Parker, S. Peters-son, S. Pospíšil and G. Thungström "Characterization of 3D thermal neutron semicon-ductor detectors", Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, In Press, Corrected Proof, 2007,

• Göran Thungström, C.G. Mattsson and Camilla Rönnqvist "Fabrication and charac-terization of silicon detectors for use in radiotherapy dosimetry, pre-irradiated by high-energy electrons", Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, In Press, Corrected Proof, 2007,

• Cao Cao and Bengt Oelmann, "The Analysis of Power-Related Characteristics of FSM Benchmarks", the 50th IEEE Int'l Midwest Symposium on Circuits & Systems/5th IEEE Int'l Northeast Workshop on Circuits & Systems, Montreol, Canada, 2007.

• Mattias O'Nils, Benny Thörnberg, Najeem Lawal, "C++ based System Synthesis of Real-Time Video Processing Systems targeting FPGA Implementation", Proceedings of the FPGA World Conference, 2007.

• B. Thörnberg, M. Palkovic, Q. Hu, L. Olsson, P. Gunnar Kjeldsberg, M. O’Nils, F. Catthoor, "Bit-Width Constrained Memory Hierarchy Optimization for Real-Time Video Systems", IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, 2007.

• Jan Lundgren, Mattias O’Nils, Bengt Oelmann, Börje Norlin, Suliman Abdalla, "An Area Efficient Readout Architecture for Photon Counting Color Imaging", Nuclear In-struments and Methods in Physics Research Section A, 2007.

• Jan Lundgren, Mattias O’Nils, Bengt Oelmann, Suliman Abdalla, " Power Distribution and Substrate Noise Coupling Investigations on the Behavioral Level for Photon Counting Imaging Readout Circuits ", Nuclear Instruments and Methods in Physics Research Section A, 2007.



• Bengt Oelmann and Cao Cao, ”A Mixed Synchronous/Asynchronous Design Ap-proach for Fine-Grained Dynamic,” Book Chapter (Chapt. 13), Brain Inspired Nano Architectures 2007, World Science.

• Fredrik Linnarsson, Peng Cheng, and Bengt Oelmann, ” IEEE Second International Symposium on Industrial Embedded Systems - SIES'2007 2007

• Suliman Abdalla, Bengt Oelmann, Mattias O'Nils, Jan Lundgren, ” Architecture and Circuit Design for Color X-Ray Pixal Array Detector Read-Out Electornics,” IEEE Norchip Conference 2007, pp. 271 – 276.

• Peng Cheng, Fredrik Linnarsson, and Bengt Oelmann, ” Distributed Joint Angular Sensor Based on Biaxial MEMS Accelerometers,” IEEE IECON08, Taipei, Taiwan.

• Cao Cao and Bengt Oelmann, ” Low-Power State-Encoding for FSMs with Mixed Synchronous/Asynchronous State Memory,” VLSI Integration 2007, Elsevier Publ.

• Unander, T., Nilsson, H.-E., Oelmann B., ” Printed touch sensor for interactive pack-aging and display,” Polytronic 2007, the 6th International IEEE Conference on Poly-mers and Adhesives in Microelectronics and Photonics 2007.

• Jon Alfredsson, Snorre Aunet and Bengt Oelmann, ” Small Fan-in Floating-gate Cir-cuits with Application to an Improved Adder Structure,” Proceedings of 20th Interna-tional Conference on VLSI Design 2007

• Jon Alfredsson, Snorre Aunet, ”Performance of CMOS and Floating-Gate Full-Adder Circuits at Subthreshold Power Supply," accepted for publication at PATMOS'07, Gothenburg.

5. PhD examinations during 2007 The STC@MIUN program involves both PhD students and post doc projects. During 2007 we had 8 PhD thesis examinations related to STC@MIUN. Dr. Håkan Norell, Development, Analysis and Implementation of Pre-Processing Video Filters

The usage of video systems in households and industry has increased rapidly over the past few years. The benefits of visual processing, control and inspection have offered great opportunities for real-time video processing systems (RTVPS) for the general public as well as for heavy industries. The high volume market media sys-tems can absorb a great deal of the cost related to the development of standard components, such as Field Programmable Gate Arrays (FPGAs). The development of industrial systems can benefit from this new technology by utilizing these cheap components. In this thesis, examples of video processing algorithms suitable for the pre-processing of digital video, applicable for both industrial and media usage is shown. In addition a methodology supporting the designer in implementing memory architectures suitable for such algorithms is presented.

In this thesis two video processing algorithms are presented and described in detail. The common denominator is their utilization of data from temporally adjacent frames in order to be effective, in terms of compression effi-ciency, and to produce an attractive result for the viewer. However, from the aspect of quality improvement, considerations have to be taken into account in order to enable an actual hardware implementation. Utilizing data from temporally adjacent frames in a real-time data stream is a non-trivial task. From the algorithm designer’s view the data dependencies and memory requirements are not in focus, but for the hardware designer they are. Having the right data available at the right time is the only consideration in order to have a functional system. Present day algorithm and hardware development methods and architectures do not converge into a common design flow, even though this has been attempted. The gap between the algorithm designer and his/her hardware counterpart has to be bridged in order to obtain an efficient and rapid implementation. Methodologies that ab-



stract and reduce the amount of time spent on implementing memory architectures for video processing applica-tions are required. The buffering requirements are often too complex to analyze manually in order to efficiently utilize the resources available in FPGAs. In this thesis a method for the synthesis and implementation of memory architectures for real-time video proc-essing systems, IMapper, is presented. The architecture supports the implementation of spatio- and temporal video processing algorithms and utilizes methodologies for global optimization of on-fabric available memory resources for FPGAs. This methodology provides an efficient and flexible implementation environment and also offers the benefits of the global optimizations it utilizes. Håkan Norell is currently working with research and development at Navaero AB in Sundsvall. Dr. Johan Sidén, On the Design, Characterization and Optimization of RFID Tag Anten-nas

photon creates a cloud of ch

Remotely read electronic identification tags are being established as the stan-dard method of identifying objects in transport logistics. They are referred to as RFID tags and with successful research and development they are likely to one day replace all of the present day barcodes, which are found on a wide variety of items and objects. As RFID systems consist of many different parts spanning over just as many academic subjects, this thesis investigates some of the main issues regarding RFID tag antennas. The main focus is placed on the performance and cost optimization of relatively simple one-layer antennas, suitable for mass production in commercial printing presses using electrically conductive ink. Examples of specially designed antennas

include those able to operate upon metallic objects and antennas that can be physical bent. It is also shown how RFID tag antennas that will be widely exposed to the human eye can include a commercial value by allowing their geometric design to originate from group insignias and company logos. The thesis also presents a solution with regards to how pairs of ordinary low cost RFID tags can be used as remotely read moisture sensors. Johan Sidén continues his research in a joint program between the spin-of company Sensible Solutions and Mid Sweden University. He will also take a more active role in the supervision of PhD students within the area of printed electronics. Dr. Börje Norlin, Characterization and application of photon counting X-ray detector systems

This thesis concerns the development and characterization of X-ray imaging sys-tems based on single photon processing. “Color” X-ray imaging opens up new per-spectives within the fields of medical X-ray diagnosis and also in industrial X-ray quality control. The difference in absorption for different “colors” can be used to discern materials in the object. For instance, this information might be used to iden-tify diseases such as brittle-bone disease. The “color” of the X-rays can be identi-fied if the detector system can process each X-ray photon individually. Such a de-tector system is called a “single photon processing” system or, less precisely, a “photon counting system”.

With modern technology it is possible to construct photon counting detector sys-tems that can resolve details to a level of approximately 50 µm. However with such small pixels a problem will occur. In a semiconductor detector each absorbed X-ray arge which contributes to the image. For high photon energies the size of the charge

cloud is comparable to 50 µm and might be distributed between several pixels in the image. Charge sharing is a key problem since, not only is the resolution degenerated, but it also destroys the “color” information in the image.



This thesis presents characterization and simulations to provide a detailed understanding of the physical proc-esses concerning charge sharing in detectors from the MEDIPIX collaboration. Charge summing schemes utiliz-ing pixel to pixel communications are proposed. Charge sharing can also be suppressed by introducing 3D-detector structures. In the next generation of the MEDIPIX system, Medipix3, charge summing will be imple-mented. This system, equipped with a 3D-silicon detector, or a thin planar high-Z detector of good quality, has the potential to become a commercial product for medical imaging. This would be beneficial to the public health within the entire European Union.

Börje Norlin continues his research at Mid Sweden University within the sensor technology group. He is also actively involved in the education programs at the University.

Dr. Patrik Österberg, Fair Treatment of Multicast Sessions and Their Receivers: Incen-tives for more efficient bandwidth utilization

Media-streaming services are rapidly gaining in popularity, and new ones are knocking on the door. Standard-definition Internet protocol television (IPTV) has already entered many living rooms, and high-definition IPTV will become common property in the not too distant future. Then even more advanced and resource-demanding services, such as three-dimensional and free-view TV, are next in line. Video streaming is by nature extremely bandwidth intensive, and this development will place significant stresses upon the existing network infrastructure.

In scenarios where many receivers are simultaneously interested in the same data, which is the case with popular live content, multicast transmission is more bandwidth efficient than unicast. The reason is that the receivers of a multicast session share the resources through a common transmission tree where data are only transmitted once along any branch. The use of multicast transmission can therefore yield huge bandwidth savings. There are how-ever no really strong incentives for the Internet service providers (ISPs) to support multicast transmission, and the deployment has consequently been slow.

We propose that more bandwidth is allocated to multicast flows in the case of network congestion. The ratio is based upon the number of receivers and the bit rate that they are able to obtain, since this is what determines the degree of resource sharing. We believe that it is fair to take this into account, and accordingly call the proposed allocation multicast-favorable max-min fair. Further, we present two bandwidth-allocation policies that utilize different amounts of feedback to perform allocations that are reasonably close to being multicast-favorable max-min fair.

We also propose two cost-allocation mechanisms that build upon the assumption that the cost for data transmis-sion should be covered by the receivers. The mechanisms charge the receivers based on their share of the re-sources usage, which in general is favorable to multicast receivers. The two cost-allocation mechanisms differ in that one strives for optimum fair cost allocations, whereas the other might give discounts to some receivers. The discounts facilitate larger groups of receivers, which are also able to provide cheaper services for the non-discounted receivers.

The proposals make multicast transmission more attractive to the users of media-streaming services. If the pro-posals were implemented in multicast-enabled networks, the rest of the ISPs would be forced to support multi-cast, in order to remain competitive.

Patrik Österberg is currently involved in post doc research at Mid Sweden University within the area of com-puter science and development of IPTV services.



Dr. Torbjörn Olsson, Antenna Robustness Modelling

Antennas run an increasing risk of being physically damaged as transceivers be-come implemented in applications and environments where they have not been previously used. Military applications with extensive networking, even incorporat-ing artillery shells as communication nodes, civilian applications of electronic marking of goods at the item level where the electronic components are con-structed from conductive ink and polymers, are rapidly growing areas where an-tennas are likely to be damage. However, the systems must maintain functionality even when they are damaged. With an ever increasing number of antennas for various applications and environments the necessity for design rules to improve robustness of antennas is essential. In this thesis the need for special measures in order to achieve robustness against physical damage for planar antennas has been studied. Furthermore, a Monte

Carlo based methodology for antenna robustness monitoring when exposing the antennas to randomly oriented damage of different types has been developed. Finally the methodology has been used to describe the robustness of some commonly used antennas. The result is a significant step forward when it comes to antenna design where the antenna is adapted to its envi-ronment based on aspects other than electromagnetic considerations . The thesis also gives support to the design of robust antennas with smaller, and thus with a reduced cost, conductor area. Torbjörn Olsson is currently working for BAE Systems Bofors in Karlskoga where he is actively taking part in the coordination of research collaboration with academia. Dr. Cao Cao, Automatic Synthesis of Partitioned FSMs Based on Mixed Synchro-nous/Asynchronous State Memory

The rapid development of digital circuits with high density and frequency means that power, in addition to area and speed, has become an important parameter in design constraints. Nowadays, the electronic design industry is confronted by increasingly costly package and cooling systems due to power dissipation. Battery-powered portable devices, such as laptops, mobile phones etc., which provide higher computational capacity and support multi-media information transformation, add greatly to the original slim power budget. Although synchronous digital design has, over the past few decades, become the industry standard, this new challenge suggests that asynchronous design techniques should now be reconsidered, as they possess the potential for a reduction in power dissipation.

Finite state machine (FSM) partitioning has proved to be effective for power optimization. In this thesis, a mixed synchronous/asynchronous state memory structure in the decomposed FSM is proposed, which results in imple-mentations with low power dissipation and low area overhead. The state memory is composed of the synchro-nous local state memory and an asynchronous global state memory, where the former is used to distinguish the states inside a sub-FSM, and the latter is responsible for controlling sub-FSM communication. Although asyn-chronous communication mechanism is introduced between sub-FSMs, the input/output behaviour of the de-composed FSM is still, cycle by cycle, equal to that of a complete synchronous FSM. The power consumption can be further reduced by using the clock gating technique and low power state assignment. Based on this mixed synchronous/asynchronous structure, an automatic synthesis tool was developed, which accepts a state transition graph (STG) as the input and synthesizable VHDL code as the output. The output can be directly used for synthesis at the gate level by the standard tool. The FSM partitioning algorithm, power and area estimation and trade-off and state encoding optimization aimed at this specific structure were integrated into the tool. In addition, the input to the tool was also analyzed and a variation coefficient was proposed as an im-portant measure for the quantitative analysis of power-related characteristics of standard benchmark circuits. The effectiveness of the whole procedure was verified through optimization of standard benchmarks where a power reduction of up to 70% has been demonstrated. Moreover, the proposed asynchronous modules implemented in



the tool provide a direction with reference as to how the asynchronous design can be effectively combined into a largely synchronous environment. Cao Cao is currently working on research and development at Aditus Science AB in Lund. Dr. Jan Lundgren-Thim, Simulating Behavioral Level On-Chip Noise Coupling

In this thesis, noise coupling simulation is introduced into the behavioural level. Methods and models for simulating on-chip noise coupling at the behavioural level in a design flow are presented and verified for accuracy and validity. Today, designs of electronic systems are becoming denser and more and more mixed-signal systems such as System-on-Chip (SoC) are being devised. This raises prob-lems when the electronics components start to interfere with each other. Often, digital components disturb analogue components, introducing noise into the sys-tem causing degradation of the performance or even introducing errors into the functionality of the system.

Today, these effects can only be simulated at a very late stage in the design process, causing large design itera-tions and increased costs if the designers are required to return and make alterations, which may have occurred at a very early stage in the process. This is why the focus of this work is centred on extracting noise coupling simulation models that can be used at a very early design stage, such as at the behavioural level and then follow the design through the various design stages. To achieve this, SystemC is selected as a platform and implementation example for the behavioural level models. SystemC supports design refinement, which means that when designs are being refined and are crossing the design levels, the noise coupling models can also be refined to suit the current design. This new method of thinking in primarily mixed-signal designs is called Behavioural level Noise Coupling (Be-NoC) simulation and shows great promise in enabling a reduction in the costs of design iterations due to compo-nent cross-talk and simplifies the work for mixed-signal system designers. Jan Lundgren-Thim remains with Mid Sweden University as a co-supervisor for a new generation of PhD stu-dents working within STC@MIUN.

Dr. Xavier Liopart Cudié, Design and Characterization of 64K Pixels Chips Working in Single Photon Processning Mode

Progress in CMOS technology and in fine pitch bump bonding has made possible the development of high granularity single photon counting detectors for X-ray imaging. This thesis studies the design and characterization of three pulse proc-essing chips with 65536 square pixels of 55 μm x 55 μm designed in a commer-cial 0.25 μm 6-metal CMOS technology. The 3 chips share the same architecture and dimensions and are named Medipix2, Mpix2MXR20 and Timepix.

The Medipix2 chip is a pixel detector readout chip consisting of 256 x 256 identi-cal elements, each working in single photon counting mode for positive or nega-tive input charge signals. The preamplifier feedback provides compensation for detector leakage current on a pixel by pixel basis. Two identical pulse height discriminators are used to define an energy window. Every event falling inside the energy window is counted with a 13-bit pseudo-random counter. The counter logic, based in a shift register, also behaves as the input/output register for the pixel. Each cell also has an 8-bit configuration register which allows masking, test-enabling and 3-bit individual threshold adjust for each discriminator. The

chip can be configured in serial mode and readout either serially or in parallel. Measurements show an electronic noise ~160 e- rms with a gain of ~9 mV/ke-. The threshold spread after equalization of ~120 e- rms brings the full chip minimum detectable charge to ~1100 e-. The analog static power consumption is ~8 μW per pixel with Vdda=2.2 V.



The Mpix2MXR20 is an upgraded version of the Medipix2. The main changes in the pixel consist of: an im-proved tolerance to radiation, improved pixel to pixel threshold uniformity, and a 14-bit counter with overflow control. The chip periphery includes new threshold DACs with smaller step size, improved linearity, and better temperature dependence.

Timepix is an evolution of the Mpix2MXR20 which provides, independently in each pixel, information concern-ing arrival time, time-over-threshold or event counting. Timepix uses, as a time reference, an external clock (Ref_Clk) up to 100 MHz which is distributed all over the pixel matrix during acquisition mode. The preampli-fier is improved and there is a single discriminator with 4-bit threshold adjustment in order to reduce the mini-mum detectable charge limit. Measurements show an electrical noise ~100 e- rms and a gain of ~16.5 mV/ke-. The threshold spread after equalization of ~35 e- rms brings the full chip minimum detectable charge either to ~650 e- with a naked chip (i.e. gas detectors) or ~750 e- when bump-bonded to a detector. The pixel static power consumption is ~13.5 μW per pixel with Vdda=2.2 V and Ref_Clk=80 MHz. This family of chips has been used for a wide variety of applications.

During these studies a number of limitations have come to light. Among those are limited energy resolution and surface area. Future developments, such as Medipix3, will aim to address those limitations by carefully exploit-ing developments in microelectronics.

Xavier Llopart Cudié started his PhD study as collaboration between CERN and the University of Barcelona. The main part of his research has been conducted at CERN in collaboration with Mid Sweden University and STC@MIUN. At the end of his study he transferred his PhD studies to Mid Sweden University and completed his PhD in June 2007. He currently holds a post doc position at CERN in a collaboration sponsored by Mid Swe-den University.



6. STC@MIUN research projects

In the following section we present the ongoing STC@MIUN PhD student projects. In addi-tion we also present some areas where new PhD students will be allocated during 2008.


PROJECT INFORMATION – February, 2008 STC – Sensible Things that Communicate

Mid Sweden University Phone: 0771-975 000 STC – Sensible Things that Communicates Fax: 060-14 84 56 851 70 Sundsvall Internet: www.miun.se/stc www.kks.se

OPTIPOS - OPTICAL POSITION MEASUREMENT IN REAL-TIME FOR CONSUMER PRODUCTS

Background Systems that can measure their own locations are becoming more frequently used in different applications. The figure below shows two examples of applications that measure the position in a 3‐ or 2‐dimensional space: a) is a helmet for Virtual Reality (VR) presentation, which also measures its position and orientation in order to track the movement of the user’s head and b) is a handheld printer. The printer operates as a computer mouse, printing text and graphics while it is moved over a large surface. Typically, these applications have two major things in common. High precision is required for the position measurement and they are both price sensitive.

a) b)

Objectives Optical position measurement methods and its related algorithms and implementations will be investigated in this project. Methods based on prepared environments already exist that can measure an objects position and orientation in a 3‐dimensional space or over a 2‐dimensional surface. We intend to investigate if these methods can be enhanced to work in general unprepared environments, if it is possible to optimize these algorithms in order to reduce

implementation costs, and also if it is possible to automate the estimation of implementation costs for such algorithms. The automation of cost estimation is aimed to be implemented in a CAD‐tool. The cost efficiency of an optical position measurement system will be demonstrated in a prototype. Optical position measurement can be done using a single camera or using a dual camera stereo‐vision based approach. We will study methods and algorithms based on a single camera approach, aiming for lower system complexity and implementation costs. One of the more important challenges is to exploit image structures of objects in the environment with known positions. The view of several objects at known positions enables the system so calculate its own position and orientation. Planned project start The project is planned to start in April 2008 and will continue for three years. Budget The total budget is 1.835 MSEK and will cover 20 percentage of a senior researcher together with a new PhD student to be hired.

For further information contact:Dr. Benny Thörnberg [email protected]



OPTICAL ONLINE CHARACTERIZATION OF LARGE SURFACE

TOPOGRAPHY IN PAPER MACHINES

Background The industry of paper manufacturing is today looking for ways to set a quality value on their paper while it is produced. The quality for graphical paper products is highly correlated with the topography of the paper. With smoother surfaces comes higher quality. Additionally, it could be used to control the paper machine. In order to realize this, an on‐line characterisation of paper topography in the production chain is required. Objectives In this project, the goal is to investigate the possibilities and limitations of online topography measurement in a paper production machine, to develop an optical system that has sufficient performance, and to construct a prototype for installation on an existing paper machine. This work will include analysing the topography measurement setup characteristics to clearly define limitations and possibilities in these kinds of measurement on paper. Experimental tests are needed in the development of lighting source, which produces a line on the paper surface that is used in triangulation method that yields paper topography at specific positions. The production of the actual prototype will incorporate results from all previous experiments and model analysis from the project. Ongoing activities Currently, a system setup to produce the illuminate line is being developed. Also, model simulations on parameter limitations and error estimations are being done.

Results A model has been developed to, in the image sensor system, convert the incoming light position data to topographic height. A study to analyse the sub‐pixel precision has been done. This analysis shows that methods like using adaptive thresholds in the camera readout yields large gains in signal‐to‐noise ratio, and solves the same problems as anamorphic optics do. A comparison of light source setups using laser vs. LED has been done, showing that a LED array yields lower noise than a laser source due to lower speckle noise.

Sample of a paper topography profile. For further information contact:

Prof. Mattias O’Nils [email protected] Dr. Jan Thim [email protected]



CAD TOOL FOR REAL-TIME VIDEO PROCESSING SYSTEMS

Background FPGA based implementations of video processing systems are effective but have a complex programming model. The synthesis tool presented here reduces the design complexity and still produces effective implementations. Objectives IMEM (Interface and MEmory Model), an extension of SystemC modelling library, captures video processing systems as coarse‐grained synchronous dataflow graph (Fig 1), where each node represents an abstract video interface, the memory model and the description of the functional behaviour of the task, whereas each edge in the graph represents the data width of each pixel in the video frame.

p1 p2 p3 p4

p5 p6 p7

in out

A)

B)

IMEM model

C++ function

Task

Figure 1: IMEM model of a video processing system.

Linebuffers

Window ctrl

Pixel switch

SLWC

...

Task

Sync.

a11 a12 a13 a21 a22 a23 a31 a32 a33

In data

Neighbourhood data

Neighbourhood output

Out data

a)

b)

Figure 2: Boundary conditions implementation

architecture. Memory requirements of a video processing are separated from its behavioural C++ description (Fig. 3). A memory model, which may be neighbourhood oriented (Fig 2) is implement in different phases, whereas systems behaviour is

implemented using high level synthesis tool or manual HDL coding.

Interface generation

VHDL code for FPGA

FPGA logic compiler

FPGA based execution platform

Simulation Input Stimuli

Functional Simulation Data Output

1

2

3

4

5

6

Memory Hierarchy Optimization

IMEM Conceptual Modelling

IMEM Projector High-level Synthesis Memory

Allocation Address

Generation

VHDL code for FPGA

C++ High level synthesis (Celoxia)

Functional mapping of algorithm

Memory Storage

Estimation

Interface and Memory Model

Figure 3: CAD tool system synthesis workflow

Ongoing activities We are currently optimising the CAD tool such that the generated hardware is optimized for low power. This optimisation can be achieved at all levels of the system synthesis workflow (Figure 1). Hence we are investigating how each stage of the workflow can independently, and in conjunction with other levels, lead to lower power consumption in the final hardware. Results The tool manages memory requirements of video processing systems and provides the designers with a user‐friendly FPGA programming model while generating efficient hardware of the memory sub‐systems.

For further information contact:Najeem Lawal [email protected] Supervisor: Prof. Mattias O’Nils Dr. Benny Thörnberg



DEMONSTRATION OF HIGH-PERFORMANCE FPGA

IMPLEMENTATION OF AN OPTICAL NAVIGATION SYSTEM Background Performance of video processing systems can be increased through parallel operation of the system blocks. It can be further increased by implementing the video processing system in hardware. FPGA provides the benefits of high hardware performance and reconfigurability. This project targets to demonstrate the effectiveness of the FPGA implementation of an imaging system. Objectives To prepare the demonstration we have modelled the system using Matlab/Simulink and constructed optical, mechanical and hardware systems, see Figure 1. The optical system captures image data, which are used in the hardware system implementing a navigation algorithm to define the location of the mechanical system. The core of this project is correlation‐based real‐time image processing and is implemented in the hardware system. At the beginning the image of a reference location is captured and stored in memory. Image correlation between the reference image and successive image data is used to determine the current position of the mechanical system.

Figure 1: Experimental setup.

Ongoing activities We are currently implementing the hardware system after verifying the simulation models of all the parts in the navigation system interfaced to the mechanical setup. Results Figure 2 shows a simulation the hardware prototype shown in Figure 1 was programmed to follow a sine‐wave. The navigation system was able to determine and predict the future position with 1% accuracy. Figure 2 shows the discrepancy between mechanical path, optical sensor ROI position, and predictions.

520 540 560 580 600

-10

-8

-6

-4

-2

0

2

4

Mech. Path Optical sensor ROI Prediction

Figure 2: Boundary conditions implementation architecture.

For further information contact:Najeem Lawal [email protected] Supervisor: Prof. Mattias O’Nils



FPGA BASED COMPUTER SYSTEMS

Background The ever‐growing integration of functionality in industrial and automotive embedded systems has introduced the requirement for real‐time video processing capabilities in many systems. An FPGA‐based implementation of embedded systems provides many attractive characteristics such as high flexibility, low cost, and a high level of integration. These characteristics make FPGA:s especially suitable for video related applications. FPGA:s provide the possibility for System‐on‐Chip (SoC) designs where most of the system components, such as CPU:s video‐, and communication controllers, are all implemented on the FPGA. In addition to the various advantages of a SoC design, FPGAs also avoid the problems caused by the end‐of‐life for standard components. Objectives The goal of this project is to develop FPGA‐based architectures that allow the design of cost‐effective FPGA‐based computer systems with real‐time video processing capabilities. A frequently occurring requirement for embedded computer systems is the capability of displaying multiple real‐time video sources combined with computer generated graphics. Real‐time video processing is a very data intensive task which is often beyond the processing capabilities of the CPU:s used in typical industrial and automotive applications. With an FPGA based video pre‐processor that provides real‐time video data directly to the display memory, any computer system can be made capable of displaying real‐time video.

A B C A B C

55

60

65

70

75

80

85

90

Time

Tem

p

Temp1Temp2Temp3Temp4

RPM1

RPM2 RPM3

RPM4

Results A set of FPGA‐based architectures that perform cropping, scaling and de‐interlacing of real‐time video streams has been designed. These architectures are suitable for use in FPGA‐based video enabled computer systems and allow these systems to be implemented using low cost FPGA devices. An FPGA‐based video enabled computer system that supports the display of four separate video sources can be implemented using a Xilinx Spartan 3E FPGA with 500 Kgates. The work has been reported in a licentiate thesis. Ongoing activities Currently a prototype system is being designed for further evaluation of the designed video processing architectures. For further information contact: Professor Mattias O’Nils

[email protected]

Niklas Lepistö

[email protected]



SIMULATING BEHAVIORAL LEVEL ON-CHIP NOISE COUPLING

Background The integration of analog and digital systems onto a single chip causes significant problems related to noise coupling, which appears as switching currents that couple from digital logic to sensitive analog nodes. In order for designers of mixed‐signal systems to be able to locate noise coupling problems and to insert counter‐measures, means of simulating the source of noise coupling problems are required. Since the only simulation tools available for noise coupling are intended for layout level, the problem at hand is to define how to simulate noise coupling throughout an entire design flow, where the starting point occurs at an early design level. Objectives The contribution of this project and this thesis is the introduction of the simulation methods and models called BeNoC (Behavioral level Noise Coupling), which can be used to quantify noise coupling problems in behavioral level designs. In an application test case, noise coupling in photon counting pixel detector readout systems will be investigated. Ongoing activities The work has resulted in a doctoral thesis (ISBN: 978‐91‐85317‐54‐7) that has attracted attention by a Norwegian company, resulting in an idea to apply for project funding for the development of applicable simulation models in a design environment. Results A low‐level motivational study of the on‐chip noise coupling problems, which can occur in photon counting pixel detector readout systems, has been done. Simulation models have been

developed, resulting in BeNoC that is a behavioural level noise coupling simulation method consisting of several models for physical properties and noise injection. Adaptations of existing models have been made for physical properties and noise injection for use in higher design levels such as the behavioural level. The adoption includes an increase of accuracy for an interpolation method used in substrate resistance extraction. A simplification of gate level noise injection models for capacitive coupling and impact ionization noise has also been developed. Finally, a test has been conducted using BeNoC in a real system design example of a photon counting pixel detector readout system.

Noise models

Capacitive coupling Impact ionization

Physical properties

Substrate model Power distribution model

Noise injection Noise coupling simulation models

Final noise spread

Schematic image of the different models needed in an on‐chip noise coupling simulation method.

For further information contact:Ph. D. Jan Thim [email protected]



PERFORMANCE OF INFORMATION COLLECTION OF WIRELESS SENSOR

NETWORK ROUTING

Background Handling routing problems is considered to be

the core of a wireless sensor network design. This is particularly true for those ubiquitous information‐collecting purpose sensor networks, where communication dominates the critical sensor energy usage and the efficiency of the underlying routing algorithm determines the efficiency of the whole network. However, the fundamental performance bounds or reference to the “optimal” solution for maximizing the information during the “lifetime” of a wireless sensor network still remain unclear. Objectives In this project, the goal is to find a formal routing analysis model that can provide a tight upper bound of the information collection. Accordingly thus the model can be used to evaluate existing and upcoming routing algorithms. Ongoing activities Currently our optimization model is under

evaluation. The result shows that the proposed model can be used as a benchmark for performance evaluation of sensor network routing algorithms. However, the model does not take the link

quality routing overhead into consideration. This can be the future work. Results We propose an analytical model where the

lifetime of an information‐collecting sensor network was determined by the condition that the residual network power should not fail to supply the power requirement of the underlying application. This new and more realistic network

lifetime definition increases the difficulty in building formal mathematical models, , since there is no fixed reference for the application power requirement. We have, however, achieved a formal routing analysis method using this information metric and the new information based network lifetime definition. Experiments have shown that our model can generate tight upper bounds for different situations, and that it can be used to evaluate existing algorithms, such as minimum hop (MH), minimum energy consuming path (MTE) and flow augmentation (FA), as well as future routing algorithms.

0 0.2 0.4 0.6 0.8 10

500

1000

1500

2000

2500

3000

3500

4000

Guaranteed normalized network information-collecting ability

Info

rmat

ion

colle

cted

thro

ugho

ut n

etw

ork

lifetim

e BoundMHMTEFA

For further information,

contact: Qinghua Wang [email protected] Supervisor: Doc. Tingting Zhang



SECURITY IN WIRELESS SENSOR NETWORK

Background The security threats to wireless sensor network are quite different from those in Internet and mobile ad hoc networks. The wireless communication, large scale and possible human unattended deployment make attacks on wireless sensor networks relatively easier to perform. Furthermore, all features that make sensor nodes cheap and affordable, such as limited energy resource, limited bandwidth and limited memory, also make many established security mechanisms inappropriate in sensor networks. Objectives In this project, the goal is to develop sensor network security mechanisms, both technical and at management level, that are power aware. Ongoing activities Currently our profile‐based anomaly detection model is evaluated. We are building sensor node profiles in a simulated wireless sensor network and check its performance in detecting different kinds of attacks. An automatic emergency response system is on the way to be investigated. Results 1. A study of secure and energy‐efficient group communication for sensor networks has been performed. 2. We have presented a method, which builds accurate node profiles based on traffic modeling of each interested node. For the first time, the traffic patterns are recorded according to the packet arrival event order in the network. To make the traffic‐based recording strategy scalable in networks of different sizes, the nodes are classified in categories such as local nodes, non‐local nodes etc., centering on each interested

node. Correspondingly, the traffic transmitted between different nodes is classified. Obviously, such a classification limits the size of the set of translated packet events and the set of traffic patterns recorded based on these events. As a consequence the node profiles recorded are appropriate for anomaly detection on sensor nodes with limited resources. The analysis of detection of example attacks shows that node profiles built like this has the ability to differentiate between normal behavior and an attack.

Translation Table

Src Dest Packet Type

... … … 15 00 RREQ 00 15 RREP 12 10 HELLO 15 00 DATA 15 00 DATA … … …

Src Dest Packet Type

… … … Local Sink RREQ Sink Local RREP Neighbor Me HELLO Local Sink DATA Local Sink DATA

Local Sink RREQ A Local Sink RREP B Local Sink DATA C Neighbor Me HELLO D ... … … …

(a) Extract selected features from arriving packets

(b) Packet Classification

Node Address: 00—Sink, 10—“me”

Event … A B D C C

For further information,

contact: Qinghua Wang [email protected] Supervisor: Doc. Tingting Zhang



PERFORMANCE OF DIGITAL FLOATING-GATE CIRCUITS OPERATING AT

SUBTHRESHOLD POWER SUPPLY VOLTAGES

Background All who are involved in electronic design knows that one of the critical issues in todays electronic is the power consumption. Designers are always looking for new approaches in order to reduce currents while still retaining the performance. Floating‐gate (FGMOS) circuits have previously been shown to be a promising technique to improve speed and still keep the power consumption low, when the power supply voltage is reduced below subthreshold voltage for the transistors. Objectives In this project, the goal is to determine how good floating‐gate circuits can be compared to conventional static CMOS when the circuits are working in subthreshold. The investigation also includes trade‐offs between speed and power consumption for better performance, how to select floating‐gate capacitances, how a large circuit fan‐in will affect performance and also the influence of different kinds of refresh circuits. Ongoing activities Currently the yield issue for FGMOS circuits is investigated for low‐voltage operation. Results The first simulations of the FGMOS circuits in a 0.13 μm process have several interesting results. First of all, in the best case it is shown that FGMOS has potential to achieve up to 260 times in better EDP‐performance compared with

CMOS at 150 mV power supply. Other aspects of FGMOS design have been to look at how refresh circuits will affect performance (semi‐floating‐gate circuits) and how a larger fan‐in will change noise margin and EDP. When it comes to fan‐in the simulations shows that a maximum fan‐in of 5 is possible at 250 mV supply and it decrease to 3 when supply voltage is reduced to 150 mV.

For further information contact:

Lic. Eng. Jon Alfredsson [email protected] Supervisor: Prof. Bengt Oelmann



POWER AWARE WIRELESS CLOSED LOOP CONTROL SYSTEM FOR

LOADER CRANES

Background Advances in microelectronics and wireless communication technology provide opportunities for many different application fields. A vast number of systems that traditionally have been wired and inhibited by cost and feasibility of wiring, can today often be replaced by wireless solutions. However, when going wireless, several new challenges must be overcomed. One challenge is the power supply for all sensor devices. To expand the lifetime of the network it is therefore a key design parameter to minimize the power consumption in the sensor devices.

Objectives One goal is to build a technology platform for exploring different sensor configurations to verify the theoretical models experimentally in field tests (resulting in the SENTIO platform). The project should also answer the questions: What are the limitations of currently proposed standards for wireless sensor networks in closed‐loop control systems? How to organise

the wireless sensor network on a loader crane for a local positioning system?

Ongoing activities Currently a framework for describing the design of a wireless sensor network for local positioning system taking real‐time, low‐power, and reliability aspects into account is developed. Results A hardware/software platform for short‐range wireless sensor networks has been developed and used in various applications. Also, the limitations of the proposed standard IEEE802.15.4 has been identified and described. An alternative protocol has been proposed for wireless closed‐loop control systems with hard real‐time requirements.

For further information contact:MSc. Fredrik Linnarsson [email protected] Supervisor: Prof. Bengt Oelmann



JOINT ANGULAR SENSORS FOR CONTACT-LESS MEASUREMENTS

Background Joint angular sensors are widely used in the industry, from highly effective robots in product line and heavy construction machines in building sites to small knobs on home appliances. There are contact‐less joint angular sensing methods available, such as inertial measurement by Micro‐Electro‐Mechanical System (MEMS) gyroscopes and accelerometers. The big advantage of these contacts‐less sensing methods over their conventional counterparts is that they do not have relative mechanical movements, which can make them more reliable, cost less as well as last longer.

Objectives The goal of this project is to develop methods for contacts‐less measurements that can withstand harsh environments often found in industrial and automotive applications. The initial problem addressed is the development error‐models for

different sensor configurations based on accelerometers. Ongoing activities Currently, hardware for accurate sensor electronics is developed. These devices will be used for several purposes. The results obtained for the DCMR method that is theoretically error‐free contains small errors that we so far cannot explained. Here the more accurate sensor electronics will hopefully guide us to the sources of these errors. It will also be used for field tests on HIABs cranes to explore performances of the distributed wireless sensor network as well as redundancy schemes. Results On the basis of the error model of the CMR method, we give an analysis outlining the advantage of the theoretically error‐free DCMR method. The sensor calibration and alignment is described and both methods are characterized on a rigid body robot arm model. The experiment shows the angular error up to 0.4 rad from the CMR method whereas just 0.03 rad from the DCMR method.

For further information contact:MSc. Peng Cheng [email protected] Supervisor: Prof. Bengt Oelmann



INNOVATIVE RFID SOLUTIONS AND PRINTED ELECTRONICS

Johan Sidén works within the area of RFID as well as printed electronics and graduated from his PhD studies in May 2007. He now divides his time between a continued academic career and at the spin‐off company Sensible Solutions Sweden AB. Background Radio Frequency IDentification (RFID) is a collection of technologies for wireless identification and/or to retrieve information about an object. The academic focus is put on innovative antenna solutions that allow effective implementation of RFID, where it earlier was not technically or economically possible.

Typical RFID Tag

Objectives and Ongoing activities In this project, one of the goals is to develop RFID tag antennas for applications, where commercially available products do not live up to the requirements. Another technical objective is to combine available low‐cost RFID technology with sensors. A third objective is to together with local industries form an interest organisation within the general area of RFID.

For further information contact:Dr. Johan Sidén [email protected] Tel. +46 70 671 71 71

Moisture measurement system based upon pairs of ordinary RFID tags

Results The group has for example shown how pairs of ordinary RFID tags can be configured and applied similar to a sticker to be used as remotely read as moisture sensors, placed within floors and walls. In collaboration with industry, the group has also developed an extremely small RFID tag (relative to the wavelength) which can be placed within metallic cavities and survive under very hard conditions. Similar examples involve integration of RFID tags in a metallic label used by the local industry without changing the outer dimensions. The printed electronics has also demonstrated a printed magneto static speaker.

Left: Printed Magneto static speaker Middle: An UHF RFID tag measuring only 0.05 wavelengths in diameter to be put in metallic cavities. Right: A metallic label with integrated RFID antenna.



ARCHITECTURE AND CIRCUIT DESIGN OF PHOTON-COUNTING READOUT

FOR X-RAY IMAGING SENSORS

Background Hybrid pixel array detectors for X‐ray imaging are based on different technologies for sensor and readout electronics. The readout electronics are based on standard CMOS technologies that are experiencing continuously rapid improvements by means of down‐scaling the feature sizes, which in turn leads to higher transistor densities, lower power consumption, and faster circuits. The advantages of down‐scaling the CMOS technology can be utilized to increase the spatial resolution by reducing the pixel sizes. Recent research indicates however that the bottleneck in reaching further spatial resolution in X‐ray imaging sensors may not be limited by the circuit area occupied by the functions necessary in the pixels, but is instead related to problems associated with charge‐sharing of charges generated by the sensor which are distributed over a neighbourhood of pixels and will limit the spatial resolution and lead to a distortion of the energy spectrum. Objectives The improvements in CMOS technology can also be used to extend the range of applications for X‐ray imaging sensors. In this project, the objective is to explore different readout architectures that can take advantage of the down‐scaled CMOS technology to advance the readout electronics’ capability to increase spatial resolution and multiple energy discrimination to be used in future colour X‐ray imagers.

Ongoing activities Currently an experimental platform is developed to support elaboration of different readout architectures through experiments. Results The method is based on colour sub‐sampling with intensity biasing. For three‐level energy discrimination, that corresponds to colour imaging systems for visible light with R, G, and B colour components, the increase in circuit complexity will be only 20% higher than that for the Bayer method but it results in significantly better image quality. The proposed architecture and its circuit implementation are evaluated with respect to circuit complexity (area) and power consumption. For a photon‐counting pixel it is demonstrated that the complete pixel, with charge‐sharing suppression mechanism, can be implemented using 300 transistors with an idle power consumption of 2.7μW in a 120nm CMOS technology operating with a 1.2V power supply.

For further information contact: Lic. Eng. Suliman Abdalla [email protected] Supervisor: Prof. Bengt Oelmann



INTEGRATED COMPACT FT SPECTROMETER BASED ON A POSITION

SENSITIVE DETECTOR AND FABRY-PEROT INTERFEROMETER WEDGE Background For many applications there is an interest in developing compact and cost‐effective spectrometers for handheld and compact stationary instruments. Objectives To construct and evaluate these compact and cost‐effective spectrometers based on Fabry‐Perot wedge interferometers. Ongoing activities An FT spectrometer based on a multi channel wedge Fabry‐Perot interferometer using a scanning slit and a lateral effect position sensitive detector (PSD) has been manufactured and evaluated. Results The spectrometer is based on a multi channel Fabry-Perot interferometer manufactured as a glass wedge, where the transmission function for each wavelength and thickness of the wedge is given by the equation

( ) ( )( ) ( )λθπ

λ/cos2sin41

122

2

ndRRRT

+−−

=

The resulting interferogram is detected using a PSD by scanning a slit in front of the interferometer wedge and PSD, thereby obtaining both the intensity and position for each measurement. The position of the slit is accurately known for each measurement thereby eliminating the need for a high-precision scanning mechanism or calibration source. The spectral resolution can potentially be very high because of the high resolution of PSDs. Using a long detector combined with a narrow slit gives a large

number of measurement points, equivalent to pixels on a CCD, and thereby a large spatial resolution. In the figure is shown a spectra of a green Diode Pumped Solid State laser (DPSS) displaying the primary green frequency-doubled wavelength at 532 nm from the KTP crystal as well as the 1064 nm primary lasing wavelength and the IR pump laser diode at 808 nm.The resolution is approximately 5 nm for the constructed device but can potentially be higher. The advantage of using a PSD for readout is the simplicity of the electronics and that the position of each measurement is accurately known without the need for a high precision scanning mechanism or calibration source.

For further information contact:Lic. Eng. Henrik Andersson [email protected] Supervisor: Dr. Göran Thungström



DEVELOPMENT OF LOW-COST THERMAL DETECTOR FOR DETECTION OF

CO2 USING NDIR METHOD

Background Thermal sensors for IR detection, such as bolometers and thermopiles are used in a number of applications. These applications include remote temperature control and gas detection. One step in the direction towards a low‐cost system is the usage of a low‐cost infrared detector. Objectives The goal of this research project has been to produce a low‐cost thermal detector using standard processing techniques and new materials. In many existing thermal detectors the thermal link is formed by a thin membrane of either Si or Si3N4. In a low‐cost detector, a polymer such as SU‐8 could be an alternative to regular Si and Si3N4 membranes. SU‐8 has low thermal conductivity and requires only standard silicon lithography processing. Ongoing activities The current work is concentrated on increasing the yield of the process and the sensitivity of the detectors. Results A metal film resistance bolometer and a thermopile detector were fabricated. Both types of detectors consisted of a 4 μm thin SU‐8 membrane, into which the temperature sensitive elements where encapsulated. The IR sensitivity was evaluated using an infrared diode laser with a power of 4.5 mW and a wavelength of 1.56 μm. The thermopile show a sensitivity of about 5.6

V/W. Biasing the bolometer with 2.5 V @ 10Hz resulted in a sensitivity of 9.3 V/W.

For Further information contact: Lic. Eng. Claes Mattsson [email protected] Supervisor: Dr. Göran Thungström

Thermopile IR response



INTEGRATION OF RADIATION DETECTORS IN WIRELESS SENSOR

NETWORKS Background There is an increasing demand for security solutions in order to ensure sustainable and responsible usage of radioactive resources. This is especially true as nuclear energy production is considered in regions with significant political instability. Global sensor networks based on global mobile telephone platforms maybe a very interesting way to create a world wide nuclear watch dog service. Objectives The aim of the project is to promote world wide integration of sensor functions in mobile phones that may be used to monitor the nuclear radiation world wide. The project restricts itself to technology issues. However, we also would like to initiate a discussion regarding using the mobile phone systems for surveillance of environmental parameters of interest for humanity world wide. We hope to do this by showing sensor functionalities related to mobile phone that can provide the desired functionalities. In addition we would like to investigate optimal sensor functions for such surveillance application by answering questions like

‐ Is the total radioactive dose the main issue or do we need energy resolution in the detector?

‐ How should the communication protocol be organized?

‐ What kind of intelligence do we need to threshold the communication?

‐ Can such detector system be developed utilizing a Wikinomics type of business model or is it entirely an issue for national security organisations?

Ongoing activities The project is a new identity within the STC@MIUN but is based on the knowledge platform for integrated radiation detectors developed since 1996 at the Mid‐Sweden University. Together with researchers in computer science and informatics the more general society oriented questions can be addressed. Results This is a new research project based on earlier research results obtained in the area of medical imaging and direct photon counting colour X‐.ray imaging. The new application area demands technologies that offers extremely low noise readout of sensor data. The photon counting readout technique can deliver such low noise operation. To get a small size, a semiconductor detector is preferred. Heavy compounds like CdTe or GaAs have much better absorption than Si for high energies, but the internal fluorescence in the material distorts the energy signature. The influence of fluorescence in CdTe has been studied in several recent publications.

For further information contactDr. Börje Norlin [email protected] Mid‐Sweden University

A research program at Mid Sweden University, sponsored by The Knowledge Foundation, in partnership with:

Adal AB

STC Annual Report 2007

Documents

Transcript of STC Annual Report 2007