Static Timing Analysis

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SynchronousSynchronousSynchronousSynchronous Timing Timing Timing Timing ---- ReviewReviewReviewReview

CombinationalCombinationalCombinationalCombinational Timing Timing Timing Timing ParametersParametersParametersParameters

A

B

Z

Propagation delay: Different timing arcs that depends on the input pattern and input port (A or B)

FlipFlipFlipFlip----Flop Timing Flop Timing Flop Timing Flop Timing ParametersParametersParametersParameters

Delays can be different for rising and falling data transitions

Timing Timing Timing Timing ConstraintConstraintConstraintConstraint –––– ReviewReviewReviewReview (No (No (No (No SkewSkewSkewSkew))))

Clock NonClock NonClock NonClock Non----IdealitiesIdealitiesIdealitiesIdealities

�Clock skew

� Spatial variation in temporally equivalent clock edges; deterministic + random, T

sk

�Clock jitter

� Temporal variations in consecutive edges of the clock signal; modulation + random noise

� Cycle-to-cycle (short-term) tJS

� Long term tJL

�Variation of the pulse width

� Important for level sensitive clocking

Clock UncertaintiesClock UncertaintiesClock UncertaintiesClock Uncertainties

Sources of clock uncertainty

Clock Clock Clock Clock Skew and JitterSkew and JitterSkew and JitterSkew and Jitter

�Both skew and jitter affect the effective cycle time

�Only skew affects the race margin (usually)

SynchonousSynchonousSynchonousSynchonous Timing Timing Timing Timing ---- SkewSkewSkewSkew

Clock Clock Clock Clock SkewSkewSkewSkew

Positive Positive Positive Positive skewskewskewskew

Launching edge arrives before the capture edge

Negative Negative Negative Negative skewskewskewskew

Capture edge arrives before the launching edge

Positive and Negative Positive and Negative Positive and Negative Positive and Negative SkewSkewSkewSkew

Impact of Clock Skew on Timing:Impact of Clock Skew on Timing:Impact of Clock Skew on Timing:Impact of Clock Skew on Timing:

Cycle Time (Long Cycle Time (Long Cycle Time (Long Cycle Time (Long Path Path Path Path ���� Setup CheckSetup CheckSetup CheckSetup Check))))

Impact of Clock Skew on Timing:Impact of Clock Skew on Timing:Impact of Clock Skew on Timing:Impact of Clock Skew on Timing:

Race Margin (Short Path Race Margin (Short Path Race Margin (Short Path Race Margin (Short Path ���� Hold CheckHold CheckHold CheckHold Check))))

Impact of Skew on Timing

• Positive skew improves performance

• Negative skew improves race margin

Positive and negatice Clock Skew Example

Clock Insertion delay

Setup Check

Tid-capture-Tid-launch-Tck+Tperiod-Td > Tsu

Hold Check

Tid-launch-Tid-capture+Tck+Td > Th

Tperiod = Target clock period

Tck = Popagation delay of launching flip-flop

Td = Propagation delay of combinational cells

Tsu = Setup time of capture flip-flop

Tid-launch = Clock insertion delay of launch path

Tid-capture = Clock insertion delay of capture path

Setup Slack

SS = Tid-capture-Tid-launch-Tck+Tperiod-Td - Tsu

Hold Slack

HS = Tid-launch-Tid-capture+Tck+Td - Th

Tck

Tid-launch

Tid-capture

Td

Tsu