Standard silicon solar cell

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Transcript of Standard silicon solar cell

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Introduction

Earlier Solar cells were used in spacecrafts.

In 1973,interest increased in renewable energy post oil crisis because of war between Arab and Israel.

Production of solar cell started for terrestrial

use.

A standard technology is used for manufacturing of solar cells.

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Steps for making solar cells

1. Sand to metallurgical grade silicon.

2. Metallurgical grade to semiconductor grade .

3. Semiconductor grade to Si wafer.

4.Conversion of Si wafer to solar cell.

5. Solar cell to solar module.

6.Solar module installation.

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Why Si for making solar cell?

Silicon is 2nd most abundant element in the earth crust (about 28% by mass ) after oxygen.

Stable: in terms of temperature.

Available in the form of sand(SiO2).

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Sand to metallurgical grade Si

Si in the form of crystal(quartzite) is used.

It is then reduced in an arc furnace with some reducing agent like coal ,wooden chips and coke at a high temperature of about .

Molten Si thus obtained is called metallurgical grade Si.

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Arc furnace with chemical reactions involved

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Si is periodically poured from the furnace and blown with oxygen to further purify it

It is then poured into shallow troughs , where

it solidifies and is subsequently broken into

chunks.

MGS of the order of 1 million metric tons is produced globally each year.

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Impurity concentration in MGS

Element Concentration(ppm) Element Concentration(ppm)

Aluminum 1000 – 4350 Manganese 50 -120

Boron 40 – 60 Molybdenum < 20

Calcium 245 – 500 Nickel 10 -105

Chromium 50 – 200 Phosphorus 20 -50

Copper 15 – 45 Titanium 140 – 300

Iron 1550 – 6500 Vanadium 50 – 250

Magnesium 10 – 50 Zirconium 20

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Characteristics of MG-Si

MG-Si obtained is 98-99% pure with major impurities being aluminum and iron.

Energy and raw material intensive(production of one metric ton (1,000 kg) of MGS requires 2500 - 2700 kg quartzite, 600 kg charcoal, 600 - 700 kg coal or coke, 300 - 500 kg wood chips, and 500,000 kWh of electric power ).

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Characteristics of MG-Si contd…

Most of the production ( 70% approx) is used for metallurgical applications (e.g., aluminum-silicon alloys are commonly used for automotive engine blocks)

Applications in a variety of chemical products such as silicone resins account for about 30% or less.

Only 1% or less used for the manufacturing of

high purity Semiconductor grade Si.

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Metallurgical grade Si to Semiconductor grade Si

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Semiconductor grade silicon(EGS)

EGS is one of the purest materials commonly available.

The formation of EGS from MGS is accomplished through chemical purification processes.

The standard process to purify it is known Siemens process.

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Siemens Process

The basic concept involves the

conversion of MGS to a volatile silicon

compound, which is purified by distillation,

and subsequently decomposed to re-form

elemental silicon of higher purity (i.e., EGS).

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Steps involved in Siemens process

Physical pulverization of MGS.

The MG-Si is converted to a volatile compound (Trichlorosilane) that is condensed and refined by fractional distillation.

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The reasons for the predominant use of SiHCl3 in the synthesis of EGS

SiHCl3 can be easily formed by the reaction of anhydrous hydrogen chloride with MGS at reasonably low temperatures (200 - 400 °C).

It is liquid at room temperature so that purification can be accomplished using standard distillation techniques.

It is easily handled and if dry can be stored in carbon steel tanks;

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Its liquid is easily vaporized and, when mixed with hydrogen it can be transported in steel lines without corrosion.

It can be reduced at atmospheric pressure in the presence of hydrogen.

Its deposition can take place on heated silicon, thus eliminating contact with any foreign surfaces that may contaminate the resulting silicon.

It reacts at lower temperatures (1000 - 1200 °C) and at faster rates than does SiCl4.

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Chlorosilane(siemens)process

Trichlorosilane, is synthesized by heating powdered MGS with anhydrous hydrogen chloride (HCl) in the presence of Cu catalyst at around 300 °C in a fluidized-bed reactor.

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SiHCl3 is reduced by hydrogen when mixture of the gases are heated. Si is deposited in a fine grained polycrystalline form onto an electrically heated Si rod.

SiHCl3 + H2→Si + 3HCl

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Schematic representation of the reaction pathways for the formation of EGS using the chlorosilane(siemens) process.

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Characteristics of EGS

Requires a lot of energy.

Low yield ~37% .

Expensive

Purity of about 99.9999% obtained.

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Impurity concentration in EGS

Element Concentration (ppb)

Element Concentration (ppb)

Arsenic < 0.001 Gold < 0.00001

Antimony < 0.001 Iron 0.1-1.0

Boron ≤ 0.1 Nickel 0.1-0.5

Carbon 100 -1000 Oxygen 100-400

Chromium < 0.01 Phosphorus ≤ 0.3

Cobalt 0.001 Silver < 0.001

Copper 0.1 Zinc < 0.1

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Figure showing different methods for Si production and purification

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Silicon type Metallurgical grade

Solar grade Electronicgrade

DesignationMG SG EG

Purity98% 99.9999%

(with 6 nines)99.9999999%

(with 9 nines)

Performance(in solar cells)

inadequate optimal Marginally better than solar grade

Approximate$/kg

$4 $15-50 $50

Availability>1MMtons/year No dedicated

producers~150 Ktons/year

Three Silicon grades and their relative costs/availability

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Semiconductor grade to Si wafer

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EGS to ingot

To convert EGS to ingot , we need to grow a single crystal.

Two techniques are used to grow single crystal :

1. Czochralski (CZ) method

2. Float zone method

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Czochralski Technique

Czochralski-Si grower, called puller

consists of three main components :

1.A furnace, which includes a fused-silica crucible, a graphite suscepter, a rotation mechanism (clock wise) , a heating element, and a power supply.

2. A crystal-pulling mechanism, which includes a seed holder and a rotation mechanism (counter-Clockwise).

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Czochralski Technique

3. An ambient control, which includes a gas source (such as argon), a flow control and an exhaust system

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Czochralaski Technique

High-purity, semiconductor-grade silicon (only a few

parts per million of impurities) is melted in a crucible,

usually made of quartz.

Dopant impurity atoms such as boron or phosphorus

can be added to the molten silicon in precise amounts

to dope the silicon, thus changing it into p-type or n-

type silicon. This influences the electronic properties of

the silicon.

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Czochralski Technique contd…

A precisely oriented rod-mounted seed crystal is

dipped into the molten silicon.

The seed crystal's rod is slowly pulled upwards and

rotated simultaneously.

By precisely controlling the temperature

gradients, rate of pulling and speed of rotation, it

is possible to extract a large, single-crystal,

cylindrical ingot from the melt.

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CZtechnique

1.Melting of poly-

Silicon, doping.

2.Introduction of

Seed crystal.

3.Beginning of

crystal growth.

4.Formed crystal

With residue of

melted silicon.

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Why Czochralski Technique ??

The Vast Majority Of The Commercially grown Silicon uses Czochralski Technique due to :

1. The Better Resistance Of The

Wafers To Thermal Stress

2.The Speed Of Production

3.The Low Cost

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Disadvantages of CZ technique :

A large amount of oxygen in the silicon wafer.

It reduces the minority carrier lifetime in the solar

cell, thus reducing the voltage current and efficiency.

In addition, the oxygen and complexes of the

oxygen with other elements may become active at

higher temperatures, making the wafers sensitive to

high temperature processing.

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FLOATING ZONE TECHNIQUE

Produced by cylindrical polysilicon rod that already has a

seed crystal in its lower end.

An encircling inductive heating coil melts the silicon

material.

The coil heater starts from the bottom and is raised

pulling up the molten zone

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FLOATING ZONE TECHNIQUE

A solidified single crystal

ingot forms below.

Impurities prefer to remain

in the molten silicon so very

few defects and impurities

remain in the forming

crystal

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SINGLE CRYSTAL GROWTH TECHNIQUES

C z o c h r a l s k i G r o w t h (C Z )

M o s t s i n g l e c r y s t a l s i l i c o n m a d e t h i s w a y.

L o w e r q u a l i t y s i l i c o n t h a n F Z w i t h C a r b o n a n d O x y g e n p r e s e n t .

C h e a p e r p r o d u c t i o n t h a n F Z .

P r o d u c e s c y l i n d e r s a n d c i r c u l a r w a f e r s

F l o a t Z o n e ( F Z )

B e t t e r Q u a l i t y t h a n

C Z .

M o r e E x p e n s i v e t h a n

C Z .

P r o d u c e s c y l i n d e r s

a n d c i r c u l a r w a f e r s

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Ingots (poly and monocrystalline)

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Doping Si ingot

To achieve a crystal of desired resistivity, known amount of dopants is added to the melt.For silicon, boron and phosphorous are the

most common dopants for p- and n- type materials

For gallium arsenide, cadmium and zinc are commonly used for p-type material, while selenium , silicon, and tellurium are used for n-type material

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Doping during FZ process

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Slicing into wafers

Ingots are cut into thin wafers for solar cells(100μm to 300μm).

Two techniques :

Wire sawing

Diamond blade sawing

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Cutting of ingot into columns by wire saw

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Characteristics

By present wafering technology its difficult to cut wafers from large crystals as they are

thinner than 300μm and had to retain a reasonable yield.

More than half the silicon is wasted as kerfs or cutting loss in the process.

Time consuming.

Water cooled and dirty.

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Si wafer to solar cell

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Texturing

Diffusion

Edge isolation

(Removal of n-material from edges)

Anti Reflection Coating

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Front Ag printing (Ag printing for collection of generated carriers)

Back pad printing (Ag-Al pad on the back side for soldering)

Back Al printing (Al screen printing to provide contact)

Solar cell

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Texturing surface

To minimize reflection from the flat surface solar cell wafers are textured by creating a roughened surface(pyramids).

By doing this, incident light will have a larger probability of being absorbed into the solar cell.

Performed by etching in a weak alkaline solution such as HF.

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Diffusion process

In diffusion process, impurities are introduced in a controlled manner so as to obtain pn junction in a p-type or n-type wafer.

To make solar cell, n-type impurities must be introduced in p-type wafer to give a p-n junction ,phosphorus is the impurity generally used .

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Phosphorus diffusion process

A carrier gas is bubbled through POCL3 mixed with a small amount of oxygen.

It is then passed down a heated furnace in which the wafers are stacked.

An oxide layer containing phosphorous grows on the surface.

At high temperatures(800—1100°C ) , phosphorous diffuses into Si from the oxide.

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Phosphorus diffusion process

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Phosphorus diffusion process

After about 20 mins , the P impurities override the B impurities in the surface to give a thin , heavily doped n-type region as shown in the figure..

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Vacuum evaporation

Metal contact are then attached to both the n-type and the p-type region ,the metal to be deposited is heated in a vacuum to a high enough temp to cause it to melt and vaporize, it will then condense on any cooler parts of the vacuum system in direct line of sight, including the solar cells, the back contact is normally deposited over the entire back surface, while the top contact is required in the form of a grid.

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Techniques for defining top grid 1. Use a metal shadow mask

2. The metal can be deposited over the entire front surface of the cell and subsequently etched a way from unwanted region using a photographic technique known

photolithography

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The contact made up three separate layer

1. Thin layer of silver and aluminium is used as the bottom layer.

2. Layer of silver in the top with silver finger printing.

3. The aluminium finger printing on bottom side is done.

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Characteristics

Yield of about 90% from starting wafers to completed terrestrial cells can be obtained.

This make the processing very labor-intensive.

The vacuum evaporation equipment is expensive compared to its throughput.

the material expensive such Ag.

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Solar cells to solar module

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Cell Sorting

Tabbing

Stringing

Module Lay up

Lamination & Trimming

Framing

Sealing &Cleaning

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Cell Sorting According to measured parameters of current and

voltage by cell sorter.

At standard irradiation of 1000 W/m^2 by pulsed xenon lamp and standard temperature of 25°C.

Cell sorter measures and displays the following cell parameters: Complete I-V curve, Open circuit voltage ,

Short-circuit current , Short-circuit current density

Peak power, Cell efficiency (η),Fill factor (FF), Series resistance, Shunt resistance.

Max. power output.

To maximize efficiency of solar module by minimizing mismatch between connected cells.

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Tabbing Tabbing refers to connecting flat tab leads to bus bar of solar

cells.

Flat tab leads: Contains 90% silver and 10% impurities.

Now a days tinned copper ribbons are used.

High conductivity.

Two tabs per cell are employed.

Tabs provide accommodation for thermal expansion

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Stringing Stringing is process of series connection of similar rating

tabbed solar cells.

Cells in series = output voltage of a module / voltage of a cell.

Several cell strings can be internally paralleled according to power requirement from module.

Module power = voltage × current. Each cell string is now inspected for continuity of

connections before lay up process

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Module lay upThe laminating materials are laid up in a sequence as shown:

3 to 4 mm thick low iron tempered glass is used.

Ethyl vinyl acetate is a thermoplastic i.e. it’s shape changes under heating are reversible.

Back layer is a composite plastic sheet ( Tedlar-polyster-tedlar) provides insulation to humidity and high- electrical voltage.

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Lamination and trimming Layout is sealed by heating (140°C-150°C) in a

lamination unit.

Laminator creates a pneumatic vacuum inside the module to remove air bubbles and other gases.

EVA flows and soaks the cell.

Excess polymer sheets are trimmed off from the edges.

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Framing Anodized aluminum frame is used.

To make handling easier.

To improve resistance to structural stress and weather conditions.

Frame must be electrically insulated from active cell circuit to sustain high electrical voltage between terminals and frame.

Junction box is attached to back side of frame and connected to laminated solar cell string.

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Sealing and cleaning Sealing is done by using Room Temperature Vulcanizing(RTV) silicone.

Features of RTV silicone rubber:

Light viscosity and good flow ability.

Low shrinkage Favorable tension .

No deformation.

Favorable hardness.

High temperature resistance, acid and alkali-resistance and ageing resistance

The modules are cleaned using mild chemical solution.

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Solar module to solar array

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Electrical characteristics at

STC

Interconnections of modules

Mismatch in modules connected in series

Mismatch in modules connected in parallel

Role of bypass diode and blocking diode.

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Electrical characteristics at STC

Standard Test Conditions

Global radiation = 1000 W/m^2

Ambient temperature = 25°C

Spectral distribution=AM1.5

Wind speed = 1 m/s

Electrical characteristics

Short circuit current (Isc)

Open circuit current (Voc)

Maximum power output (Pmax)

Fill-factor (FF)

Normal Operating Cell Temperature (NOCT)

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Interconnections of modules

Solar modules are connected in series or parallel depending upon the voltage and current requirement at the output.

Modules in series = (Total battery bank voltage)/ 12 V

Modules in parallel = (Array peak amp.) / (Peak amp. Per

modules)

where, Array peak amp. = (Average Ah per day to be supplied by the array) / (peak sunshine hour per day)

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When two or more modules with different electrical properties are connected, the output power is determined by the modules with the lowest output power.

Interconnections have suitable bypass and blocking diode.

Mostly mismatch occur due to difference in either Isc or Voc.

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Mismatch in module connected in series

In series connections, mismatch due to Voc and Isc occurs.

Mismatch in Voc of modules connected in series :

No mismatch in current rating, same current will be flow in the all modules.

Total output voltage is summation of voltage rating of individual module.

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I-V characteristic of the resultant module of different Voc

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Mismatch in Isc of modules connected in series

Current in array is due to module with the least current and further this modules act as a load.

Power gets dissipated in the poor module and this leads to:

Irreversible damage.

Hot spot formation

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Mismatch in modules connected in parallel

Mismatch in parallel connections is not as severe in series.

The voltage across the module combination is always the same.

The current from the combinations of modules is the sum of the currents in the individual modules

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Role of bypass diode and blocking diode

The bypass diode is connected in parallel but with opposite polarity.

Normally, for a 36-cell modules, two bypass diode are used.

It blocks the current from flowing in to the shaded modules from the parallel module.

It also prevents the flow of current from the battery to the module during in night or rainy season.

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Uses of blocking and bypass diode

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