Spice Tutorial

Creating Subcircuits and Hierarchical Blocks in LTspice Mike Kelsch January 2007

This tutorial gives some techniques for creating Subcircuits and Hierarchical Blocks using LTspice /SwitcherCAD III Version 2.19p (available free from Linear Technology at: http://www.linear.com/company/software.jsp). Subcircuits: Subcircuits allow the designer to create a model or circuit for a device that may be used many times in a schematic (and saved for later use in other circuits). Each instance of the device can use the same “parameters” (values) or the parameters can be changed on an instance-by-instance basis. The advantage of a subcircuit is that one symbol on a schematic can represent another circuit. Whenever that symbol is placed on the schematic, the entire subcircuit is placed. This allows for ease of design with more clarity on the schematic. Procedure: 1) Create a netlilst using a text editor such as notepad.

a) use the .subckt statement followed by the name of the subcircuit followed by the pins (e.g. .subckt myopamp 1 2 3) (see example). The numbers will be used as node numbers for connection to other components (0 is ground). The order of the numbers will be the order used for the “pin/port netlist order” on the symbol.

b) End the subcircuit with the .ends statement (e.g. .ends myopamp). c) Save the netlist as filename.lib or filename.sub, the name does not have to be the

same as the name of the subcircuit (in fact, more than one subcircuit can be included in a .lib or .sub file. See “Notes on Saving”

2) Draw a symbol to represent the device. a) Select File New Symbol, to open the Symbol Editor. b) Draw the symbol using the Draw menu and the Line, Rect, Circle, etc. commands. c) Place the pins. Select Edit Add Pin/Port to get the Pin/Port Properties dialog

box. At the top right is the Netlist Order box. This order corresponds to the order of the pins in the subciruit. A label can be inserted using the Label box (e.g. Vin), but has nothing to do with the function of the pin. The pin's function relates to the connection specified in the subcircuit netlist. To make the label visible select one of the Pin Label Position buttons.

d) Some information, such as, Instance Name can be added by selecting Edit Attributes Attribute Window and selecting the information. Clicking OK

will allow pasting on the symbol

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Creating Subcircuits and Hierarchical Blocks in LTspice

3) Open the Symbol Attribute Editor to enter the appropriate information.

a) Select Edit Attributes Edit Attributes. i) Select Cell in the Symbol Type drop-down box. ii) Select Prefix, type X in the Prefix = box. X tells LTspice that this is a

subcircuit. iii) In the Value field type the name of the .subckt (e.g. myopamp) iv) SPICELine can be used to pass parameters. v) Leave ModelFile blank.

b) Save the symbol, File Save As saves the file as a *.asy. See “Notes on Saving” 4) On the schematic, include a SPICE Directive with the path of the subcircuit file (e.g.

.lib C:\Program Files\LTC\SwCADIII\My Work\OpampExample.lib). Here is an example of an ideal op-amp subcircuit: Step 1. Create a subcircuit netlist using a text editor. *Ideal Op-Amp * V- V+ Out .subckt myopamp 1 2 3 g1 3 0 2 1 100Meg .ends myopamp

“*” means this is a comment This line is for clarity only Subcircuit named myopamp with three pins Dependent source with nodes and gain End of the subcircuit

Save As OpampExample.lib (in this example the full path is:

C:\Program Files\LTC\SwCADIII\My Work\OpampExample.lib)

This is what a schematic of the subcircuit would look like. “g1” is a linear voltage controlled current source with pins of <+node><-node><+controlling node> <-controlling node><gain>. Now when the symbol is made the “netlist order” of the pins will be Inverting Input (pin 1), Non-Inverting Input (pin 2), Output (pin 3).

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Step 2. Pin1 Pin2

Pin3

The Inverting pin is on top and has a “netlist order” of 1. The Output is pin 3. Unnn was created by Edit Attributes Attribute Window and selecting InstName. This will appear as U1, U2, etc on the schematic.

Step 3.

Select Edit Attributes Edit Attributes.

Symbol Type Cell Prefix X Value myopamp The name of the subcircuit, “myopamp,” is placed in the Value field. This is the name that follows the .subckt statement in the netlist, not the name of the file. File Save As myopamp.asy

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Step 4.

.lib statement tells LTSPICE where to find the file “OpampExample.lib” which contains the subcircuit “myopamp.”

Notes: Right clicking on U1 will bring up the Component Attribute Editor. Here information can be made visible on the schematic by selecting the desired line and checking the Visible box. Notice an x is shown in the V column indicating the instance name (U1) will be visible on the schematic. This editor will also allow changes to the attributes listed. The path of the device symbol is shown to the right of the Open Symbol button.

Selecting the Open Symbol button opens the symbol for the device. With the symbol opened the Edit Attributes commands can be used in the same manner described in steps 2d and 3.

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The open symbol can be edited using the Edit Attributes commands.

Hierarchical Blocks: Creating Hierarchical Blocks is similar to using a subcircuit in that a symbol can represent another circuit in a schematic. The hierarchical block is a schematic that is represented on a higher-level schematic by a symbol. In the example on subcircuits, a netlist represented an op-amp then a symbol representing that subcircuit was placed on the schematic. For a hierarchical block, a schematic is created to model the op-amp and a symbol is made to represent the schematic of the op-amp. The op-amp’s schematic is a lower-level schematic. Selecting the symbol on the higher-level schematic allows viewing of the lower-level circuitry. Once open the voltages and currents can be probed just as in the higher-level schematic. Procedure: 1) Create a schematic of the device to be represented by a block.

a) Use LTspice’s schematic capture to draw the circuit. If semiconductor models or subcircuits are used, add a .lib directive with the path and name of the file.

b) Label any nodes that will be connected to the higher-level circuit. Select Edit Label Net. In the box next to ABC type a name or number. Port Type select None (or as desired).

c) Save the schematic as a *.asc file (e.g. oaBlock.asc). This can be saved in a working directory. “Notes on Saving”

2) Create a symbol to represent the lower level schematic. a) Select File New Symbol, to open the symbol editor. b) Draw the symbol using the Draw menu and the Line, Rect, Circle, etc. commands. c) Place the pins. Select Edit Add Pin/Port to get the Pin/Port Properties dialog

box. At the top right is the Netlist Order box. The Netlist Order is not crucial but the Label box (left of the Netlist Order box) is very important. The Label box must match the Net labels from step 1b. To make the label visible select one of the Pin Label Position buttons (if desired).

d) Some information, such as, Instance Name can be added by selecting Edit Attributes Attribute Window and selecting the information. Clicking OK

will allow pasting on the symbol.

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3) Open the Symbol Attribute Editor. Select Edit Attributes Edit Attributes. Select Block from the Symbol Type drop-down box. Leave all attributes blank. Save the symbol, File Save As saves the file as a *.asy. See “Notes on Saving”

4) Now the component can be placed in a new schematic. Here is an example of an ideal op-amp using a hierarchical block: Step 1.

Schematic created using “g” from the symbol library using the Select Component Symbol dialog box (Edit Component). Nodes Labeled using Edit Label Net. Numbers or names can be used. File Save As oaBlock.asc

Step 2.

A new symbol can be created or a previously created symbol can be used. Here myopamp.asy from the previous example is used.

In the Label box of the Pin/Port Properties dialog box enter the label that matches the schematic oaBlock.asc. If making a new symbol from scratch use Edit Add Pin/Port. If using a previously created symbol Right Click on the pin to get the Pin/Port Properties box. Here the pin labels are visible, this is optional.

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Step 3.

Select Edit Attributes Edit Attributes. Select Block from the Symbol Type drop-down box. Leave all attributes blank. Save the symbol File Save As oaBlock.asy

Insert the component in the schematic. The displayed name was X1. Change its name (if desired) by placing the cursor over the label, Right Clicking and replacing X1 with op_amp.

Notes: Right clicking on the component brings up the Navigate/Edit Schematic Block dialog box. The Symbol or its Schematic can then be opened. If the lower level schematic is opened it’s symbol can be opened from the Hierarchy menu.

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Passing Parameters: Curley Brackets and the .param statement can be used to pass parameters to components. Curley brackets enable the use of variables. The .param statement can be used to specify values for the variables. For example:

.subckt V_opamp 1 2 3 ro 3 0 Rout co 3 0 Cout e1 3 0 1 2 Ao .param Cout=1/2/pi/fo/Rout .param Ao=-A .ends V_opamp

Here variables are set using a combination of curly brackets and .param statements. This allows the use of one subcircuit with parameters being changed on the schematic, using the Component Attribute Editor, instead of in the netlist. Right Clicking the component can access the editor. To use this method add the variable names and values to the SpiceLine and SpiceLine2 values (e.g. A=100meg) when first creating a symbol (see number 3 of the subcircuit procedure). Alternatively, for an existing symbol use the Component Attribute Editor. Each instance of a component can have different parameters through use of the Component Attribute Editor. A .param statement can also be placed on a schematic as a SPICE Directive. Model Statements: Some devices, such as, transistors and diodes require information on the device in order to make calculations. A .model statement tells LTspice what parameters to use for modeling semiconductors. However, LTspice uses default models even if a model file is included. To use models other than the default select Tools Control Panel Netlist Options tab and uncheck the Semiconductor Models boxes. Remember to use a .lib or .include directive to include the path of the model file (e.g. .lib C:\Program Files\LTC\SwCADIII\My Work\CMOS.lib).

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Uncheck the Semiconductor Models boxes when not using LTspice default models. When not using default models a .model statement must be included on the schematic with the path and name of the model file (e.g. .lib C:\Program Files\LTC\SwCADIII\My Work\CMOS.lib).

Notes on Saving: LTspice searches for the needed files as specified in the .lib or .include statement that is placed on the schematic or in a netlist. If no statement exists, LTspice looks in the SwCDIII\lib\cmp, SwCDIII\lib\sub, or the path of the schematic. It is recommended to always use the .lib or .include directive to avoid error messages. Here are a couple of techniques that might avoid headaches later.

1) Make a working directory in the SwCADIII folder (e.g. C:\Program Files\LTC\SwCADIII\My Work). Save all your schematics in this directory.

2) Make a directory in the C:\Program Files\LTC\SwCADIII\lib\sym directory to save all newly created symbols. This allows selection of a device from the Select Component Symbol dialog box by locating the directory and selecting from the list. Now custom components can be kept separately from Linear Technology’s library of symbols. Creating a directory called MyLib (C:\Program Files\LTC\SwCADIII\lib\sym\MyLib) is shown. Double clicking on MyLib opens the new directory and lists the available symbols.

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A directory called “MyLib” was created in the C:\Program Files\LTC\SwCADIII\lib\sym directory. Closing and restarting LTspice then opening the Select Component Symbol dialog box (Edit Component) shows the directory. Double clicking on the directory opens it. Save all symbols (*.asy files) in this directory and they will now be available. Each time a new symbol is saves, close and restart LTspice.

Setting User Preferences: Color preferences for background, schematic components and text, and plots can be changed using the Color Palette Editor. Select Tools Color Preferences. To eliminate the saving of files generated during simulations (.raw .log files etc.), select Tools Control Panel Operations Tab and select yes to Automatically Delete…. Schematic font sizes can be found on the Control Panel Drafting Options Tab. Also on the Drafting Options Tab is the Hot Keys Button. This screen allows for customizing Keyboard shortcuts for commonly performed tasks. The SPICE Netlist and Error Log can be accessed from the View menu and come in handy during troubleshooting. A Netlist can be exported as a .net file using Tools Export Netlist. I hope this information is useful. To leave comments: [email protected] Mike Kelsch Additional information is available from the following: LTspice user’s manual http://ltspice.linear.com/software/scad3.pdf LTspice user’s group http://tech.groups.yahoo.com/group/LTspice/ Linear Technology http://www.linear.com/

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Works Cited

Sennewald, Helmut 2006 Third Party Models http://tech.groups.yahoo.com/group/LTspice/ Tront, Joseph G. 2004 Pspice for Basic Circuit Analysis New York: McGraw Hill LTspice Users Manual http://ltspice.linear.com/software/scad3.pdf Winspice Tutorial

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Glossary

Device: A circuit component. This could simply be a resistor or a complex circuit (e.g an op-amp) which is represented on the schematic by a symbol. Instance: each time a component or device is placed on a schematic, it is called an instance of that device. For example if a circuit contains three Op-amps, each individual op-amp is an “instance” of that op-amp. Each instance is identified by a letter representing the type of component (e.g. R for resistor) followed by a unique number. Instance numbers can be changed and can contain numbers and or letters as long as no two instances have the same label. Instances can have different parameters (values). Netlist: A text file representing a circuit. LT Spice recognizes files ending in “.cir .net, and .sp” as netlists. The first line of a netlist is taken to be a comment, so begin all netlists with a comment. End a netlist with the “.end” statement. WinSPICE uses filename.cir and PSPICE uses filename.net. Parameters: Values for a device or used for calculating the values for the device. Parameters can be assigned by use of a .param statement or by use of curly brackets in a subcircuit. SPICE Directive: A command telling a SPICE program to perform an operation. SPICE directives can be included in netlists (as for a subcircuit) or placed on the schematic. These directives begin with a period. Some examples: .lib, .include, .subckt, .model, .tran. Place a SPICE directive using Edit SPICE Directive or use the “.op” icon. Symbol: A user created drawing used to represent a device. The device could be described by a subcircuit or a hierarchical block. To make a symbol select File New Symbol. Then use the Draw menu to add shapes and text. The shapes have no electrical connection. The electrical connection is established by placing pin/ports using the Edit Add Pin/Port command.

SPICE SIMULATION

TUTORIAL

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1. SPICE Language

1.1 Anatomy of a SPICE DeckSpice netlist with control and element statements are called a SPICE deck. The starting

statement must be a comment (denoted by asterisk '*'). It ends with a .end statement

followed by a carriage return <CR> ('enter' button).

1.2 SuffixThe following suffixes are used throughout a SPICE deck to simplify writing numbers. Note

that the suffix for Mega is 'MEG' not 'M' which is for milli. SPICE deck is case insensitive so

it does not matter if you write 1MEG or 1meg

T 1012 Tera

G 109 Giga

X or MEG 106 Mega

k 103 kilo

m 10-3 milli

u 10-6 micro

n 10-9 nano

p 10-12 pico

f 10-15 femto

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* TITLE STATEMENTELEMENT STATEMENTS

.

.

.COMMAND (CONTROL) STATEMENTSOUTPUT STATEMENTS.END <CR>

1.3 Passive Circuit ElementsCircuit elements start with the element name followed by node names and element value.

The element name must start with a designated character for each element. Node name

can be any number, character or word except the number '0' which is used to denote

ground. Units of the circuit elements such as ohm, Farad and Henry need not be specified.

A. ResistorResistor must start with the character R (does not matter upper case or lower case) The syntax for resistor is:

Rxxx N1 N2 value

N1 and N2 are the node names. value is the value of the resistance in ohms. The following are valid examples of resistor:

R1 vdd 0 100

Rout out gnd 50k

rin23 4 6 20u

The first statement shows that 100 Ω is connected between node vdd and ground (remember that node 0 is ground).

The second statement shows that 50 kΩ is connected between node out and node gnd. Node gnd does not necessary mean that it is ground. It is just a name.

The third statement shows that 20 µΩ is connected between node 4 and node 6.

B. Capacitor and InductorCapacitor must start with the character C while inductor must start with the character L. The syntax for capacitor and inductors are:

Cxxx N1 N2 value IC=a

Lxxx N1 N2 value IC=b

IC stands for initial condition. You may specify an initial condition for the capacitor voltage and the inductor current. This option is optional. If nothing is specified, SPICE will use the default value which is zero. Examples are below:

CLoad load vss 1p

CLoad load vss 1p ic=2

L23out 23 24 1n ic=2m

L11abc cc bb 1u

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1.4 Voltage/Current SourcesVoltage sources start with the letter V while current sources start with the letter I. The node

names to which the sources are connected have polarity.

A. DC and AC SourceDC source is used for operating point analysis and DC sweep. AC source is used in AC analysis. Examples are below.

Vxx N+ N- 6V

Vxx N+ N- DC=6

VL12 positive negative AC=1

Vin 2 3 DC 6 AC 1

The first two examples are the same (6V DC voltage source). The unit of voltage V in the first example is ignored by SPICE. The third example is a 1V AC voltage source.The forth example is a 6V DC as well as 1V AC source. The AC part is ignored during DC sweep or operating point analysis and vice-versa during AC analysis.

B. Sinusoidal SourceSyntax and examples are below.

Vxx N+ N- SIN(offset amplitude frequency_hertz)Vin in gnd sin(1 2 1k)

C. Piece-wise Linear SourceThis source connects various time-voltage pair with a straight line.

Vxx N+ N- PWL(T1 V1 T2 V2...)

Vin 2 3 PWL(1u 5V 3u 2v)

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C. Pulse SourceThis source puts out a square wave. Do not put zero for rise and fall time (Tr and Tf).

Vxxx N+ N- PULSE(Vo V1 Td Tr Tf Tw To)

For all of the above, to get a current source, simply replace Vxx with Ixx

1.5 Dependent SourcesThere are four types of dependent sources voltage-controlled voltage source (VCVS),

voltage-controlled current source (VCCS), current-controlled voltage source (CCVS), current-

controlled current source (CCCS).

VCVS: Exxx N+ N- NC1 NC2 ValueVCCS: Gxxx N+ N- NC1 NC2 ValueCCVS: Hxxx N+ N- Vcontrol Value

CCCS: Fxxx N+ N- Vcontrol Value

N+ and N- are the positive and negative terminals of the dependent source, respectively.

NC1 and NC2 are the positive and negative terminals of the controlling voltage source,

respectively. Vcontrol is the zero value voltage source used to measure the controlling

current (the positive current flows into the positive terminal of the controlling voltage

source). Value is a multiplier value. In math terms: Value*(NC1-NC2)=(N+ – N–)

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1.6 Semiconductor DevicesSemiconductor devices have model to describe its behavior. The model is given by the manufacturer of the device. To accurately simulate the behavior of a particular device, you need to use the device model given by the manufacturer. The model definition can be before or after the element statement.

A. DiodeElement syntax: Dxxx N+ N- ModelName

model statement: .model ModelName D (manufacturer model definition)Example:

Dload middle out D1N4148.model D1N4148 D (IS=0.1PA, RS=16 CJO=2PF TT=12N BV=100 + IBV=0.1PA)

It is up you what to put as the model name. In this case, D1N4148 is the model name. In the .model definition, you need to use the same name D1N4148.

B. Bipolar Junction TransistorElement syntax: Qxxx collector Base Emitter ModelName

model statement:.model ModelName NPN (manufacturer model definition)

OR.model ModelName PNP (manufacturer model definition)

Example:Q1 out in 0 Q2n222.model Q2n222 NPN (IS=14.34F XTI=3 EG=1.11 VAF= 74.03+ BF=255.9 NE=1.307 ISE=14.34F IKF=.2847 XTB=1.5 BR=6.092+ NC=2 ISC=0 IKR=0 RC=1 CJC=7.306P MJC=.3416 VJC=.75 FC=.5 + CJE=22.01P MJE=.377 VJE=.75 TR=46.91N TF=411.1P ITF=.6 + VTF=1.7 XTF=3 RB=10)

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This tells SPICE that the model definition is of type diode

All statements are expected to finish on a single line. '+' extends the statement onto the following line if there is not enough room

Node names

Choose one depending on the transistor type

C. MOSFETElement syntax: Mxxx drain gate source bulk ModelName L=a W=b

model statement:.model ModelName NMOS (manufacturer model definition)

OR.model ModelName PMOS (manufacturer model definition)

Example:M1 out in 0 0 nch L=1u W=2u.MODEL nch NMOS ( LEVEL = 49+VERSION = 3.1 TNOM = 27 TOX = 4E-9+XJ = 1E-7 NCH = 2.3549E17 VTH0 = 0.363908+K1 = 0.5802969 K2 = 3.304956E-3 K3 = 1E-3+K3B = 2.396754 W0 = 1E-7 NLX = 1.77724E-7+DVT0W = 0 DVT1W = 0 DVT2W = 0)

Refer to SPICE manual for more details.

1.7 SPICE Examples Write down the SPICE netlist corresponding to the circuit in Fig 1.7.1.

* SPICE netlist of Figure 1.7.1* example circuit 1* Name: SF* Date: 31/5/2006R1 in out 1kR2 out 0 2kVin in 0 DC = 10R3 out 0 2k.end

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Length and width of the MOSFET

Choose one depending on the transistor type

R11k

R22k

VinDC = 10 R3

2k

out

in

Fig 1.7.1

Write down the SPICE netlist corresponding to the circuit in Fig 1.7.2.* SPICE netlist of Figure 1.7.2* example circuit 2* Name: SF* Date: 31/5/2006M1 out input N002 0 NMOS L=1u W=2uR1 N001 out 3kR2 N002 0 100Vsin input 0 sin (0 2 795.8)Vdd N001 0 10V.model NMOS NMOS (....).end

All circuits must have a DC path to ground. All circuits must have ground node.

Write down the SPICE netlist of a circuit with an arbitrary input current wave (use piece-wise linear source)

* SPICE netlist of Figure 1.7.4* example circuit * Name: SF* Date: 31/5/2006I1 0 in PWL(0 0 1m 2m 2m 0 3m 2m)R1 in N003 10kC1 in N003 10uL1 mid 0 10u.end

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Fig 1.7.2

M1NMOS

R13k

R2100

Vsin

2 sin (5000t)

Vdd10V

out

input

Freq must be in Hertz

C11p

C21p

V1

Node floating. No DC path to ground. May cause problem

Fig 1.7.3Must have ground

I1

R110k

C1

10µ

L1

10µ

Fig 1.7.4

Draw the waveform of the current

Model definition here

L=1u W=2u

1.8 SubcircuitSubcircuit is like function in C programming. If a particular circuit is used repeatedly

throughout a design, using subcircuit saves time. The syntax of subcircuit is the following:

.subckt subname N1 N2 N3element statements

.

.

..ends subname

in which subname is the subcircuit name and N1, N2, and N3 are nodes accessible

externally (can be input or output). The nodes cannot be named 0. The scope of the nodes

in the subcircuit element statements is strictly local. The syntax for subcircuit instantiation

is as follows:Xname N1 N2 N3 subname

Example of inverter subcircuit:.subckt invert 1 2 3 4m2 4 2 3 4 modp L=1u W=2um1 3 2 1 1 modn L=1u W=1u.ends invert

vcc 3 0 5vvin 1 0 pulse(0 5 0 .1ns .1ns 20ns 40ns)x1 0 1 2 3 invertx2 0 2 4 3 invertx3 0 4 5 3 invertc1 5 0 1pf.model modn nmos (.....).model modp pmos (.....).end

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You can define as many nodes as you want

Must correspond to the number of nodes defined in subcircuit definition

Start with the letter 'X'

The location of the subckt definition can be anywhere within the SPICE deck. You can also put it at the end of the SPICE deck.

Put NMOS and PMOS model definition here

Subcircuit instantiation

2. Analyses

2.1 Control Statements.OP StatementSPICE uses this statement to compute DC operating point:

voltage at every node current in each voltage source

.DC StatementThis statement is used to sweep an independent source over a specified range. The format is as follows:

.DC SRCname START STOP STEPwhere SRCame is the name of the independent source. START, STOP and STEPare the start value, ending value and the increment. Example sweeping voltage source Vin from 0 – 3.3 V at an increment of 0.1 V is as follows:

.DC vin 0 3.3 0.1

.AC StatementThis statement is used to perform frequency analysis about the operating point. The syntax is:

.AC LIN NP FSTART FSTOP

.AC DEC ND FSTART FSTOP

.AC OCT NO FSTART FSTOP

LIN, DEC, and OCT are linear, decade and octave frequency variation. NP, ND and NO are the number of points. Example of AC analysis from 500 Hz to 1 MHz at 20 points for every decade:

.AC DEC 20 500 1MEG

.TRAN StatementThis statement is used to perform analysis versus time. The syntax is:

.TRAN TSTEP TSTOP <TSTART>

TSTEP, TSTOP and TSTART is the sampling time, stop time and start time (optional).

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.TF StatementThis statement is used to calculate the DC transfer function of the circuit. The syntax is:

.TF output inputsource

output and inputsource are output node and the name of the input source. The output of this statement will be the gain, input resistance and output resistance. For example:

.TF V(out) Vin1

2.2 Output Statements.PRINT and .PLOT StatementSPICE uses this .PRINT statement to print the output in ASCII format while .PLOT is used to plot the output graphically. For example:

.plot tran V(vin) V(vout)

.print AC I(Vin) I(vout) V(2) V(3,0)

2.3 Including Files.INCLUDE StatementSyntax is:

.include filenameExample:

.include opamp.cir

.include “new opamp.cir”

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Can be AC, or DC also The variable to be printed

The name of voltage source is 'Vin'

Voltage between node '3' and ground

3. Sample netlists

Example 1* BJT DC sweep.include ZMODELS.mod .DC VCE 0 15 .5.PRINT DC I(VC) IB 0 1 Q1 2 1 0 BC338AP VC 3 2 VCE 3 0 .END

Example 2Plot the Vgs vs Ids curve of a transistor* the first line is always a comment.DC VGS 0 2 0.1VDS VDSA 0 DC 1VGS VGSA 0 DC 0M1 VDSA VGSA 0 0 NMOSA L=5u W=25u.plot DC I(Vds).op

* 1 um Level 3 models.MODEL NMOSA NMOS LEVEL = 3+ TOX = 200E-10 NSUB = 1E17 GAMMA = 0.5+ PHI = 0.7 VTO = 0.8 DELTA = 3.0+ UO = 650 ETA = 3.0E-6 THETA = 0.1+ KP = 120E-6 VMAX = 1E5 KAPPA = 0.3+ RSH = 0 NFS = 1E12 TPG = 1+ XJ = 500E-9 LD = 100E-9+ CGDO = 200E-12 CGSO = 200E-12 CGBO = 1E-10+ CJ = 400E-6 PB = 1 MJ = 0.5+ CJSW = 300E-12 MJSW = 0.5

.MODEL PMOSA PMOS LEVEL = 3+ TOX = 200E-10 NSUB = 1E17 GAMMA = 0.6+ PHI = 0.7 VTO = -0.9 DELTA = 0.1+ UO = 250 ETA = 0 THETA = 0.1+ KP = 40E-6 VMAX = 5E4 KAPPA = 1+ RSH = 0 NFS = 1E12 TPG = -1+ XJ = 500E-9 LD = 100E-9+ CGDO = 200E-12 CGSO = 200E-12 CGBO = 1E-10+ CJ = 400E-6 PB = 1 MJ = 0.5+ CJSW = 300E-12 MJSW = 0.5.end

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.MODEL BC338AP NPN IS=3.941445E-14 BF=175 VAF=109.45 NF=1 IKF=.8+ISE=7.4025E-15 NE=1.3 BR=20.5 VAR=14.25 NR=.974 IKR=.1 ISC=3.157E-13+NC=1.2 RB=1.1 RE=.1259 RC=.0539 CJE=63E-12 TF=.75E-9 CJC=15.8E-12+TR=85E-9 VJC=.505 MJC=.39

Put in a separate file

named ZMODELS.mod

Simulate the above netlist by drag and drop the netlist file onto winspice shortcut on the desktop. You will obtain the following plot:

The plot is upside down because SPICE assumes that current is negative if it comes out of the positive terminal of a battery. To correct this, type:

WinSpice 1 -> plot -I(Vds)

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Example 3* testing OPAMP*include subcircuit.include "C:\opamp.sp"

* netlistXA Vin mid out opamp741R1 out mid 2kR2 mid gnd 1k

*StimulusVgnd gnd 0 0Vin Vin gnd sin(0 1m 1k)

.tran .05m 3m

.plot tran V(Vin) V(out)

.end

Simulate the above netlist by drag and drop the netlist file onto winspice shortcut on the desktop. You will obtain the following plot:

Drag a bounding box on the plot to zoom in.

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* Subcircuit for 741 opamp

.subckt opamp741 1 2 3

* +in (=1) -in (=2) out (=3)

rin 1 2 2megrout 6 3 75e 4 0 1 2 100krbw 4 5 0.5megcbw 5 0 31.85nfeout 6 0 5 0 1

.ends opamp741

Example 4: Calculate the gain of the following circuit

* calculate gain of the following circuit* used Vdd = 5

M1 Vdd Vdd out out NMOSA L=1u W=1.5uM2 out in 0 0 NMOSA L=1u W=4uVin in 0 1V1 Vdd 0 5

* 1 um Level 3 models .MODEL NMOSA NMOS LEVEL = 3+ TOX = 200E-10 NSUB = 1E17 GAMMA = 0.5+ PHI = 0.7 VTO = 0.8 DELTA = 3.0+ UO = 650 ETA = 3.0E-6 THETA = 0.1+ KP = 120E-6 VMAX = 1E5 KAPPA = 0.3+ RSH = 0 NFS = 1E12 TPG = 1+ XJ = 500E-9 LD = 100E-9+ CGDO = 200E-12 CGSO = 200E-12 CGBO = 1E-10+ CJ = 400E-6 PB = 1 MJ = 0.5+ CJSW = 300E-12 MJSW = 0.5

.tf V(out) Vin

.end

Simulate the above netlist by drag and drop the netlist file onto winspice shortcut on the desktop. You will obtain the following at the prompt:

Circuit: * calculate gain of the following circuit

TEMP=27 deg CTransfer function analysis ...transfer_function = -1.91108e+00output_impedance_at_v(out) = 2.010457e+04vin#input_impedance = 1.000000e+20WinSpice 1 ->

The gain of the circuit is -1.91.

15

VDD

M1NMOSAL=1u W=1.5u

M2NMOSAL=1u W=4uVin

1

out

in

Fig 3.1.1

Example 5: Find the frequency response of the following circuit* frequency response of uA741 OPAMP

XU2 0 N001 vdd vss out UA741R1 N001 in 2kRf out N001 100kRLoad out 0 10kVin in 0 AC 1Vdd vdd 0 15Vss vss 0 -15

.temp 50

.AC DEC 30 100 1G

.plot VDB(Out)

.plot VP(Out)

* UA741 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT* CREATED USING PARTS RELEASE 4.01 ON 07/05/89 AT 09:09* (REV N/A) SUPPLY VOLTAGE: +/-15V* CONNECTIONS: NON-INVERTING INPUT* | INVERTING INPUT* | | POSITIVE POWER SUPPLY* | | | NEGATIVE POWER SUPPLY* | | | | OUTPUT* | | | | |.SUBCKT UA741 1 2 3 4 5* C1 11 12 4.664E-12 C2 6 7 20.00E-12 DC 5 53 DX DE 54 5 DX DLP 90 91 DX DLN 92 90 DX DP 4 3 DX EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5 FB 7 99 POLY(5) VB VC VE VLP VLN 0 10.61E6 -10E6 10E6 10E6 -10E6 GA 6 0 11 12 137.7E-6 GCM 0 6 10 99 2.574E-9 IEE 10 4 DC 10.16E-6 HLIM 90 0 VLIM 1K Q1 11 2 13 QX Q2 12 1 14 QX R2 6 9 100.0E3 RC1 3 11 7.957E3 RC2 3 12 7.957E3 RE1 13 10 2.740E3 RE2 14 10 2.740E3 REE 10 99 19.69E6 RO1 8 5 150 RO2 7 99 150 RP 3 4 18.11E3 VB 9 0 DC 0 VC 3 53 DC 2.600

VE 54 4 DC 2.600

16

U2

opamp2

VDD

VSS

R1

2k

Rf

100k

RLoad10k

VinAC 1

in out

Fig 3.1.1

VLIM 7 8 DC 0 VLP 91 0 DC 25 VLN 0 92 DC 25.MODEL DX D(IS=800.0E-18).MODEL QX NPN(IS=800.0E-18 BF=62.50).ENDS UA741.end

Simulate the above netlist by drag and drop the netlist file onto winspice shortcut on the desktop. You will obtain the following plots:

17

Netlist Entry with DC Operating Points (bias) Analysis using LTSPICE

Introduction:

The purpose of this manual is to guide students on how to simulate a simple DC circuit

using netlist entry. Netlist is a text file that describe on how the components in the circuit

is connected. The description of the circuit connection is written using SPICE format.

Refer to SPICEtutorial.pdf to get better understanding on how to write circuit description

using SPICE

(Download http://metalab.uniten.edu.my/~sulaiman/file/SPICEtutorial.pdf)

Basic Steps to Run Simulation

Figure 1: Simple schematic diagram

1. For this manual, the circuit shown in Figure 1 is used to do the simulation to get

the currents and voltages at each node. The circuit description (netlist) is written

using a text editor (e.g. Notepad).

Figure 2: Netlist written using Notepad

1 2

2. Save the file with any name (preferably the name consists of one word only)

followed by extension .cir. Make sure to set the Save as type: to All files. (Refer

Figure 3

Figure 3: Saving the netlist

3. Open up the LTSPICE software( ). Go to menu File > Open. Then, set the

Files of type: to Netlist(*.cir,*.net,*.sp). Find the file that has been saved before

and open it.

Figure 4: Opening the netlist in LTSPICE

File name followed

by .cir extension

Set Save as type: to

All files

Set the Files of type: to

Netlist (*.cir,*.net,*.sp)

4. Once the netlist is loaded, click the Run button.

Figure 5: Clicking the Run button

5. The simulation result will be obtained as shown in Figure 6

Figure 6: Simulation result

6. To print the simulation result it will be easier to convert it into a text form. To do

that, left click at the simulation result. Then press <Ctrl> + <C> on the keyboard.

Next, open a word processing program ( Microsoft® Word, Notepad ..). After that

press <Ctrl> + <V> to copy the simulation result into the word processing

program

Interpret the Simulation Result

The simulation results obtained using the .op commad in the netlist will show the

voltages at each node referring to ground and the current follow through each component.

The notation used for voltage is -> V(node label). The node label is always

referred to the netlist. For example, V(2) is referred to voltage at node 2 with respective to

ground as been label in the schematic as shown in figure 1. To obtain other voltages

which is not specify in the simulation result, the user need to manually compute by doing

necessary arithmetic operation. For example, the voltage across the resistor R1 is equal to

V(1) minus V(2).

Run button

The notation used for current is -> I(component). The component will also always

refer to the netlist. The positive value of current shows the current flow from the first

node to the second node as been specified in the netlist. On the other hand, negative value

of current indicates the current flow from the second node to first node. For example,

referring to the netlist as shown in figure 2, R1 connection is described as follows:

Component First

Node

Second

Node

Value

R1 1 2 2k

The value current flow through R1 [I(R1)] is 0.003A or 3mA. Since the value is

positive, the direction of current flow is from Node 1(First Node) to Node 2(Second

Node). Another example, referring to the netlist as shown in figure 2, V1 connection

is described as follows:

Component First

Node

Second

Node

Value

V1 1 0 DC=12

The value current flow through V1 [I(V1)] is -0.003A or -3mA. Since the value is

negative, the direction of current flow is from Node 0(Second Node) to Node 1(First

Node)

Author’s note

This manual is prepared to help students to do the simulation assignment of Experiment 3

of Electrical/Electronics Measurement Labs. Any comment to further improve the

manual is much appreciated and can be forwarded to [email protected]. Your

comment and suggestion may help other student to better utilize the manual. Thank you!

Schematic Entry and Transient Analysis for LTSPICE

In Experiment 3 (Electrical/ Electronics Measurement Lab), the method used to enter

schematic design into LTSPICE is by writing the Netlist. Another method that will be

shown in this manual is the Schematic Entry. Schematic entry is very much similar to

drawing the circuit using schematic symbol. Do read the author’s note at the end.

Steps to construct and simulate circuit in LTPSICE

Figure 1: Inverting amplifier Circuit

For this manual, the circuit in Figure 1 will be used as an example. First of all,

start the LTPSICE program ( ) and click at the ‘New schematic’ command

button (Figure 2). This will create the schematic area (Figure 3).

Figure 2: ‘New Schematic’ command button

‘New Schematic’

command button

10kΩ

20kΩ

Sinewave

2Vp-p

1kHz

Figure 3: Schematic area

There are few most common command button used as shown in Figure 4. The

function/name of each command button can be identified by placing the mouse cursor

on top of each command button.

Figure 4: Common command button

Component can be chose by clicking one of these buttons. For example, to place a

resistor, click at the ‘Resistor’ command button and left click at the schematic area to

place it. If the same component needs to be place again, just left click again at the

schematic area. Right click to cancel component placement. To place a component other

than resistor, capacitor, inductor and diode (e.g. Opamp), click ‘Component’ command

button. In the dialog box appeared (Figure 5), double click ‘[Opamps]. Another dialog

box will appear as shown in figure 6. Select an opamp (for example LT1001) by double

click at the Opamp model. Place the component at the schematic area.

Figure 5: Select Component Symbol dialog box

Schematic area

Figure 6: [Opamps] dialog box

To place a voltage source, click ‘Component’ command button again. Notice that the

dialog box will remain at Opamps selection. Double click at the back function, ‘[…]’, as

shown in Figure 6 to return to the earlier component selection as shown in Figure 5.

Double click ‘voltage’ and place it at the schematic area. To rotate the component, click

the ‘Move’ command button (refer Figure 4), then click the component that need to be

rotate. After that, press [Ctrl + R]1. Another method to do rotation is by pressing [Ctrl +

R] after selecting the component and before placing it on the schematic area. Using the

technique learned, place all components needed on the schematic area at proper location

as shown in Figure 7.

Figure 7: All components placed

1 [Ctrl+R] refer to keyboard. Press ‘Ctrl’ key followed by ‘R’ key.

Back function

To set the components value, right click at the component and then change the value and

click ‘OK’ (Refer Figure 8). Repeat the same process for the rest of the component.

Figure 8: Changing component value

For the sine wave source, right click the voltage source and click ‘Advance’. In the dialog

box appeared, select SINE function and fill up the value accordingly. DC offset is usually

set to zero. Amplitude is half of Vp-p value. Refer to Figure 9. After all components have

been placed and the values have been set, click ‘Wire’ command button (refer to Figure

4) and connect all component accordingly as shown in Figure 10.

Figure 9: Advance option of voltage source

Figure 10: Components are given values and connected using ‘wire’

Now, the circuit is complete. The next step is to simulate the circuit. To do the transient

analysis, go to menu ‘Edit’ and select ‘SPICE Analysis’ (refer Figure 11). A dialog box

should appear as shown in Figure 12.

Figure 11: ‘SPICE Analysis’ selection from ‘Edit’ menu

Figure 12: Simulation editor

‘Transient’ Tab

By default, the ‘Transient’ tab should be selected. If not, click on the ‘Transient’ tab. Set

the ‘Stop Time’ as per required. The value for ‘Stop Time’ is usually twice the value of

the period. For example if the frequency of the signal 1 kHz, then the period is 1ms and

the ‘Stop Time’ required is 2ms. Then, click ‘OK’. After that, place the box which

appears in the schematic area. Now the circuit is ready to be simulated. However, it will

be quite tedious to identify which node is output or input because the nodes are specified

automatically. In order to make it easy for identification, label the input or output node

using ‘Label net’ command button (refer to Figure 4). Click the ‘Label net’ command

button and in the dialog appeared, specify suitable name for node (refer Figure 13). Click

‘OK’ and a box will appear. Place the box at the output node and make sure the box

touches the node wire and the colour of the wire should change to yellow (refer to Figure

14). Left click to place the node label.

Figure 13: Node label

Figure 14: Placing node label.

Using the same technique label the input node. Now, click the ‘Run’ command button. A

dialog box will appear for selection of waveform as shown in Figure 15. To select a

waveform double click at it. If the selection requires two or more waveform, press the

‘Ctrl’ key and click at the waveforms required. Then, click ‘OK’. The waveform will be

displayed immediately as shown in Figure 16. If the dialog box as shown in Figure 15

does not appear, a graph window will appear as shown in Figure 17

The box touches the

node wire

Figure 15: Waveform selection

Figure 16: Displayed waveform

Figure 17: Graph window

Right click at the graph window and the dialog box as shown in Figure 18 will appear.

Figure 18: Graph window options

Select ‘Add Trace’ and a dialog box as shown in Figure 15 will appear. Follow the step

explained previously to select and display the waveforms.

To get the netlist, click ‘View’ and select ‘SPICE Netlist’ as shown in Figure 19.

Figure 19: SPICE netlist

Author’s note

This manual is prepared to help students to do the simulation assignment of Experiment 6

of Electrical/Electronics Measurement Labs. Any comment to further improve the

manual is much appreciated and can be forwarded to [email protected]. Your

comment and suggestion may help other student to better utilize the manual. Thank you!

LT Spice - AddingCom ponents

Please Note: All the inform at ion presented here is m y own work and not from LinearTechnology. This advice does not replace the inform at ion given by Linear Technology, theLTWiki or the Yahoo LTspice User group . Please also read m y sites general disclaimer.

Adding New Com ponents using WindowsLTspice comes with a select ion of com ponents and models, but you may find on occasionthere is a need to add new parts and models. You can design your own, but you m ay findthat one has already been created.

The yahoo LTspice user group has a files sect ion where you can download newcomponents. You need to join the group first , then browse to the files sect ion and lib( library) directory, screenshot below.

Hom e Analysis Help Media Links Pract ical Schemat ics Sim ulat ion Updates

Page1 of 7LT Spice - Add New Components

14-Sep-13http://www.zen22142.zen.co.uk/ltspice/addnewparts.htm

Download your desired files and save them to your computer. Next you need to place them inthe required directories. On windows this locat ion will generally be C: \ ProgramFiles\ LTC\ LTspiceI V\ lib\ Open windows explorer and browse to the lib folder (screenshot ) .



I nside C: \ Program Files\ LTC\ LTspiceI V\ lib will be three more folders, cmp, sub and sym. I t isa good idea to bookm ark this locat ion for future use. Click Favorites and add a suitable nam e.

To add for exam ple the CMOS4000 library, download the files CD4000.lib and CD4000.zip.The lib folder can be placed anywhere inside lib directory. Many library files are kept in thesym folder but as long as an include statement ( . inc CD4000.lib) is placed on the schemat icthey will be found as the search is recursive through the directory st ructure. (Screenshotbelow.)



Now it is also necessary to add the symbols for the CMOS4000 ser ies. The sym bols must beplaced in the sym folder. The symbols are com pressed into a zip file, copy CD4000.zip intothe sym folder and ext ract it , a new sub folder called CD4000 will be created.

I nside the CD4000 folder, the symbols of many of the 4000 series I C's have been created.



Using the new com ponents is easy, star t a new schemat ic, click parts (or press F2) and youshould now seethe new CD4000 library (screenshot below) : -

Select ing the [ CD4000] folder should now display many of the CMOS4000 series IC's. Clickingthe m odel should also preview the symbol.



Once created rem ember to add the include statem ent .

I f designing circuits for other people then all com ponent libraries, m odels and any customsym bols need to be included in the same file otherwise they will get a com ponent not founderror.

The following exam ple circuit is an exam ple using the CMOS 4000 library and LTspice :1 Hour Timer

Adding New Com ponents using LinuxI f you are running LTspice from linux then installing new components is the same as forwindows. The m ain difference is the locat ion of LTspice.

LTspiceI V runs perfect ly as long the wine program is installed. Wine is software that allowsm any windows program s to run on linux. A hidden .wine folder will be created for each useron the system . Download the com ponent files to ~ / .wine/ drive_c/ ProgramFiles/ LTC/ LTspiceI V/ lib/ cmpYou can bookmark this locat ion in konqueror or naut ilus or simply copy using the term inal. Ascreenshot using konqueror file m anager is below:



Adding New Discrete Com ponentsTo add new t ransistors download this fileand save in the cmp directory. This file adds newEuropean t ransistor e.g. BC107 series, BC547 series and m any of the circuits on CircuitExchange. Please note this file will overwrite exist ing model files in LTspice.

Shell Scr ipt for linux UsersThe following bash script is designed to make life easier when adding new com ponents toLTspice. I t is a simple shell script that can be modified and places all com ponent , library,m odel and subcircuit files into the relevant directory in LTspice. My download locat ionis / media/ share/ elect ronics/ ltspice Just replace this with your download locat ion for yoursystem .Transfer shell script

Just download the script and execute it with ./ t ransfer.sh

Return to LTspice I ndex



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