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Transcript of SOI_CMOS[1]
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SOI CMOS
EECS 277A
Aishwarya Sankara
17723777
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Today
What is SOI?
Characteristics of SOI
Fabrication methods Basic categorization
Electrical anomalies
Advantages and Disadvantages
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What is SOI?
-SOI Silicon-on-Insulator
-Si layer on top of an
insulator layer tobuild active devicesand circuits.
-The insulator layeris usually made ofSiO2
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Characteristics
Include:
- High speed- Low power
- High device density
- Easier device isolation structure
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SOI Fabrication
Processes
-SOS Silicon-on-Sapphire
-SIMOX Separation by
Implantation of Oxygen
-ZMR Zone melting and
recrystallization
-BESOI Bond and Etch-
back SOI
-Smart-cut SOI Technology
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Categorization
-Categorization based on thethickness of the silicon film.
-The first is a partially-
depleted device and the latter
is a fully-depleted device.
-Each has its own advantages
and disadvantages.
-PD device threshold voltage
is insensitive to film thickness.
-FD device has reduced short
channel and narrow channel
effects.
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Electrical anomalies
Floating-body effect:-Usually seen inPartially-Depleteddevices.
- As shown in figure, theMOS structure isaccompanied by aparasitic bipolar devicein parallel.
-The base of this deviceis floating.
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Electrical anomalies
Kink Effect:
-Sudden discontinuity in draincurrent.
-Seen when the device is biasedin the saturation region.
-The bipolar device is turnedon.
Solution:
-Provide a body contact for the
device.
- Use FD devices.
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Electrical anomalies
Self-heating effect:
- Thermal insulation is provided by the oxide surface.
- Heat dissipation is not efficient.
- This happens only when there is logic switching in the device.
In fully-depleted devices, the threshold voltage is sensitive to
the thickness of the silicon film. Manufacturing process is comparatively difficult.
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Advantages of SOI
Suitable for high-energy radiation
environments.
Parasitic capacitances of SOI devices are much
smaller.
No latch-up.
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Advantages
-Easier deviceisolation
-High devicedensity
-Easier scale-down of
threshold voltage.
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Uses in digital and analog circuits
A combination of FD and PD devices are used
in digital circuitry.
Superior capabilities of SOI CMOS technology
usage in memory cell implementation.
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Uses in digital and analog circuits
SOI technology is useful for implementing
high-speed op-amps given its low Vt.
Higher transconductance (especially of FD)
implies higher gain.
Lower power consumption compared to bulk
devices at low current level.
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Disadvantages
Major bottleneck is high manufacturing costs
of the wafer.
Floating-body effects impede extensive usage
of SOI.
Device integration dopant reaction with the
oxide surface.
Electrical differences between and SOI nad
bulk devices.
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Conclusion
Due to its characteristics, SOI is fast becoming
a standard in IC fabrication.
Several companies have taken up SOI
manufacturing.
High-volume production of SOI is yet to
become common.
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References J. Kuo, Low- Voltage SOI CMOS VLSI Devices and Circuits. New York, John Wiley, Sept 2001.
J.Kuo, CMOS VLSI Engineering(SOI). Kluwer Academic Publishers, 1998.
Vivian Ma, SOI VS CMOS. University of Toronto.
www.google.com
www.chips.ibm.com
THANK YOU!
4/24/2013 UNIVERSITY OF CALIFORNIA, IRVINE
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