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University of Genova
Department of Biophysical and Electronic Engineering
Software Defined Radio (SDR)
ARCHITECTURE
vIdeo and Signal Processing for Telecommunication
University of Genova
Dipartimento di ingegneria navale, elettrica, elettronica
e delle telecomunicazioni
vIdeo and SIgnal Processing for Telecommunications – ISIP40
SDR - High level functional model
Software defined radio - radio technology where some or
all of the wireless physical layer functions are software
defined
SDR High level functional
model (Pucker, [2])
RX side: front end processing consists of:
• RF subsystem that extracts the channels of interest from a pre-defined
band, converts them to baseband and forwards them
• Modem subsystem that takes care of demodulation and decoding and
passes the information to:
• Link/network layer processing or security processing subsystem
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Base Station Generalized Functional
SDR Architecture
The architecture is consistent with Open Base Station
Architecture Initiative (OBSAI) and the Common Public Radio
Interface (CPRI)
Fig.: Base Station
Generalized
Functional SDR
Architecture
(Pucker, [2])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Base Station Generalized Functional
SDR Architecture (2)
RF and modem subsystems are decomposed into
four functional blocks:
An Antenna subsystem – may include specialized
processing supporting frequency diversity, smart antenna, or
beam forming
An RF subsystem - converts one or more frequency bands
of interest to an analog or digital IF signal
A Channel Selector/Combiner subsystem – in charge of
digital frequency tuning, channel selection, and digital
sample rate conversion to support the target air interface
standard associated with each active channel
Baseband DSP Processing – provides modem and channel
codec processing
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Multiband, Multimode Handheld
Functional Model
A common baseband processing engine can service
multiple RF front ends
The baseband processing engine may be provided
through a combination of technologies such as an
ASSP, FPGA, or DSP, or through a software defined
system-on-a-chip (SoC)
Fig.: Multiband,
Multimode Handheld
Functional Model
(Pucker, [2])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
SDR - Basic hardware architecture
“ideal” SDR would have all the radio-frequency bands and
modes defined in software
Hence, it would consist only of an antenna, DAC/ADC and a
programmable processor
However, in practical systems, the RF front-end has to be
implemented as well to support the transmit and receive modes
Fig.: General SDR
architecture
(Dabcevic, [6])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
SDR - Basic hardware architecture
(2)
Hence, the basic SDR must include:
Radio front end
Modem
Cryptographic security function
Application function
In addition, some SDRs will also include:
Support for network devices
Control of external radio frequency (RF) analog functions
(antenna management, coax switches, power amplifiers, or
special-purpose filters)
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Smart antennas
In addition to standard antennas used in „traditional” RF
systems, there is an increasingly popular trend of deployment of
smart antennas in SDRs and CRs
A smart transmit antenna can form a beam to focus transmitted
energy in the direction of the intended receiver
A smart receive antenna can
synthesize a main lobe in the desired
direction of the intended transmitter, as
well as synthesize a deep null in the
direction of interfering transmitters
Often able to able to synthesize up to
20 dB null to suppress interference
Fig.: Utility of smart
antennas (Fette, [1])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Smart antennas - classification
Beamforming
A smart antenna algorithm can receive predominantly from a desired
direction
The digital signal processing has the ability to shape the radiation pattern
and to adaptively steer beams
Diversity combining
Spatially distanced antennas receive mutually independently-faded signal
instances, which can then be combined in order to improve the reception
Space-time equalization
Temporal processing and spatial combining is introduced in order to remove
the effect of frequency distortion caused by multipath fading
Multiple Input – Multiple Output (MIMO)
Requires array processing at the transmitter and the receiver
Two different types of MIMO:
• Spatial multiplexing - to enhance data rate for a given BW
• Space time coding using diversity combining – to combat fading
vIdeo and SIgnal Processing for Telecommunications – ISIP40
RF front end
In the receive mode, RFFE consists of:
Antenna matching unit
Low-noise amplifier
Filters
Local oscillators
Analog-to-digital (A/D) converters
In the transmit mode, RFFE consists of:
Digital-to-analog (D/A) converters
Local oscillators
Filters
Power amplifiers
Antenna-matching circuits
IMPORTANT PROPERTY: synthesizing the RF signal without
introducing noise and spurious emissions at non-used frequencies
vIdeo and SIgnal Processing for Telecommunications – ISIP40
ADCs and DACs
Analog to Digital Converters In charge of digitalization of the received signal, allowing for it to be
processed
ADCs perform sampling at a certain rate and quantization of the
signal
Important value is ADC’s dynamic range
• the number of signal levels that ADC can distinguish
Usually preceded by (Programmable) Gain Amplifiers
Digital to Analog Converters Employed at the transmit side, allowing for the signal to take a
continuous form
Usually suceeded by (Programmable) Gain Amplifiers
Typically have higher dynamic ranges than ADCs, allowing for
higher sampling rates
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Digital downconverters and
upconverters
Digital downconverters (DDCs)
In charge of mixing, filtering and decimating arriving signals
They shift the frequency band of the incoming high sampling
rate digitized signal to the baseband and lower the sampling
rate without any information loss
• The digitized stream is mixed with a digitized cosine and digitized sine,
producing sum and the difference components
• Outputs are then filtered
• Because the bandwidth of the signals has been reduced, sampling
frequency can now be losslessly decimated
Digital upconverters (DUCs)
Translate the signal from baseband to IF band
They take the relatively low-sampled input baseband signal,
filter it and convert it to a higher sampling rate
FIR filters are typically used to interpolate the signal
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Modem
Processes the received signal or synthesizes the
transmitted signal (or both for a full duplex radio)
In the receive mode, modem:
Shifts the carrier frequency of the desired signal to a specific
frequency nearly equivalent to heterodyne
• This allows it to be digitally filtered
Time-aligns and de-spreads the signal as required, and re-
filters the signal to the information bandwidth
Time-aligns the signal to the symbol or baud time
It may include an equalizer to correct for channel multipath
artifacts, and filter delay distortions
It may include rake filtering to optimally cohere multipath
components for demodulation
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Modem (2)
In the transmit mode, modem: Modem takes bits of information to be transmitted and groups them
into packets
Adds a structured redundancy to provide for error correction at the
receiver
Groups bits to be formed into symbols or bauds
Selects a wave shape to represent each symbol and synthesizes
each of them
Filters each wave shape to keep it within its desired bandwidth
Controls the power amplifier and the local oscillators to produce the
desired carrier frequency
Controls the antenna-matching unit to minimize voltage standing
wave radio
It may also control the external RF elements including transmit
versus receive mode, carrier frequency, and smart antenna control
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Forward Error Correction (FEC)
Involves encoding a message in a redundant way,
which allows the receiver to reconstruct lost bits
without the need for retransmission
FEC can be:
integrated into the demodulation process (e.g. trellis-coded
modulation)
closely linked to demodulation (e.g. soft decoding for
convolutional codes)
an integral part of the next stage (MAC processing)
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Medium Access Control (MAC)
MAC protocol is primarily responsible for regulating
access to the shared medium
MAC processing generally includes:
Framing information, with its associated frame
synchronization structures
MAC addressing
Error detection
Link management structures
Payload encapsulation with possible fragmentation/
defragmentation structures
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Power amplifiers
Most current communication systems use time-
varying envelope signals
With such signals, PAs are required to operate in their back-
off region to meet the required linearity
This linearity is defined either by the adjacent channel power
ratio (ACPR) or the error vector magnitude (EVM)
Fig.:
(Ghannouchi, [3])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Power amplifiers (2)
Behavioral modeling of RF PAs is
an essential task in the design of
high-performance wireless
transmitters
Common behavioral models:
Hammerstein model
Memory polynomial model
Volterra series model
Neural networks model Fig.: ,(Ghannouchi, [3])
i Fig.:
,(Ghannouchi,
[3])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Power amplifiers (3)
Typically, the external PA needs to be told to transmit
when the transceiver is in the transmit mode and to
stop transmitting when the transceiver is in the
receive mode
It will also need to be able to sense its VSWR,
delivered transmit power level, and its temperature
It is also common to have a low noise amplifier (LNA)
LNA will normally have a tunable filter with it
it is necessary to be able to provide digital interfaces to the
external RF components to provide control of tuning
frequency, transmit/receive mode, VSWR and transmit
power-level sensing, and receive gain control
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Computational resources in SDRs
Typically, baseband processing in SDRs is done by
one or the combination of the following:
General Purpose Processors (GPPs)
Digital Signal Processors (DSPs)
Field Programmable Gate Arrays (FPGAs)
Multicore systems and Systems-On-Chip (SOCs)
Different devices are suitable for different tasks
General Purpose Processors
Processors that power desktop computers
Two general types of instruction sets:
• Complex instruction set computers (CISCs)
• Reduced instruction set computers (RISCs)
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Computational resources in SDRs
(2)
Digital Signal Processors (DSPs)
Microprocessors specialized for signal processing
applications
can be programmed with a high-level language such as C or
C++ and they can run an operating system
could be used e.g. for channel modem and baseband signal
processing tasks
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Computational resources in SDRs
(3)
Field Programmable Gate Arrays
array of gates with programmable interconnect and logic
functions that can be redefined after manufacture
Development for the FPGA is done by using languages such
as VHSIC Hardware Design Language (VHDL)
The most appealing aspect of FPGAs is their computational
power
On the other side, FPGA consumes a significant amount of
power => impractical for battery-powered handheld solutions
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Computational resources in SDRs
(4)
Multicore systems and Systems-On-Chip (SOCs)
Multicore systems and Systems-On-Chip (SoC) will continue
to be the bedrock of computing technology
As technology reaches transistors under 100 nm, several
problems appear:
• Inability to continue the incremental pace of clock
acceleration
• Significant problems in power dissipation
To overcome this, processors are moving away from single-
core solutions to multicore solutions
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Traditional digital receiver and
transmitter architectures
Fig.: Traditional
digital receiver
(Fette, [1])
Fig.: Traditional
digital transmitter
(Fette, [1])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Example – All-digital delta-sigma
transmitter (Ghannouchi)
Two low-power delta-sigma modulators are utilized to generate bi-level
signals for I and Q
Two high-frequency multiplexers upconvert the baseband signals to the
carrier frequency fc=Nfs
modulated signals are combined with a third multiplexer, which works at
frequency, 2fc to produce I/Q signals at carrier frequency, fc
PA is used to amplify the bi-level I/Q signal
a band pass filter is used to suppress all out-of-band distortion and
recover the modulated signal around the carrier frequency
transmitter was prototyped
and tested with different
standards to demonstrate its
suitability for SDR
applications
Fig.: All-digital delta-sigma
transmitter (Ghannouchi, [3])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Example – Lyrtech SFF SDR
DM6446 DSP
Virtex-4 SX35 FPGA
MSP430 MCU for power management
Two, 125 MSPS ADCs
Two, 500 MSPS DACs
0.2–1.0 GHz, low-band RF
1.6–2.2 GHz, high-band RF
2.5 GHz WiMAX
128 MB DDR2 SDRAM
128 MB NAND flash memory
Stereo audio codec (8 kHz to 48 kHz)
10/100 Mbps Ethernet
Model-based design flow support
Fig.: Lyrtech SFF SDR [7]
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Example – Lyrtech SFF SDR (2)
SFF SDR consists of three modules:
Digital Processing Module (DPM)
Data Conversion Module (DCM)
RF Module
Real-time and hardware-in-the-loop co-simulation
capabilities
GPP, DSP, and FPGA are available onboard, making
it easy to implement all protocol layers
Capable of remote Ethernet access
Supports multiple tunable and WiMAX RF modules
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Example – Lyrtech SFF SDR (3) -
Digital Processing Module (DPM) The FPGA and the DSP are
connected via the Video
Processing Subsystem
(VPSS) - a 16-bit
synchronous video data
transfer port
VPSS was adapted to
provide high data rates
between both processing
units
Video Processing Front
End (VPFE) is the
direction towards DSP
Video Processing Back
End (VPBE) is the
direction back to the FPGA Fig.: Digital Processing Module [9]
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Example – Lyrtech SFF SDR (4) -
Data Conversion Module (DCM) DAC provides a
bypassable
interpolation by a factor
of 2,4 or 8, an
integrated quadrature
modulator and
programmable
amplifier
Xilinx’s Virtex-4 LX25
FPGA acts as the
interface between the
conversion chips and
the proprietary
expansion connector
This FPGA is not
programmable
Fig.: Data Conversion Module [8]
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Example – Lyrtech SFF SDR (5) –
WiMAX RF Module
Fig.: Data Conversion Module [10]
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Example – Lyrtech SFF SDR (6) –
WiMAX RF Module (2)
The WiMAX RF module is a superheterodyne transceiver
RX converts signals from an RF between 2.3 GHz and 2.7 GHz
over two stages to an IF of 44 MHz
RF signal is limited to the supported band by a 400 MHz wide
band-pass filter working on 2.5 GHz
The first downconversion is handled by TI’s TRF1115 [10] low-
noise down converter
• It mixes the signal with an incoming carrier on a fixed frequency of
456 MHz
The final conversion on the IF of 44 MHz is done by a combination
of PLL and IF down-converter
• It is followed by the last filtering on a bandwidth of either 7 MHz or
22 MHz respectively
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Software architecture – design
philosophies
Linear programming (LP)
A methodology in which the developer follows a linear
thought process for the development of the code
Dominated by conditional flow control (such as “if-then”
constructs) and loops
Most popular LP language: C
Object-oriented programming (OOP)
Extends the data structure concept to describe a whole
object
• Object is a collection of member variables and functions that
can operate on those member variables
Most popular OOP languages: Java and C++
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Software architecture – design
philosophies (2)
Component-Based Programming (CBP) Instead of allowing any arbitrary structure for the object, under CBP
the basic unit is now a component
• This component comprises one or more classes, and is
completely defined by its interfaces and its functionality
Primary goal of CBP is to create stand-alone components that can
be easily interchanged between implementations
CBP is a coding style, and there are no mainstream languages that
are designed explicitly for CBP
Dominant philosophy in SDRs
Aspect-Oriented Programming (AOP) Allows for the creation of relationships between different classes
Most popular AOP languages: AspectJ, AspectC++, and Aspect#
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Software architecture – design
philosophies (3) Example illustrating difference in design philosophies:
LP - creating a big box for all items on your desktop, such as the phone,
keyboard, mouse, screen, headphone and a can of soda with no separation
between these items
OOP - it is now possible to break up every item on your desktop into a
separate object
• Each object has some properties (e.g. temperature of the soda)
• Each object also has some functions that you can access to perform a
task on that particular object, (e.g. drinking some of your soda)
CBP - contents on the desktop can now be organized into components
• A component could be a computer, with two input interfaces (keyboard
and mouse) and one output interface (monitor)
• It is now possible to change individual objects within the component, or
the whole component altogether
AOP - a class such as the headphone can be used not only in the computer
example, but also in any other appropriate type of system
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Open SDR architectures – GNU
Radio
An open-source software toolkit founded by Eric
Blossom in 1998
Coupled with hardware equipment such as USRP,
allows for a complete platform for building SDRs
Can also be used as a stand-alone software package
Most of GNU Radio’s applications are written in
Python, whereas C++ is used for implementing signal
processing blocks
Python commands are used to control all of the SDR’s
software-defined parameters (transmit power, gain,
frequency, antenna selection, etc.)
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Open SDR architectures – GNU
Radio (2)
GNU Radio is built on two main structural entities –
signal processing blocks and flow graphs
Blocks are structured to have a certain number of
input and output ports, consisting of small signal-
processing components
GNU Radio blocks can be categorized as sinks, sources and
filters
When the blocks are appropriately connected, a flow graph
is made
A number of blocks, such as different modulation/
demodulation techniques, various filters, signal indicators
and widgets, etc. are integrated within GNU Radio
It is also possible to write and add new blocks
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Open SDR architectures – GNU
Radio (3)
Flow graphs are created either as hierarchical blocks
or as top blocks
Top blocks are top-level flow graphs that contain all other
flow graphs and have no input/output (IO) port
Hierarchical blocks contain a certain number of IO ports
(used to connect to other blocks) that is forwarded to the
parent class
Communication between blocks is achieved using
data streams
All stream elements use certain data types (Byte, Short, Int,
Float or Complex)
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Open SDR architectures – GNU
Radio (4) GNU Radio – delimitations:
It is reliant on GPP for baseband processing, thus limiting its signal-
processing capabilities
Lacks distributed computing support, limiting solutions to single-
processor systems, and hence limiting its ability to support high-
bandwidth protocols
GNU Radio
Companion
(GRC)
A GUI that
allows
building
flow graphs
by simply
connecting
visually-
presented
blocks
Fig.: GNU Radio Companion Example (Dabcevic, [6])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Open SDR architectures – SCA
Software Communications Architecture (SCA)
Framework set of specifications, named Core Framework (CF),
which enables software application portability between
platforms
Has been designed to support applications such as waveforms
and other network layer protocols
The architecture is component-based and implements the
layered ISO/OSI communications model
Uses Common Object Request Broker Architecture (CORBA)
as part of its middleware
• Software that allows a developer to perform remote procedure
calls (RPCs) on objects as if they resided in the local memory
space, even if they reside in some remote computer
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Open SDR architectures – SCA (2)
Evolution of SCA specification:
SCA 1.0 (Feb. 2000)
SCA 2.2 (Feb. 2001)
• first version complete enough to implement and apply to a fielded
software radio system
SCA 2.2.1 (Apr. 2004)
• OMG Lightweight Log specification replaces the Log Service
Fig.: Evolution of SCA standard (Guan et. Al., [5])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Open SDR architectures – SCA (3)
Evolution of SCA specification (ctd.):
SCA 3.0. (Aug. 2004)
• Additional constraints on DSP software
• A proposed set of waveform components was defined
• A high-level data transport design was proposed
• Antenna API section
• General consensus about this release: Needs more work!
Software Radio Specification (mid-2004) released by OMG
• Initiated by several SCA contributors
• Objective: evolve the SCA into an industry (as opposed to
military) standard
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Open SDR architectures – SCA (4)
Evolution of SCA architecture – ctd.:
SCA 2.2.2 (Aug. 2006)
• SCA 3.0. abandoned, continued to evolve SCA 2.2
• Major changes in software architecture
Fig.: SCA Software Architecture before and after SCA 2.2.2 (Guan et. Al., [5])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
Open SDR architectures – SCA (5)
Evolution of SCA specification (ctd.):
SCA 4.0 (Feb. 2012)
• Introduces extensions for binding to presentation layers such as
Android
• Architectural enhancements aimed at improving security and
enabling faster boot-times and reconfiguration of the radio
Fig.: Composition of an SCA system (SCA 4.0 Specification, [11])
vIdeo and SIgnal Processing for Telecommunications – ISIP40
References
[1] Fette, B. „Cognitive Radio Technology (2nd Edition)”. United States:
Elsevier Inc. – 2009.
[2] Pucker, L. „SDR Architecture”. Wireless Innovation Forum.
[3] Ghannouchi, F. M. „Power Amplifier and Transmitter Architectures for
SDR Systems”. IEEE Circuits and Systems Magazine, vol. 10 – Nov. 2010
[4] Gultchev, S., Moessner, K., Thilakawardana, D., Dodgson, T., Tafazolli,
R., Vadgama, S., Truelove, S. „Evaluation of SDR Technology”. - 2006.
[5] Guan J., Ye X., Gao J., Liu Q. „The Software Communication
Architecture Specification: Evolution and Trends”. 2nd Asia-Pacific Conf.
on Computational Intelligence and Industrial Applications – 2009.
[6] Dabcevic, K. „Evaluation of Software Defined Radio Platform With
Respect to Implementation of 802.15.4. ZigBee” - 2011.
[7] Reference sheet – Lyrtech SFF SDR, www.lyrtech.com
[8] Specification sheet - ADACMaster III, www.lyrtech.com
[9] Specification sheet - WiMAX RF module, www.lyrtech.com
[10] Datasheet - Digital Processing Module, www.lyrtech.com
[11] SCA Specifications, www.jpeojtrs.mil/sca