Slide MP 4.3: Monolithic CMOS Distributed Amplifier and...
Transcript of Slide MP 4.3: Monolithic CMOS Distributed Amplifier and...
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Outline
- Introduction
Interconnect Scaling in conventional CMOS
- Distributed Amplifier Design
Transmission Line Parameter Optimization
Experimental Results
- Distributed Oscillator Design
One-stage R
Experimenta
- Conclusions
ng Oscillator
Results and Comparisons
(c) IEEE 19991999 ISSCC Slide Supplement / Copyright IEEE
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Microwave Engineer’s View of CMOS
Y2008, 10 layers
.m mYI 998, 5 layers
.--- 16P”
I
Bulk Si-
(VERY LOW RESISTIVITY)
(c) IEEE 19991999 ISSCC Slide Supplement / Copyright IEEE
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Lumped Amplifier Capacitance1000
G
u3
100
100 ●
C = 5pF+
\
50Q \
10■Frequency (GHz)
\
00■
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Traveling-Wave: Gain-Bandwidth-Delay
vin o 1
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Transmission Line Model
L line L line L line
r “ “ 0vout
cT
line cTline c
z Tline
bias
*, ---------- ----------- ------ma nn I nm1m
z 4/Lline :L L
n ,line line line ~ = G 1
‘+%-w
8 mI ,.............................
line
Tc
Tline c
Tline
‘ “1
4 erm
(c) IEEE 19991999 ISSCC Slide Supplement / Copyright IEEE
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H-
Distributed Amplifier Model
L line L line L line
‘Iii
~vout
‘T. ‘;;3’ 1.‘;F’T!!gm=,..----=------.m t 1
Vin 1 1 mn n. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0
c line
Tc
Tline c
Tline
T c T c T c““I4 erm
9 9 9
+ + + +
(c) IEEE 19991999 ISSCC Slide Supplement / Copyright IEEE
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Coplanar Lines in Top Level Metal
T I+W4S,Ox Ground Signal
4Ground
Si Substrate
Large Width, Space -+ small resistive line lossesWs
Tox Ground Signal Ground
/
Si Substrate
Small Width, Space +large resistive line losses
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Reduce Coupling Through Si Substrate
Large Width, Space -+ large coupling through substrateWs
Tox
/
Si Substrate
Small Width, Space -+ small coupling through substrate
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Coplanar Stripline in HP’s Process
M4M3M2Ml
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Measured Characteristic Impedance
90
80
G– 70
60
50
&I/V= 10~mS=l Opm
4 &T ox= 4m4pl?l.Unloaded CPS
1~
Ps
,---aa
Loaded C~. . . . . . . . . . . . . . .
P8510C1 . . . . . . . . . . . . . . . . . . .
,
0 5 10 15Frequency (GHz)
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DiePhotoofDistributedAmplifier
Ro
R~ IN OUT R~
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Distributed Amplifier S-parameters
10
0
-20
, I , I ,
Unity Gain Bandwidth
v = 1 .5Vv ;:= 1.3V sI
11~~=60mA
HP8510C;
o 10 20 30Frequency (GHz)
(c) IEEE 19991999 ISSCC Slide Supplement / Copyright IEEE
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Distributed Oscillator Schematic
T
Lo ~-pj,,,. +j,’j’jjjjj
zbias zCps zCps zCps
‘! izCps i zCps v out
o
i $zCps
Feedback
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Ideal ~ Oscillator Layout
.ve
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~bias
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o
-20
-40
-60
-80
Oscillator Power Spectrum
16.6 GHz v ~i~~= 1 .3VI~ia~= 40mA
33.3 GHz
49.9 GHz
. . . . . . . . . . . . . . . . . . .
0 10 20 30 40 50Frequency (GHz)
(c) IEEE 19991999 ISSCC Slide Supplement / Copyright IEEE
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Oscillator Phase Noise Comparison
c1)(n.—0
z
c1)u)(Gcnufi.—
-170
-190
P=l mW, f~/fO
+ Razavi, (std. CMOS)Isscc 97
Ali, (bipolar)ISSCC 96
❑Wagemans, (Glass substrate)
~ ISSCC 98
Craninckx, (Bondwires)
o Isscc 95 ●
Hajimiri, (std. CMOS) This WorkA PhD Thesis, 98 (std. CMOS)
VAhrens, (Bondwires)Lo-Pow Symp, 98
0 5 10 15 20Frequency (GHz)
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Conclusions
- Low-loss transmission lines in conventional CMOS
70-L2 CPS with 0.7dB/mm at 17 GHz
- Monolithic 50-Q CMOS distributed amplifier
UGBW: 23 GHz, -ldB compr: +5dBm, IP3: +15dBm
- First monolithic CMOS distributed oscillator
fO: 16.3-16.8 GHz, L: –110dBc/Hz at 1MHz offset
- CMOS will continue to scale into microwave region
(c) IEEE 19991999 ISSCC Slide Supplement / Copyright IEEE