SLIDE 1 September,2003 2003 BIMS VoIP Network Processors Deployment in Multi-Service Applications...

September,2003 SLIDE 1 2003 BIMS

VoIP Network Processors Deployment in VoIP Network Processors Deployment in Multi-Service ApplicationsMulti-Service Applications

David Chih-Wei Chang, Ph.D.David Chih-Wei Chang, Ph.D.Vice Chairman, CASPAVice Chairman, CASPA

[email protected][email protected]


OutlineOutline

• Driving Forces for Convergence Processors• MediaXpressTM Convergence Processor Micro-Architecture• Challenges of SOC Design• Challenges of VDSM (Very Deep Sub-micron) Design • Gateway Software and MediaFlowTM Design• MediaXpress-Based VoIP performance• Applications for Multi-Service Convergence

– Voice Over Packet– TDMoIP (Time Division Multiplexing over Internet Protocol)– Media Servers

• Conclusion


Driving ForcesDriving Forces

Equipment Vendors Need:• Cost-effective solutions• High quality/reliability (Carrier Class) • Scalable, multi-service platforms

Services Convergence Requires:• PSTN/AIN compatibility• ATM/FR compatibility• Evolving standards compliance• New protocols flexibility

Programmable Programmable Silicon Solutions Silicon Solutions for Multi-Service for Multi-Service

PlatformsPlatforms

Service Providers Face:• Declining revenues from basic services• Need for new revenue from enhanced services• Need to control/reduce capex and opex


Convergence SoC

High density, low latencyReal-time service quality

Convergence Processors vs. Network ProcessorsConvergence Processors vs. Network Processors

Packet Networks

Network processors:High throughput, non-real time

Optical Networks

Multi-serviceSwitches

• Legacy Services (TDM, ATM, Frame Relay)• Dynamically Configurable• Any-to-Any

Media & TDMoIP Gateways (wireline & wireless)

• Voice Quality/Low Latency• High Capacity• Real-Time Metrics• Bandwidth Efficiency• Low Power

Media Server• Broadcast Capabilities • High Capacity• Multiple Media Interfaces


Converged NetworksConverged Networks

PSTN

SS7

Trunking Gateway

Application Server Softswitch

Media Server

SignalingGateway

AccessGateway

Video

Data

BaseStation

MSC/RNC WirelessGateway

TDM to IP

PSTNCentrexATMFR

N x T1/E1/T3/E3

IP


Requirements for ConvergenceRequirements for Convergence

• Wire-Speed Processing - Eliminates Queuing Delays for Real-Time Traffic

• Prioritize Real-Time Traffic Over Non-Real-Time Traffic• QoS Support for MPLS and DiffServ• Process Very Small Sample Sizes for Toll Quality Voice/Video• Maximize Network Efficiency – Multiplexing/Compressions• High Channel Density - Cost-Effective, Small Form Factor• Combine Best of Hardware and Software Worlds

– Accelerate standard functions in hardware– Support evolving protocols and applications in firmware


MediaMediaXpressXpressTMTM Overview Overview

TDM

CT Bus (Incoming)

CT Bus (Outgoing)

RTP MultiplexedVoice Channels

G.711TDM

Mux

DSP

G.72x

H.323 Client(G.72x)

DSP

DeMux(G.711)

VoIP IADIP Phone(G.711)

TDM

DeMux(G.72x)

RTP

RTP Mux

Ethernet/PCI

Ethernet/PCI

Software support for:• TDM to IP / IP to TDM

– G.711– G.72x– Multiplexed RTP

• TDM to TDM with IP– Broadcast/Multicast for

Seamless IP Services Engagement


MediaMediaXpressXpressTMTM Block Diagram Block Diagram

High speed Memory Bus

MemoryControl

Unit

CAMPCI

10/100MbEthernet

MAC

IP PACKETPROCESSING

TSICT Bus

Media Stream

Processors

MII

LSS

PCI BUS

External Memory

Local Processor

PCI

CT BusH.110

Local Serial

Stream

MII


MediaMediaXpressXpressTMTM Micro-Architecture Micro-Architecture

MSP – Media Stream ProcessorTM

MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers

Memory Interface: Boot Flash, ZBT SRAMP

CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x

Local TDM Bus, 2K I/O

MSP 0MIPS32

4Km

• Standard MIPS 4Km RISC Cores (MSP)• 400 Mips of Aggregate Processing Power• Runs MediaFlowTM Software• Interface to Local Processor via Shared Memory Paradigm• Runs Low-Latency Interrupt Kernel


MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km


• Direct Interface to ZBT Sram (100 MHz)• 3.2 Gbps Bandwidth• Supports Jitter-Buffer State Management• Single Interface to Both Program and Data Memory



MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km


• 1024 x 35 of Search Space• 1024 x 30 of Associated RAM• Supports Up to 100 Million Look-Ups Per Second• Used to Map the IP Traffic to TDM Domain



MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km


• Rev 2.2 Compliant• 33/66 MHz Operation• Master – MSP or Ethernet DMA Accesses

PCI Memory• Slave – Local Processor Accesses

MediaXpressTMTM Memory and Registers



MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km


• 4K x 2K, 4 way, non-blocking TSI• Supports up to dual OC-3 switching• Broadcast, multicast, quite-code insertion• H.110 interface; MVIP like interface• TDM Buffers aggregate 0.5msec of data



MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km


• 802.3 Compliant MAC Core• L3, L4 Processing and Filtering• Scatter/Gather DMAs• RTP/RTCP Filtering



MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km


• Facilitates Inter-Module Communication• 2 GBps Bandwidth• 5 Parallel and Concurrent Data Paths• Burst Writes of Arbitrary Length• Burst Reads of up to Four Dwords



MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km

Egress Data FlowEgress Data Flow

TDM RxBuffering

500us



MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km


TDM Copy + Interrupt Latency (500us) Packetization (50us)Total 0.55 ms

TDM RxBuffering

500us



MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km

TDM Copy + Interrupt Latency (500us) Packetization (50us)Total 0.55 ms

TDM RxBuffering

500us


Ethernet TX (20us)Total 1.07 ms



MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km

Ingress Data FlowIngress Data Flow

L2/L3/L4 Header Processing Total = 20us



MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km


Transfer to memory (8us)Interrupt Latency (500us)




MSP 1MIPS32

4Km

MSP 2MIPS32

4Km

MSP 3MIPS32

4KmMCU

CCU

CAM PCIMaster/Slave

InternalRegisters

&Memory

INTERNAL CROSS BAR

10/100MbEthernet

MAC

EGRESSDMA

IP PACKETPROCESSING

L2,L3,L4

INGRESSDMA

Rx

TxTSI

TDM Buffers


CI B

us

32 b

itsC

T B

us 32 b

its, 4K I/OM

II,

4 b

its

Tx

& R

x


MSP 0MIPS32

4Km


TDM Write (500 us)Transmit (125 us)Total = ~1.145 ms

Transfer to memory (8us)Interrupt Latency (500us)




MediaMediaXpressXpressTMTM Processor Highlights Processor Highlights

• High Performance, Communications Processor (400 MIPS)• Very Low IP-TDM-IP Conversion Latency (on the order of 1ms)

– Hardware Accelerated Layer Processor for IP/UDP – Embedded 100 Million Look-Ups/Second Engine– 4-Way Non-Blocking 4K x 2K Embedded Time Slot Interchanger (TSI),

Broadcast/Multicast, Quiet Code Insertion• High Capacity

– Single Chip Supports Up to 1K Channels– Multiple OC-n Support Through Glueless Cascading– Saves Board Space/Small Footprint

• Industry Standard Interfaces– PCI, CT/H.110 and 10/100Mb Ethernet

• Seamless Interface to Industry-Standard DSPs (DSP Agnostic)• Industry Standard EJTAG, IEEE 1149.1


MediaMediaXpressXpressTMTM Physical Data Physical Data

• TSMC 0.25 um Technology (One Poly, 5 Metals)• 115 MHz (Worst Process, 2.25 Volts, 125 Degree C)• Fault Coverage for the Full Chip 98.65%• 13.5 Million Transistors• 388 Pin BGA (4-Layer Substrate) With an Internal Heat Slug

and an External Heat Sink• 4.67 Watts Power Dissipation Max., 3.5 Watts Typical


MediaMediaXpressXpressTMTM Die Photo Die Photo


Challenges of SOC DesignChallenges of SOC Design

• Time-to-Market• IP (Intellectual Property) Acquisition, Internal vs.External• Soft IP vs. Hard IP• Diversity of IP Cores and Mixed Design Languages (Verilog vs.

VHDL)• Mixed Signal Design (Analog + Digital)• Verification and Emulation/Validation• Hierarchical Physical Design• Project Management and Design Team Interactions


Challenges of Very Deep Sub-Micron DesignChallenges of Very Deep Sub-Micron Design

• Synthesis with Physical Information– Synopsys: Design Compiler -> Physical Compiler– Cadence: Ambit -> PKS (Phy. Know. Synthesis)

• Wire-First Methodology (Dally, ICCAD –2000) • 3D RC Extraction• IR Drop: Power Density Goes Up• Electromigration• Clock Skew; Wire-Delay > Clock Period (~ 1GHz)• Signal Integrity: Cross-Talk


MediaMediaFlowFlowTMTM Software Overview Software Overview

MediaXpressTM Software

• MediaFlow Boot Code

• MediaFlow Run-time Code– RTP/RTCP processing on chip– MPLS tag support on chip– Packet parameter control (packet

size, UDP port)– Real-time metrics for QoS, usage and

diagnostics

Local Processor Software

• MediaFlow API

• Sample Applications

• MediaFlow Ethernet Driver (OS independent)

MediaFlow API

MediaFlow Ethernet

Driver

Local Processor

MediaXpress

External Boot Flash

(MediaFlow Boot Code)

External SRAM(MediaFlow Run-

Time Code)PCI

IP

TDM


Echo Canceller

Framing

DSP Codecs

IP

UDP

RTP/RTCP

Real-Time Metrics

SIP, MGCP

MediaFlow API

SNMP, TCP

System Software PartitioningSystem Software Partitioning

MediaFlow

DSPAlgorithm

Partnership

DS1/3 Framer

DSP

Local Processor

Echo Canceller

Framing

DSP Codecs

IP

UDP

RTP/RTCP

Real-Time Metrics

SIP, MGCP

MediaFlow API

SNMP, TCP


Functional ModulesFunctional Modules

BoardSupportModules

MF: MediaFlowTM

MF Development

Modules

MFUtility

Modules

3’rd PartyModules

MF Run-Time

MSPTM (MediaXpress)

MSP Modules

Local Processor

RTOS – Runtime RTOS Bootcode

Board Dev Drivers MxP LibEthernet

Driver

MxPTM Bringup MediaFlowTM API TCP/IP

Sample Application: VoIP GatewayMF BenchMark

Local Processor Modules

OSAL

MSPTM BootCodeMSPTM Kernel

• Common BootCode for all MSPs• Bring up MSPs in Controlled Manner• Initializes Caches




BoardSupportModules

MF: MediaFlowTM

MF Development

Modules

MFUtility

Modules

3’rd PartyModules

MF Run-Time

MSPTM (MXP1070)

MSP Modules

Local Processor



Driver




OSAL


• Multiprocessing Kernel That Supports All 4 MSPs• Highly Optimized, Very Efficient, Low-Latency Task Dispatcher• Handles Both Asynchronous and Synchronous Interrupts




BoardSupportModules

MF: MediaFlowTM

MF Development

Modules

MFUtility

Modules

3’rd PartyModules

MF Run-Time

MSPTM (MediaXpress)

MSP Modules

Local Processor



Driver




OSAL


• Highly Tuned for Given Application• Assigns MSPs to Their Dedicated Tasks; VoIP – 2 MSPs for TDM, 2 for IP• Shared Memory Interface for Configuration and Metrics per Media Stream




BoardSupportModules

MF: MediaFlowTM

MF Development

Modules

MFUtility

Modules

3’rd PartyModules

MF Run-Time

MSPTM (MediaXpress)

MSP Modules

Local Processor



Driver




OSAL


• Abstracts all RTOS Dependencies• Allows Easy Portability to Any RTOS and LP• Defines all Services and Data Structures




BoardSupportModules

MF: MediaFlowTM

MF Development

Modules

MFUtility

Modules

3’rd PartyModules

MF Run-Time

MSPTM (MediaXpress)

MSP Modules

Local Processor



Driver




OSAL


• Supports Split Stack Architecture• Interfaces to Higher Level Stacks to Handle

Non-Media Packets




BoardSupportModules

MF: MediaFlowTM

MF Development

Modules

MFUtility

Modules

3’rd PartyModules

MF Run-Time

MSPTM (MediaXpress)

MSP Modules

Local Processor



Driver




OSAL


• Repository for MediaXpressTM Register Programming• Enables Initialization and Runtime Configuration of MediaXpressTM Resources• Supports Multiple MediaXpress From Single Host




BoardSupportModules

MF: MediaFlowTM

MF Development

Modules

MFUtility

Modules

3’rd PartyModules

MF Run-Time

MSPTM (MediaXpress)

MSP Modules

Local Processor



Driver




OSAL


• Used to Create, Delete, Modify, and Monitor Media Streams• Work Seamlessly With MGCP, H.323, SIP• Minimize Software Development Efforts




BoardSupportModules

MF: MediaFlowTM

MF Development

Modules

MFUtility

Modules

3’rd PartyModules

MF Run-Time

MSPTM (MediaXpress)

MSP Modules

Local Processor



Driver




OSAL


• Checks MediaXpressTM Interfaces on Power Up




BoardSupportModules

MF: MediaFlowTM

MF Development

Modules

MFUtility

Modules

3’rd PartyModules

MF Run-Time

MSPTM (MediaXpress)

MSP Modules

Local Processor



Driver




OSAL


• Used to Benchmark MediaFlowTM Software on MediaXpressTM



Target ApplicationsTarget Applications

PSTN

SS7

Trunking Gateway


Media Server

SignalingGateway

AccessGateway

Video

Data

BaseStation


TDM to IP

PSTNCentrexATMFR

N x T1/E1/T3/E3

IP


Media Gateway ApplicationMedia Gateway Application

PSTN

SS7

Trunking Gateway


Media Server

SignalingGateway

AccessGateway

Video

Data

BaseStation


TDM to IP

PSTNCentrexATMFR

N x T1/E1/T3/E3

IP


VoP Issues and SolutionsVoP Issues and Solutions

Issues

• Voice Quality

• Jitter• QoS

• Bandwidth

MediaXpressTM Solutions

• Small (1ms) Sample Sizes• High Speed Packetization (1ms)• On-chip Jitter Management• Built-in Support for MPLS/RSVP/

DiffServ Tags• Reduced Packet Header

Overhead Through Intelligent Multiplexing and VAD


VoIP Gateway DesignVoIP Gateway Design

Wireless Network

Local CPU10/100

Dual PHY

CT Bus

RJ-45

LIU

&

Framer

DS-3

IP

10/100

Dual PHY

RJ-45 Ethernet MII

MediaXpressTM

DSP Module

ZBT SRAM VPBM

ZBT SRAM VPBM

Wireline Network

PCI Bridge

Local

PCI Bus


Gateway Card Using MediaGateway Card Using MediaXpressXpressTMTM

MediaMediaXpressXpressTMTM

DSP(Mezzanine

Card)

DS-3 Capacity VoIP cPCI


PSTN LatencyPSTN Latency

C/ILECC/ILEC

IXC(TDM)

1ms

30ms

1ms

PSTNEnd-to-End Latency: 40 ms

SSP

IXC

SSPIXC2ms

2ms

2ms2ms


VoIP LatencyVoIP Latency

C/ILECC/ILEC

NGN Carrier(IP)

10ms

150ms

10ms

IP NetworkTypical End-to-End Latency: 200+ ms

SSP

VoIPGW

SSPVoIPGW

15ms15ms

2ms

2ms

Average Router Hops = 6Latency per Hop = 25ms


MediaMediaXpressXpressTMTM-based VoIP Latency-based VoIP Latency

C/ILECC/ILEC

NGN Carrier(MPLS/IP)

1ms

30ms

1ms

MediaXpressTM with MPLSEnd-to-End Latency: 40 ms

SSP

USX

SSPUSX

<2ms<2ms

2ms

2ms

Average Router Hops = 6Latency per MPLS Hop = 5ms


TDMoIP Gateway ApplicationTDMoIP Gateway Application

PSTN

SS7

Trunking Gateway


Media Server

SignalingGateway

AccessGateway

Video

Data

BaseStation


TDM to IP

PSTNCentrexATMFR

N x T1/E1/T3/E3

IP


TDMoIP Issues And SolutionsTDMoIP Issues And Solutions

Issues

• Latency

• Temporal Ordering

• Bandwidth

• Jitter


• Small (1ms) Sample Sizes• High Speed Packetization (1ms)• Built-in TSI and TDM Buffers for

Synchronous Playout• Reduced Packet Header

Overhead Through Intelligent Multiplexing and VAD

• Built-in Jitter Management for Seamless Timing Control


TDMoIP Gateway DesignTDMoIP Gateway Design

MediaXpressTM

PCI Bridge

Local CPU

10/100

Dual PHY

10/100

Dual PHY

ZBT SRAM

VPBM

RJ-45

RJ-45

Timing

Module

DS-3

IP

TDM Network

LIU/ Framer

Local

PCI Bus

CT Bus

Ethernet MII


Media Server ApplicationMedia Server Application

Trunking Gateway


Media Server

SignalingGateway

AccessGateway

Video

Data

BaseStation


PSTN

SS7

TDM to IP

PSTNCentrexATMFR

N x T1/E1/T3/E3

IP


Media Server Issues and SolutionsMedia Server Issues and Solutions

Issues

• Processing Latency

• Port Efficiency

• Limited to IP or TDM Services

• Billing


• Small (1ms) Sample Sizes• High Speed Packetization (1ms)• Enables Shared DSP Resources

Through High Speed IP Interconnect

• Includes TDM and IP Interfaces• Built-in Real Time Metrics by

Service, by Subscriber


Media Server DesignMedia Server Design

Wireless Network

Local CPU10/100

Dual PHY

CT Bus

RJ-45

LIU

&

Framer

DS-3/OC-3

IP

10/100

Dual PHY

RJ-45 Ethernet MII

MediaXpressTM

Media Services DSP

ZBT SRAM VPBM

ZBT SRAM VPBM

Wireline Network

PCI Bridge

Local

PCI Bus


ConclusionConclusion

• MediaXpressTM Convergence Processor Features and Micro-Architecture

• Challenges of SOC Design and VDSM Design• Gateway Software and Media Flow Design• MediaXpressTM-Based System Design Adds to VoIP Performance• Applications for Multi-Service Convergence

– Voice over Packet– TDM over IP – Media Servers

SLIDE 1 September,2003 2003 BIMS VoIP Network Processors Deployment in Multi-Service Applications...

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Transcript of SLIDE 1 September,2003 2003 BIMS VoIP Network Processors Deployment in Multi-Service Applications...