SKA SIGNAL PROCESSING COSTS · 2012. 9. 25. · td‐002 Rev A [17] Pulsar Signal processing on...

Name Designation Affiliation Date Signature

Additional Authors

Submitted by:

W. Turner Signal Processing Domain Specialist

SPDO 2011‐03‐26

Approved by:

K.Cloete Project Manager SPDO 2011‐03‐29

SKA SIGNAL PROCESSING COSTS

Document number .................................................................. WP2‐040.030.020‐TD‐001

Revision ........................................................................................................................... 1

Author ................................................................................................................ W Turner

Date ................................................................................................................. 2011‐02‐29

Status ............................................................................................... Approved for release

WP2‐040.030.020‐TD‐001 Revision : 1

2011‐02‐29 of 65

DOCUMENT HISTORY

Revision Date Of Issue Engineering Change

Number

Comments

A ‐ ‐ First draft release for internal review

1 29th March 2011 ‐ First Issue

DOCUMENT SOFTWARE

Package Version Filename

Wordprocessor MsWord Word 2003 08‐wp2‐040.030.020‐td‐001‐1‐cost model

Block diagrams

Other

ORGANISATION DETAILS

Name SKA Program Development Office

Physical/Postal

Address

Jodrell Bank Centre for Astrophysics

Alan Turing Building

The University of Manchester

Oxford Road

Manchester, UK

M13 9PL

Fax. +44 (0)161 275 4049

Website www.skatelescope.org

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TABLE OF CONTENTS

1 INTRODUCTION ............................................................................................. 7

1.1 Purpose of the document ....................................................................................................... 7

2 REFERENCES ................................................................................................ 7

3 OVERVIEW .................................................................................................. 9

4 SOFTWARE CORRELATOR 001 ........................................................................ 13

4.1 Procurement Method ........................................................................................................... 14

4.2 Cost Estimates ....................................................................................................................... 14

5 SOFTWARE CORRELATOR 002 ........................................................................ 16


5.2 Cost Estimates ....................................................................................................................... 18

6 GSA CORRELATOR ...................................................................................... 20


6.2 Cost Estimates Table 15 GSA Board Cost and Power Estimates ........................................... 24

7 ASKAP STYLE CORRELATOR ......................................................................... 26


7.2 Cost Estimates ....................................................................................................................... 29

8 UNIBOARD BASED CORRELATOR ..................................................................... 32


8.2 Cost Estimates ....................................................................................................................... 33

9 CASPER CORRELATOR .................................................................................. 35


9.2 Cost Estimates ....................................................................................................................... 36

10 MINIMUM POWER ASIC CORRELATOR ......................................................... 39

11 SKADS BASED CORRELATOR ...................................................................... 39


11.2 Cost Estimates ....................................................................................................................... 40

12 CENTRAL BEAMFORMER ............................................................................ 42


12.2 Cost Estimates ....................................................................................................................... 44

13 UNIBOARD BASED STATION BEAMFORMER ..................................................... 47


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13.2 Cost Estimates ....................................................................................................................... 48

14 STATION BEAMFORMER (ASIC) ................................................................... 51


14.2 Hybrid ASIC and FPGA Beamformer...................................................................................... 51

14.3 Cost Estimates ....................................................................................................................... 53

15 NON IMAGING PROCESSING ........................................................................ 54


15.2 Cost Estimates ....................................................................................................................... 56

16 PAF BEAMFORMING ................................................................................ 58


16.2 Cost Estimates ....................................................................................................................... 59

17 PULSAR SIGNAL PROCESSING ON UNIBOARD ................................................ 61


17.2 Cost Estimates ....................................................................................................................... 63

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LIST OF FIGURES

Figure 1 FPGA Pulsar Processing Cost Estimates .................................................................................. 61

LIST OF TABLES

Table 1 Indices of Inflation Values for cost estimation ........................................................................... 9

Table 2 Exchange Rates for use in cost estimation (based on a 7 year average) ................................. 10

Table 3 Description of the Basis of Estimate Ratings ............................................................................ 11

Table 4 Software correlator 001 component cost estimates ............................................................... 13

Table 5 Cost coverage Software Correlator 001 ................................................................................... 16

Table 6 SKA Memo 130 compliant correlator component costs .......................................................... 16

Table 7 Concept 160 beam correlator component costs...................................................................... 17

Table 8 Cost coverage Software Correlator 002 ................................................................................... 20

Table 9 GSA Phase 2 Correlator WBSPF component costs ................................................................... 20

Table 10 GSA Phase 2 Dish PAF component costs ................................................................................ 21

Table 11 GSA Phase 2 Sparse AA component costs .............................................................................. 21

Table 12 GSA Phase 2 Dense AA component costs .............................................................................. 22

Table 13 GSA concept NREs (not including institute design costs) ....................................................... 22

Table 14 GSA concept NREs (not including institute design costs) ....................................................... 23

6.2 Cost Estimates Table 15 GSA Board Cost and Power Estimates ................................................. 24

Table 16 Cost coverage GSA Correlator ................................................................................................ 26

Table 17 ASKAP Style Phase 1 Correlator component costs ................................................................ 27

Table 18 ASKAP Style Phase 2 Correlator component costs ................................................................ 28

Table 19 Cost coverage ASKAP Style Correlator SKA1 and SKA2 .......................................................... 31

Table 20 Uniboard Phase 1 Correlator component costs .................................................................... 32

Table 21 Cost coverage Uniboard Correlator for SKA1 ......................................................................... 35

Table 22 CASPER Phase 1 Correlator component costs ....................................................................... 35

Table 23 Cost coverage CASPER Correlator for SKA1 ........................................................................... 38

Table 24 AA Correlator Phase 2 component costs ............................................................................... 39

Table 25 Cost coverage Dense AA Correlator for SKA2 ....................................................................... 41

Table 26 Central Beamformer SPF component costs ........................................................................... 42

Table 27 Central Beamformer SparseAA component costs .................................................................. 43

Table 28 Cost coverage Central Beamformer ....................................................................................... 46

Table 29 Uniboard Station Beamformer component costs ................................................................. 47

Table 30 Cost coverage Uniboard Station Beamformer ....................................................................... 50

Table 31 Component cost breakdown of single station processing ..................................................... 52

Table 32 Power consumption of single station processing .................................................................. 52

Table 33 Cost Coverage of Station Processing for SKA‐1 ...................................................................... 54

Table 34 Component cost breakdown of single station processing ..................................................... 55

Table 35 PAF Beamformer cost estimates SKA 1 .................................................................................. 59

Table 36 PAF Beamformer cost estimates SKA2 ................................................................................... 59

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Table 37 Uniboard Pulsar timing component costs ............................................................................. 62

Table 38 Cost coverage UNIBOARD Pulsar processing for SKA1........................................................... 65

LIST OF ABBREVIATIONS

AA .................................. Aperture Array

Ant. ................................ Antenna

CoDR ............................. Conceptual Design Review

DRM .............................. Design Reference Mission

EoR ............................... Epoch of Reionisation

EX .................................. Example

FLOPS ........................... Floating Point Operations per second

FoV ................................ Field of View

Ny .................................. Nyquist

Ov .................................. Over sampling

PAF ............................... Phased Array Feed

PrepSKA........................ Preparatory Phase for the SKA

RFI ................................. Radio Frequency Interference

rms ................................ root mean square

SKA ............................... Square Kilometre Array

SKADS .......................... SKA Design Studies

SPDO ............................ SKA Program Development Office

SSFoM .......................... Survey Speed Figure of Merit

TBD ............................... To be decided

Wrt ................................. with respect to

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1 Introduction

This document collates the costing information provided in each of the concept descriptions into a

single document. The level of completeness of the costing for each concept is measured against the

requirements documented in the Cost Estimation for the SKA – A ‘How to’ Manual [1].

This document is part of a series generated in support of the Signal Processing CoDR which includes

the following:

Signal Processing High Level Description

Technology Roadmap

Design Concept Descriptions

Signal Processing Requirements

Signal Processing Costs

Signal Processing Risk Register

Signal Processing Strategy to Proceed to the Next Phase

Signal Processing Co DR Review Plan

Software & Firmware Strategy

1.1 Purpose of the document

The purpose of this document is to provide documentation of the cost of the signal processing

concepts and their completeness in line with [1]. This document is part of a larger document set in

support of the SKA Signal Processing CoDR. It provides an initial perspective of Correlation, beam‐

forming and non imaging processing for the different receptor types proposed for the SKA.

SKA Memos 125, 130 and the Phase 1 DRM have been used as the baseline for best information on

system parameters while the Systems Requirement Specification, SRS, is being created.

2 References

[1] R McCool, Cost Estimation for the SKA – A ‘How to’ Manual MGT‐040.070.000‐MP‐002 Rev B

[2] Signal Processing Wiki, http://wiki.skatelescope.org/

[3] Signal Processing High Level Description WP2‐040.030.010‐TD‐001 Rev D

[4] Pulsar survey with SKA phase 1 WP2‐040.030.010‐TD‐003 Rev A

[5] Signal Processing Technology Roadmap WP2‐040.030.011.TD‐001 Rev D

[6] Software Correlator Concept Description WP2‐040.040.010‐td‐001 Rev A

[7] GSA Correlator Concept Description WP2‐040.050.010‐td‐001 Rev A

[8] ASKAP Correlator Concept Decription WP2‐040.060.010‐td‐001 Rev A

[9] UNIBOARD Concept Description WP2‐040.070.010‐td‐001 Rev B

[10] CASPER Correlator Concept Description WP2‐040.080.010‐td‐001 Rev A

[11] ASIC‐Based Correlator for Minimum Power Consumption‐‐ Concept Description WP2‐

040.090.010‐td‐001 Rev B

[12] SKADS Processing WP2‐040.100.010‐td‐001 Rev A

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[13] Central Beamformer Concept Description WP2‐040.110.010‐td‐001 Rev A

[14] Station Beamformer Concept WP2‐040.120.010‐td‐001 Rev A

[15] SKA Non Imaging Processing Concept Decription: GPU Processing for Real‐Time Isolated

Radio Pulse Detection WP2‐040.130.010‐td‐001 Rev A

[16] A Scalable Computer Architecture For On‐Line Pulsar Search on the SKA WP2‐040.130.010‐

td‐002 Rev A

[17] Pulsar Signal processing on UNIBOARD WP2‐040.170.010‐td‐001 Rev A

[18] Signal Processing Requirement Specification WP2‐040.030.000.SRS‐001 Rev B

[19] Signal Processing Risk Register WP2‐040.010.010.RE‐001 Rev A

[20] Signal Processing Strategy to Proceed to the Next Phase WP2‐040.010.030.PLA‐001 RevA

[21] Software and Firmware Strategy WP2‐040.200.012‐PLA‐001 Rev A

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3 Overview

This document presents collates the costing data presented in the concept descriptions for the

Signal Processing CoDR and presents them in a common format described in the cost estimation

‘how to’ document [1]. The emphasis for the CoDR is Phase 1 with extensibility to phase 2 of the

project. Consequently, costing is considered with reference to three dates

Base Year ‐ 2007

Phase 1 Procurement date – 2014

Phase 1 Software delivery date ‐ 2017

Phase 2 Procurement date ‐ 2017

To achieve this the inflation values specified in the costing how to [1] shown in Table 1 are utilised to

correct for product, service and labour costs

Index Value Time Period of Average Reference

PPPI 1.9% 1998‐2009 Industry producer prices index ‐

annual data ‐ (2005=100) (NACE Rev.

2) (sts_inpp_a)

SPPI

(excl

telecommunications)

2.4% 1996‐2009 Service producer prices index ‐

quarterly data ‐ (2006=100) (NACE

Rev.2) [sts_sepp_q]

LCI 3.6% 1997‐2008 Labour cost index ‐ Annual data

(lc_lci_r1_a)

Table 1 Indices of Inflation Values for cost estimation

The three categories for inflation defined for inflation rates available from the Eurostat office of

statistics are:

Product Producer Price Index (PPPI)

This index takes account of price data for the mining, quarrying, manufacturing and industry for the production of products.

Service Producer Price Index (SPPI)

This index takes account of the price of rendering services, such as accountancy, legal, employment, transport, consultancy etc. Data for the European Union region is only available from 2008‐2009. Given the volatility of Western economies over this period and the short time frame of the statistics this data is not suitable for use as an inflation estimate for the SKA. However the UK Government has SPPI data from 1997‐2009. This data has been used to establish a long term value for inflation in this sector and will be used for SKA cost estimates. Telecommunications sector data has been omitted due to the immaturity and volatile nature of this sector over the time period of interest.

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Labour Cost Index (LCI)

This index takes account of the total cost of employment across the EU zone. Each concept description has quoted prices and costs applicable to the country of origin or in US dollars. These figures have been taken and converted to Euros using the Exchange rates (based on 7 year average) defined in the costing how to [1]. An abridged version applicable to the documents presented for inclusion in the Signal Processing CoDR document set is presented in Table 1.

Currency Exchange Rate (7 year average)

Australian Dollar 1.70

Canadian Dollar 1.53

Pound Sterling 0.73

US Dollar 1.30

South African Rand 9.48

Table 2 Exchange Rates for use in cost estimation (based on a 7 year average)

The costing how‐to [1] defines a Basis of Estimate Confidence Level, BECL, numerical rating as defined in Table 3.

BE # Description Documentary Evidence Minimum requirement for confidence in quantities.

BECL5 (F)

Lowest BE rating. Costs based on anecdotal evidence and best guess scenarios. Undeveloped specifications and technology under design.

Expert opinion ,vendor target prices or historical prices from analogous projects. Description of scaling laws used in estimates.

Concept Design Phase.System and Domain Conceptual Design Review undertaken. (CoDR)

BECL4 (F)

Technical specifications in rough draft stage. Costs either anecdotal or best guess. Quantities reasonably well known. All aspects speculative but at a mature stage of discussion within the group. Schedules, contracts, risk plans all in progress. Relationships with potential suppliers under development.

Vendor written estimates,quotes requested without competitive tender or historical prices from analogous projects. Description of scaling laws used in estimates.

Definition Design Phase.System and Domain Requirements Review Undertaken. (SRR)

BECL3 (F)

Technical specifications under peer review. Costs obtained from reliable sources and reiterated several times. Quantities known to high degree. Designs finalized and agreement reached on implementation modes. Costs and methodologies accepted throughout the group. Risk mitigation plan in place awaiting approval.

Quotes requested without competitive tender, catalog prices or historical prices from analogous projects. Description of scaling laws used in estimates.

Preliminary Design Phase.System and Domain Critical Design review undertaken. (CDR)

BECL2 (F)

Technical Specifications finalized. Schedule of delivery finalized. Quantities finalized. Contractual arrangements being concluded. Variations unlikely. Integration into system known, documented and

Quotes for supply under competitive tender. The use of scaling laws to estimate costs is not acceptable at this stage.

Detailed Design Phase.Domain Pre‐production design review undertaken. (PR) System Critical Design review undertaken. (CDR)

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costed. Associated labour costs known. Logistics of supply and delivery known and costed. Costs Corroborated by at least one other peer in the group. Risk mitigation plan approved

BECL1 (F)

Highest BE rating. Meets all of the requirements for BE2. Corroborative evidence from actual costs incurred elsewhere (Precursor) .Supply contract firm. Variation possibilities very limited or Zero. Labour rates firm for 12 months. Schedule and Risk quantified.

Contract signed.The use of scaling laws to estimate costs is not acceptable at this stage.

Fabrication & assembly Phase. Contract tender quantity.

Table 3 Description of the Basis of Estimate Ratings

At the CoDR all costs are at the lowest BE rating of 5 which is defined as:

Costs based on anecdotal evidence and best guess scenarios. Undeveloped specifications

and technology under design.

A complete costing for the Signal Processing is to include:

Software Development

Subsystem Hardware costs

o Component cost

o Safe Operation

o Internal M&C

o Internal Power

o Internal Software & licences

o Localised or Internal Temp Control

o EMC (shielding and resilience)

o Integrated diagnostics

o Test, Verification, Validation

o Internal Integration

o Spares

o Repair and rework

o Quality control

o NRE development costs

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o Labour (manufacture & field installation)

o Simulators

o Test Equipment

Hardware Sub‐system Operations costs

o Maintenance

o Annual power costs

o Upgrades

o Labour

Within this document each concept is presented against the above costing items. The coverage at

the CoDR is largely confined to component, annual power and NRE costs. The remaining categories

will be populated and the BE levels improved as the signal processing progresses through the

development phase towards the SRS.

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4 Software Correlator 001

The costing presented in this section is for the software correlator 001 concept which has been

extracted from the concept description WP2‐040.200.012‐PLA‐002 Rev A. The concept covers phase

1 of the SKA only and SKA Memo 130 has been taken as its base line for functionality. The concept

makes assumptions with respect to the interfaces from the dishes and Sparse AA stations with

respect to channelization and network connectivity. The concept assumes no bridging hardware is

required between the network from the arrays and the software correlator. This, coupled with the

assumed achievable processing capability of a GPU card, accounts for the major differences between

the software correlator concepts.

The items considered for component costs are detailed in the tables below

Correlator Item Quantity Cost each Total Cost Cost estimate

base year

value 2007

SKA Dish Server + 2 x NVidia Maxwell

GPU

250 €5k €1.25M €1.1M

Infiniband switch + HCA per

port

250 €1k €0.25M €0.2M

Sparse AA

(430

beams)

NVidia Maxwell GPU 2000 €5k €10M €8.6M

Infiniband switch + HCA per

port

430 €1k €0.43M €0.4M

Total €10M

Table 4 Software correlator 001 component cost estimates

The component costs currently do not include the following Cables, Racking, Breaker panels, M&C

nodes and switches, operating systems, infrastructure software and spares.

No estimates of NRE are currently availabel.

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4.1 Procurement Method

The equipment procurement model is Commercial Off The Shelf, COTS.

4.2 Cost Estimates

Description of cost Cost

Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

1Reference to

Substantiating

Evidence

Notes

Component Cost Y €10M Based on

projecting

manufacturer’s

current figures

to 2015

Estimates for

servers, GPUs and

switch only.

Safe Operation Y €0

Included in

component

cost

Manufacturer’s

data sheets

COTS items are CE

marked and should

therefore be fit for

safe operation

Internal M&C N ‐ ‐ COTS server and OS

provides most but

not all of the

internal M&C.

Internal Power Y €0

Included in

component

cost

Manufacturer’s

data sheets

PSUs integral to

servers

Internal Software & Licences N ‐ ‐ Need to consider

whether open

source or supported

Localised or Internal Temp Control Y €0

Included in

component

cost

Manufacturer’s

data sheets

Built into COTS

equipment

EMC (shielding and resilience) NA ‐ Manufacturer’s

data sheets

Correlator room

provides shielding.

1 Links to manfacturer’s current cost and power figures given in Technology roadmap document WP2‐040.030.011‐TD‐001

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Servers FCC

compliant

Integrated diagnostics Y TBC €0

Included in

component

cost

Manufacturer’s

data sheets

Diagnostics for

servers, switches,

HCA & NICs inbuilt.

However this may

not be sufficient

Test, Verification, Validation N ‐ ‐ Not considered yet

Internal Integration N ‐ ‐ Not considered yet

Spares N ‐ ‐ ARM model not

sufficiently

developed to

calculate this

Repair and rework N ‐ ‐ ARM model not

sufficiently

developed to

calculate this

Quality control N ‐ ‐

NRE development costs N ‐ ‐

Labour (manufacture & field

installation)

N ‐ Installation costs

not yet considered

Simulators N ‐

Test Equipment N ‐

Lightning protection N/A ‐ ‐ Lightning protection

provided by the

Central Processing

facility

Environmental protection Y €0 Assume Correlator

room provides

required

environment

Hardware Sub‐system Operations

costs incl:

Maintenance N ‐ ‐ Not yet considered

Annual power costs Y €1.9M pa Based on

projecting

manufacturer’s

Assumes equipment

running 100% of the

time at 1€ per Watt

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current figures

to 2015

Upgrades N ‐ ‐ Not yet considered

Labour N ‐ ‐ Not yet considered

Table 5 Cost coverage Software Correlator 001

5 Software Correlator 002

The costing presented in this section is for the software correlator 002 concept which has been

extracted from the concept description WP2‐040.200.012‐PLA‐002 Rev A. The concept covers phase

1 of the SKA only and SKA Memo 130 has been taken as its base line for functionality. However, it is

noted that the concept description has deviated from the baseline of 430 beams from the Sparse AA

and uses a figure of 160 beams. To provide some level of consistency across concepts for other

technologies a cost figure for the 430 beam case has been derived as well as quoting the 160 beam

case.



base year

value 2007

SKA Dish NVidia Maxwell GPU 272 €2,500 €0.68M €0.59M

Mellanox 34 port Infiniband

switch

16 €6.5k €0.104M €0.9M

CASPER Roach Unit 125 €5k €0.625M €0.54M

Sparse AA

(430

beams)

NVidia Maxwell GPU 1096 €2,500 €2.7M €2.3M

Mellanox Mellanox

MIS5022Q‐1BFR 8 port

Infiniband switch

430 €1.9k €0.82M €0.7M


Total €22M

Table 6 SKA Memo 130 compliant correlator component costs

The component costs currently do not include the following Cables, Breaker panels, M&C nodes and

switches, operating systems, infrastructure software and spares.

The NRE is limited to estimates of writing the main correlation software and does not currently

include estimates for infrastructure software documentation, verification, integration, validation or

management.

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base year

value 2007

SKA Dish NVidia Maxwell GPU 272 €2,500 €0.68M €0.59M

Mellanox 34 port Infiniband

switch

16 €6.5k €0.104M €0.09M


Sparse AA

(160

beams)

NVidia Maxwell GPU 408 €2,500 €1.02M €0.88M

Mellanox Mellanox

MIS5022Q‐1BFR 8 port

Infiniband switch

160 €1.9k €0.304M €0.26M


Total €10M

Table 7 Concept 160 beam correlator component costs


The equipment procurement model is Commercial Off The Shelf, COTS. The CASPER ROACH FPGA

processing unit is assumed to comply with model.

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5.2 Cost Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

2Reference to

Substantiating

Evidence

Notes

Component Cost Y €22M

(480 beams

Sparse AA)

€10M

(160 beams

Sparse AA)

Based on

projecting

manufacturer’s

current figures

to 2015

Estimates for

servers, GPUs,

ROACHs and

switches only.

Safe Operation Y €0 Manufacturer’s

data sheets

COTS items are CE

marked and should


safe operation.

ROACH units are

assumed to conform

to the COTS model


provides most but

not all of the

internal M&C.


Included in

component

cost

Manufacturer’s

data sheets

PSUs integral to

servers


whether open

source or supported

Localised or Internal Temp Control Y €0 Manufacturer’s

data sheets

Built into COTS

equipment

EMC (shielding and resilience) NA ‐ Manufacturer’s

data sheets

Correlator room

provides shielding.

2 Links to manfacturer’s current cost and power figures given in Technology roadmap document WP2‐040.030.011‐TD‐001

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Servers FCC

compliant


Included in

component

cost

Manufacturer’s

data sheets

Diagnostics for

servers & NICs

inbuilt. However

this may not be

sufficient




sufficiently

developed to

calculate this


sufficiently

developed to

calculate this


NRE development costs Y €1M Professional

Engineer’s

opinion

Estimated 10 person

years


installation)


not yet considered

Simulators N ‐



provided by the

Central Processing

facility


room provides

required

environment


costs incl:


Annual power costs Y €100k pa Based on

projecting

Assumes equipment

running 100% of the

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manufacturer’s

current figures

to 2015




Table 8 Cost coverage Software Correlator 002

6 GSA Correlator

The costing presented in this section is for the Giant Systolic Array correlator concept which has

been extracted from the concept description WP2‐040.050.010‐TD‐001 Rev B. The concept covers

both phase 1 and phase 2 of the SKA though the main focus is on phase 2. SKA Memo 130 has been

taken as its base line for the phase 1 functionality.



base year

value 2007

SKA Dish

WBSPF

3072 ant

1 GHz per

polarisation

GSA Correlator Board 1008 €5.602k €5.65M €4.9M

Rear connectivity 1008 €118 €0.12M €0.10M

Front connectivity 1008 €52 €0.05M €0.04M

48U 19” precision rack 24 €654 €0.02M €0.02M

Per rack network switch,

breaker panel, power

cables

24 €3268 €0.08M €0.08M

Total €6M

Table 9 GSA Phase 2 Correlator WBSPF component costs

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base year

value 2007

SKA Dish

PAF

2048 ant

750

MHz/pol

30 beams


Rear connectivity 9600 €118 €1.13M €1.0M

Front connectivity 9600 €52 €0.5M €0.4M




cables

184 €3268 €0.6M €0.5M

Total €56M

Table 10 GSA Phase 2 Dish PAF component costs


base year

value 2007

Sparse AA

2563 stations

3004MHz/pol

1000 beams





cables

42 €3268 €0.14M €0.1M

Total €11M

Table 11 GSA Phase 2 Sparse AA component costs

3 Phase 2 Sparse AA is 250 stations 4 Sparse AA bandwidth is 350 MHz

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base year

value 2007

Dense AA

256 stations

300MHz/pol

1000 beams





cables

42 €3268 €0.14M €0.12M

Total €11M

Table 12 GSA Phase 2 Dense AA component costs

System Infrastructure Quantity Cost each Total Cost 5Cost estimate

base year

value 2007

System 200kW 48VDC

battery‐backed power plant

27 €0.2M €5.4M €4.7M

Shielded room, cooling and

power distribution

infrastructure

1 €0.4k €0.4M Not in the

scope of the

signal

processing

Total €5M

Table 13 GSA concept NREs (not including institute design costs)

5 3.6% pa PPI

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NRE Item Quantity Cost each Total Cost 6Cost estimate

base year

value 2007

ASIC 1 €5M €5M €3.8M

GSA and patch board

design and fabrication

1 €0.4k €0.4M €0.3M

System Infrastructure 1 €0.8M €0.8M €.6M

Total €5M

Table 14 GSA concept NREs (not including institute design costs)


The GSA correlator is mostly bespoke design including the GSA circuit boards and front and back interconnects. There is also major activity based on ASIC development. This will involve sub‐contracting a lot of the low level ASIC design to a specialist design house. COTS equipment is to be used for racking, data and M&C switches and breaker panels

6 3.6% pa PPI

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6.2 Cost Estimates Table 15 GSA Board Cost and Power Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

Reference to

Substantiating

Evidence

Notes

Component Cost Y €89M Projection from

EVLA correlator

Safe Operation N ‐ ‐

Internal M&C Y €0

Included in

component

cost

‐ M&C components

and network

included based on

EVLA capability


Included in

component

cost

Projection from

EVLA correlator

48VDC supplies with

battery backup


whether open

source or supported

Localised or Internal Temp Control Y €0 Either part of

component cost

(heatsinks) or

correlator room

(plenum

cooloing)

Concept assumes all

fans and provision

of cooling air flow is

a service provided

by the correlator

room

EMC (shielding and resilience) N ‐ Manufacturer’s

data sheets

Correlator room

provides shielding.

Cards to be

environmentally

tested to FCC EMC

standard

Integrated diagnostics Y €0

Included in

component

cost

Read across

from EVLA

correlator

GSA X board cost

breakdown includes

M&C component

costs

WP2‐040.030.020‐TD‐001 Revision : 1

2011‐02‐29 of 65

Test, Verification, Validation Y €0.6M

Read across

from EVLA

correlator

Only partial ASIC

RTL development

and test. Other

figures available in

concept description

in terms of duration

but not effort or

cost



sufficiently

developed to

calculate this


sufficiently

developed to

calculate this


NRE development costs Y €5M Professional

Engineer’s

opinion based

on read across

from EVLA

correlator

Doesn’t include

institute design

costs.


installation)


not yet considered

Simulators N ‐



provided by the

Central Processing

facility


room provides

required

environment


costs incl:


WP2‐040.030.020‐TD‐001 Revision : 1

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Annual power costs Y €6.7M pa

All Phase 2

Projection from

EVLA correlator

Assumes equipment

running 100% of the


Includes power

plant efficiency and

cooling

Excludes F part of

correlator



Table 16 Cost coverage GSA Correlator

7 ASKAP Style Correlator

The costing presented in this section is for the ASKAP style correlator concept which has been

extracted from two concept descriptions:

Phase 1 : WP2‐040.060.010‐TD‐002

Phase 2: WP2‐040.060.010‐TD‐001[8]

SKA Memo 130 has been taken as its base line for the phase 1 functionality.


WP2‐040.030.020‐TD‐001 Revision : 1

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base year

value 2007

SKA1 Dish

FPGA ATCA Board

(4 FPGAs per board)

32 €6k €0.197M €0.2M

ATCA Shelf 2 €8k €0.016M €0.01M

48VDC Power 1 €4k €0.004M €0.01M

SFP+ modules 500 €77 €0.04M €0.03M

SKA1

Sparse AA

480 beams

Mid‐size FPGAs 320 €0.8k €0.26M €0.3M

Pizza box enclosure + PSUs

+ connector panel

320 €1.5k €0.48M €0.2M

10 G bps optical link7 16,000 €80 €1.3M €1.1M

Total €2M

Table 17 ASKAP Style Phase 1 Correlator component costs

7 28 Gbps links could be used to reduce Sparse AA SKA1 correlation to under 1.5 M Euro re 2007

WP2‐040.030.020‐TD‐001 Revision : 1

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base year

value 2007

Dish

WBSPF

+ PAF

ATCA Shelf WBSPF

(filterbank)

47 €150k €7.1M €6.1M

ATCA Shelf PAF

(filterbank)

11 €150k €1.65M €1.4M

ATCA Shelf Correlator 242 €150k €36.3M €31.3M

100 G bps Fibre links 11,000 €770 €8.5M €7.3M

Aperture

Array

Sparse

+Dense

ATCA Shelf AA hi

(correlator)

90 €150k €13.5M €11.6M

ATCA Shelf AA lo

(correlator)

50 €150k €7.5M €6.5M

ATCA Shelf AA hi+lo

(correlator)

120 €150k €18M €15.5M

100 G bps Fibre links 50,000 €770 €39M €33.6M

Total €113M

Table 18 ASKAP Style Phase 2 Correlator component costs

The component costs do not include the 48VDC power supplies, cabinets, cable management,

breaker panels, M&C network and processing loads. The optical cross connect required for AA

correlators is also not included.

No figures for NRE are provided. The most significant of these would be for ASIC correlator chip

development.


The ASKAP correlator is mostly bespoke design including the processing circuit boards and Rear Transition Modules for optical interconnect. There is also major activity based on ASIC development for the phase2 implementation. This will involve sub‐contracting a lot of the low level ASIC design to a specialist design house.

WP2‐040.030.020‐TD‐001 Revision : 1

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The use of the ATCA standard simplifies the effort required for card design as common outlines are used. The mechanical aspects of the implementation including shelf, cabinet and air cooling largely fit the COTS procurement profile. However, the pizza box arrangement suggested as part of the proposed SKA1 solution may be bespoke.

7.2 Cost Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

Reference to

Substantiating

Evidence

Notes

Component Cost Y €2M SKA1 Projection from

ASKAP

correlator

FPGA solution SKA1

ASIC solution SKA2 €113M SKA2


Internal M&C Y €0

Included in

component

cost

‐ M&C components

and network

included based on

ASKAP capability

Internal Power Y SKA1 €0

Included in

component

cost

Projection from

ASKAP

correlator

48VDC supplies with

battery backup

N SKA2 ‐ ‐


whether open

source or supported


component cost

(heatsinks) or

correlator room

(plenum

cooloing)

Concept assumes

ATCA rack including

fans. Provision of

cooling ambient air

is a service provided

by the correlator

room


data sheets

Correlator room

provides shielding.

Cards to be

WP2‐040.030.020‐TD‐001 Revision : 1

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environmentally

tested to FCC EMC

standard


Included in

component

cost

Read across

from ASKAP

correlator

technology

Test, Verification, Validation N ‐ ‐



sufficiently

developed to

calculate this


sufficiently

developed to

calculate this




installation)

N ‐ ‐ Installation costs

not yet considered

Simulators N ‐ ‐

Test Equipment N ‐ ‐


provided by the

Central Processing

facility


room provides

required

environment


costs incl:


WP2‐040.030.020‐TD‐001 Revision : 1

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Annual power costs N SKA1

Projection from

ASKAP

correlator

Assumes equipment

running 100% of the


Does not Include

power plant

efficiency and

cooling

Y SKA2

€2.7 M pa8



Table 19 Cost coverage ASKAP Style Correlator SKA1 and SKA2

8 Estimated ASIC dissipation only

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8 Uniboard based Correlator

The costing presented in this section is for the phase 1 UNIBOARD correlator concept which has

been extracted from the concept descriptions WP2‐040.070.010‐TD‐001. SKA Memo 130 has been

taken as its base line for the phase 1 functionality.



base year

value 2007

SKA1 Dish Uniboard Tier 1 16 €10k €0.16M €0.14M

Unibord Tier 2 16 €10k €0.16M €0.14M

Unibord Tier 3 64 €10k €0.64M €0.55M

SKA1

Sparse AA

480 beams

Uniboard 760 €10k €7.6M €6.55M

Total €7M

Table 20 Uniboard Phase 1 Correlator component costs

The component costs are purely limited to the processing boards and do not include racks, 48VDC

power supplies, backplane, cabinets, cables, cable management, breaker panels, M&C network and

processing loads.

The quantities detailed in Table 20 have taken the 2009 Uniboard quantities and scaled them by a

factor of 4 to allow for two future generations of FPGA and Uniboard before 2015.

No figures for NRE are provided.


The Uniboard correlator is a bespoke design requiring the documentation and drawing set associated with design activities for the processing circuit boards, backplane and shelf metalwork.

WP2‐040.030.020‐TD‐001 Revision : 1

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8.2 Cost Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

Reference to

Substantiating

Evidence

Notes

Component Cost Y €7M Read across

from current

Uniboard

projects

Altera FPGA solution

SKA1


Internal M&C Y €0

Included in

component

cost

‐

Internal Power N ‐ ‐


whether open

source or supported

Localised or Internal Temp Control N ‐ ‐ No cost provided for

local cooling.

Concept assumes

provision of cooling

ambient air is a

service provided by

the correlator room.

EMC (shielding and resilience) N ‐ ‐ Correlator room

provides shielding.

Cards to be

environmentally

tested to FCC EMC

standard


Included in

Read across

from existing

WP2‐040.030.020‐TD‐001 Revision : 1

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component

cost

Uniboard design




sufficiently

developed to

calculate this


sufficiently

developed to

calculate this




installation)


not yet considered




provided by the

Central Processing

facility


room provides

required

environment


costs incl:


Annual power costs N €300k

Projection from

current

Uniboard

projects

Assumes equipment

running 100% of the


Does not Include

power supply

efficiency and

cooling

Y

WP2‐040.030.020‐TD‐001 Revision : 1

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Table 21 Cost coverage Uniboard Correlator for SKA1

9 Casper Correlator

The costing presented in this section is for the phase 1 Casper correlator concept which has been

extracted from the concept descriptions WP2‐040.080.010‐TD‐001. SKA Memo 130 has been taken

as its base line for the phase 1 functionality.



base year

value 2007

SKA1 Dish ROACHn 2548 €4.8k €12.2M €10.5M

Data Switch 2752 port 1 €4.2M €4.2M €3.6M

Control Switch 2638 port 1 €0.1M €0.64M €0.55M

M&C Servers 82 €7.8k €0.63M €0.54M

Racks 56 €1.9k €0.11M €0.09M

SKA1

Sparse AA

480 beams

ROACHn 7680 €4.8k €37M €31.9M

Data Switch 77 port 480 €0.12M €57M €49M

Control Switch 26 port 480 €0.001M €0.48M €0.4M

M&C Servers 80 €7.8k €0.624M €0.5M

Racks 240 €1.9k €0.46M €0.4M

Total €98M

Table 22 CASPER Phase 1 Correlator component costs



processing loads.

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The equipment procurement model is Commercial Off The Shelf, COTS. The CASPER ROACH FPGA

processing unit is assumed to comply with model.

9.2 Cost Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

Reference to

Substantiating

Evidence

Notes

Component Cost Y €98M Projection

based on read

across from

MeerKat project

Safe Operation Y TBC ‐ ‐ COTS items are CE

marked and should


safe operation.

ROACH unit safe

operation TBC


provides most but

not all of the

internal M&C.


Included in

component

cost

Manufacturer’s

data sheets +

ROACH

documentation

TBC

PSUs integral to

servers and ROACH

unit


whether open

source or supported


Included in

component

Manufacturer’s

data sheets and

ROACH

documentation

Built into COTS

equipment and

ROACH unit

WP2‐040.030.020‐TD‐001 Revision : 1

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cost

EMC (shielding and resilience) Y ‐ ‐ Correlator room

provides shielding.

Servers FCC

compliant

ROACH box EMC

qualified


Included in

component

cost

Manufacturer’s

data sheets

ROACH

documentation

Diagnostics for

servers, switches,

NICs inbuilt.

However this may

not be sufficient




sufficiently

developed to

calculate this


sufficiently

developed to

calculate this


NRE development costs Y €2.3M

Read across

from MeerKat

Does not include

ROACH

:development is part

of the CASPER

community


installation)


not yet considered




provided by the

Central Processing

facility


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room provides

required

environment


costs incl:


Annual power costs y €2.8M

Projection from

Meerkat

Assumes equipment

running 100% of the


Does not Include

power supply

efficiency and

cooling



Table 23 Cost coverage CASPER Correlator for SKA1

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10 Minimum Power ASIC Correlator

The ASIC based Processing for Minimum Power Consumption concept is documented in

WP2‐040.090.010‐TD‐001.

This document has a focus on the optimisation of power consumption through analysis of ASIC

architecture. It makes no attempt to provide costs.

11 SKADS based Correlator

The costing presented in this section is for the phase 2 AA Correlator System concept which has

been extracted from the concept descriptions WP2‐040.040.010‐TD‐001.



base year

value 2007

SKA2

Dense AA

Correlator boards

(8 per shelf)

1680 €8k €13.4M €11.6M

I/P boards

(16 per shelf)

3360 €9k €30M €25.9M

Backplane 210 €2k €0.42M €0.36M

Shelf Mechanics 210 €1k €0.21M €0.18M

Rack Mechanics

(3 shelves per rack)

70 €1k €0.07M €0.06M

Total €38M

Table 24 AA Correlator Phase 2 component costs

The component costs do not include, cables, cable management, breaker panels, M&C network and

M&C processing nodes.



The equipment procurement model is bespoke design for processing boards and shelf metal work.

The type of processing node is not identified in the concept

WP2‐040.030.020‐TD‐001 Revision : 1

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11.2 Cost Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

Reference to

Substantiating

Evidence

Notes

Component Cost Y €38M Professional

opinion

Dense AA correlator

only


Internal M&C N ‐ ‐ .


Included in

component

cost


whether open

source or supported

Localised or Internal Temp Control N ‐ ‐

EMC (shielding and resilience) Y ‐ ‐ Correlator room

provides shielding.

Design to be EMC

tested for FCC

compliancy


Included in

component

cost




sufficiently

developed to

calculate this


sufficiently

WP2‐040.030.020‐TD‐001 Revision : 1

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developed to

calculate this




installation)


not yet considered




provided by the

Central Processing

facility


room provides

required

environment


costs incl:


Annual power costs y €1.0M

Professional

opinion

Assumes equipment

running 100% of the


Does not Include

power supply

efficiency and

cooling



Table 25 Cost coverage Dense AA Correlator for SKA2

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12 Central Beamformer

The costing presented in this section is for the SKA Central Beamformer concept which has been

extracted from the concept description WP2‐040.110.010‐TD‐001 Rev A. The concept covers

beamforming across the central 5km diameter which is applicable for both phase1 and phase 2 of

the SKA for single pixel feed and Sparse AA receptor technologies. Consideration is given to

beamforming PAF and Dense AA which are applicable to phase 2. SKA Memo 130 has been taken as

its base line for the phase 1 functionality.

The items considered for component costs for Phase 1 are detailed in the tables below:


base year

value 2007

SKA Dish

Single Pixel

Feed

250 ant

1 GHz per

polarisation,

12 pol’d

beams

Beamformer FPGA (Stratix‐

V 5SGSD6 est $5k9 ea); 256

ants, 75 MHz/band‐slice, 12

pol’d beams/FPGA

14 €3500 €49k €42.2k

COTS switch N/A: beamformer chips reside on the correlator

board.

Front connectivity N/A: beamformer chips reside on the correlator

board.

48U Pony Crate N/A: beamformer chips reside on the correlator

board.



cables

N/A: beamformer chips reside on the correlator

board.

Total €42k

Table 26 Central Beamformer SPF component costs

9 This is a guess based on rough previous generation pricing. Hardcopy devices could be much less, depending on volume, and with a modest NRE.

WP2‐040.030.020‐TD‐001 Revision : 1

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base year

value 2007

Sparse AA

50 stations

380

MHz/pol

(60 pol’d

beams per

beam=

480x60

=28,800

beams)

Band/Slice Beamformer

Board (Stratix‐V 5SGSD6

est. $5k ea); 50 ants, 75

MHz/band‐slice, 60 pol’d

beams/FPGA.

2400 €3500 €8.4M €7.2M

COTS switch N/A: beamformer chips reside on the correlator

board.

Front connectivity N/A: beamformer chips reside on the correlator

board.

48U Pony Crate N/A: beamformer chips reside on the correlator

board.



cables

N/A: beamformer chips reside on the correlator

board.

Total €7.2M

Table 27 Central Beamformer SparseAA component costs

For SKA Phase 2, the minimum Central Beamformer implementation shown in [25] indicates a cost

and power that is ~1/32nd the cost of the X‐part of the correlator. If many more beams are

generated, perhaps full primary‐beam coverage, then the Central Beamformer could be ~1/2 the

cost of the X‐part of the correlator (refer to section 6.1 of [25]). Further Central Beamformer

requirements definition (likely requiring iteration of Non‐Visibility Computing cost and power) is

required before better estimates can be generated.

WP2‐040.030.020‐TD‐001 Revision : 1

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The Central Beamformer , for Phase 1, will likely use correlator board infrastructure, provided that the number of beams is as assumed in the previous section. Therefore there is only incremental cost in designing beamformer chips on correlator boards.

12.2 Cost Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

Reference to

Substantiating

Evidence

Notes

Component Cost y €7.3M


Internal M&C Y €0

Included in

component

cost

‐ M&C components

and network

included based on

EVLA capability


Included in

component

cost

Projection from

EVLA correlator

48VDC supplies with

battery backup


whether open

source or supported


component cost

(heatsinks) or

correlator room

(plenum

cooling)

Concept assumes all

fans and provision

of cooling air flow is

a service provided

by the correlator

room


data sheets

Correlator room

provides shielding.

Cards to be

environmentally

tested to FCC EMC

standard

Integrated diagnostics Y €0 Read across

from EVLA

GSA X board cost

breakdown includes

WP2‐040.030.020‐TD‐001 Revision : 1

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Included in

component

cost

correlator M&C component

costs

Test, Verification, Validation Y €0.5M

Read across

from EVLA

correlator

Only partial ASIC

RTL development

and test. Other

figures available in

concept description

in terms of duration

but not effort or

cost



sufficiently

developed to

calculate this


sufficiently

developed to

calculate this


NRE development costs N ‐ Part of X‐Correlator

boards.


installation)


not yet considered

Simulators N ‐



provided by the

Central Processing

facility


room provides

required

environment


costs incl:


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Annual power costs Y €0.2M pa10

All Phase 2

Projection from

EVLA correlator

Assumes equipment

running 100% of the


Includes power

plant efficiency and

cooling

Excludes F part of

correlator



Table 28 Cost coverage Central Beamformer

10 One thirty second of the X correlator power

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13 Uniboard based Station Beamformer

The costing presented in this section is for the phase 1 UNIBOARD station beamformer concept

which has been extracted from the concept description WP2‐040.070.010‐TD‐001. SKA Memo 130

has been taken as its base line for the phase 1 functionality.


Correlator Item Quantity11 Cost each Total Cost Cost estimate

base year

value 2007

SKA1

Sparse AA

480 beams

Uniboard 52 €10k €0.5M €0.4M

Total

50

stations

€22M

Table 29 Uniboard Station Beamformer component costs



processing loads.





The Uniboard Station Beamformer is a bespoke design requiring the documentation and drawing set associated with design activities for the processing circuit boards, backplane and shelf metalwork.

11 Quantity per station

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13.2 Cost Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

Reference to

Substantiating

Evidence

Notes

Component Cost 50 stations Y €22M Read across

from current

Uniboard

projects


SKA1


Internal M&C Y €0

Included in

component

cost

‐



whether open

source or supported


local cooling.

Concept assumes


ambient air is a

service provided by

the beamformer

equipment housing.

EMC (shielding and resilience) N ‐ ‐ Beamformer

equipment housing

provides shielding.

Cards to be

environmentally

tested to FCC EMC

standard

WP2‐040.030.020‐TD‐001 Revision : 1

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Included in

component

cost

Read across

from existing

Uniboard design




sufficiently

developed to

calculate this


sufficiently

developed to

calculate this




installation)


not yet considered




provided by the

Central Processing

facility

Environmental protection Y €0 Assume

Beamformer

housing provides

required

environment

Extended

temperature range

components


costs incl:


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Annual power costs

50 Stations

y €780k

Projection from

current

Uniboard

projects

Assumes equipment

running 100% of the


Does not Include

power supply

efficiency and

cooling



Table 30 Cost coverage Uniboard Station Beamformer

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14 Station Beamformer (ASIC)

The costing how‐to strategy [1] provides a comprehensive list of items to be included in the overall

costing. However, due to the relative uncertainty in the architecture of the station processing, it is

difficult to provide an accurate estimate of the cost, but based on a tile‐system with a staggered

interleaved approach of time‐domain and frequency domain beamforming as explained in ref [32].

Using the baseline system description of Memo 125 and Memo 130, the cost estimates below are

for an SKA‐1 with 50 stations each containing 11200 antennas and producing 480 beams.


The procurement model for the Station Processing is a hybrid between standard Off‐the‐Shelf

Components, COTS and custom hardware. Whilst making for a relatively complex supply chain, this

provides the cheapest (in terms of power and cost) solution.

14.2 Hybrid ASIC and FPGA Beamformer

1 Tile processing board can handle: 64 (x2‐pol) antennas i.e 1.28 Tbit/s

1 Tile processing board contains: 32‐ASIC(s) each with ≈500 GOP/s and 80 Gbit/s B/W

1 Tile processor outputs: 32 Gbit/s (selectable digitially)

There is 1 station processing board per tile processing board for a total of ≈ 200 station boards and

≈800 CX‐4 cables entering the bunker

Each rack contains 10‐shelves which each contain 8 CX‐4 cables

WP2‐040.030.020‐TD‐001 Revision : 1

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Station

Beamformer

Item Quantity Cost each Total Cost Cost estimate

base year

value 2007

SKA1

Sparse AA

Front‐End ASIC in tile

processor

3000 €8 €0.023M €0.02M

Tile Processing board 200 €769 €0.15M €0.18M

Station Processing Board

(including backplane)

200 €769 €0.15M €0.13M

CX4‐Cables 1000 €8 €0.01M €0.01M

Station Processing Rack 10 €1k €0.01M €0.01M

Infrastructure/Cooling 1

Total €0.3M

Table 31 Component cost breakdown of single station processing

Station

Beamformer

Item Quantity Power

Consumption

each

Total

Power

Consumption

Cost estimate

base year

value 2007

SKA1

Sparse AA

Front‐End ASIC in tile

processor

3000 80W 240kW €0.2M

Tile Processing board 200 20W

(additional

to ASIC)

15kW €0.01M

Station Processing Board

(including backplane)

200 100W 20kW €0.02M

CX4‐Cables 1000 0W €0.0M

Station Processing Rack 10 100kW €0.09M

Infrastructure/Cooling 1 100kW €0.09M

Total €0.2M

Table 32 Power consumption of single station processing

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14.3 Cost Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

Reference to

Substantiating

Evidence

Notes

Subsystem Hardware Costs incl of:

Component Cost Y €15M Professional

Opinion

Refer below for

breakdown cost


Internal M&C Y Included in

component

cost



university licenses

Localised or Internal Temp Control N ‐‐ ‐

EMC (shielding and resilience) Y Included in

component

cost

Integrated diagnostics Y Included in

component

cost

Test, Verification, Validation N

Internal Integration N

Spares Y

Repair and rework N

Quality control N

NRE development costs N


installation)

N

Simulators N

Test Equipment N

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Lightening protection Y Included in

component

cost

Environmental protection Y Included in

component

cost


costs incl:

Maintenance N

Annual power costs

50 stations

€10M As projected

from simple

power

calculation

Upgrades N

Labour N

Table 33 Cost Coverage of Station Processing for SKA‐1

15 Non Imaging Processing


costing. The costs presented are from the concept description for Pulsar Search [16]. It is assumed

that Pulsar Survey costs dominate the Non‐Imaging costs in comparison with Pulsar Timing.

Another GPU based Non Imaging processing description [15] includes costing information for

equipment components but this has not been projected to an SKA implementation and as such is

not presented in this issue of the costing document.

Using the baseline system description of Memo 125 and Memo 130, the cost estimates below are

for an SKA‐1 with 50 stations each containing 11200 antennas and producing 480 beams.

Assumptions made for the processing assume only the central 1km core is used (rather than the 5km

diameter core assumed in the Central Beamformer Concept). The concept functionality includes:

polyphase filter bank into 16 subbands,

FFT on 256k vectors,

coherent beamforming

coherent dedispersion,

inverse FFT,

computation of Stokes SI parameter (total power),

WP2‐040.030.020‐TD‐001 Revision : 1

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folding into phase bins,

pulsar detection.

Station

Beamformer


base year

value 2007

SKA1

Server Case 2048 €300 €0.6M €0.5M

Power Supply 1500W 2048 €300 €0.6M €0.5M

Hard Disk 3 TB 8192 €180 €1.5M €1.3M

Main Board 2048 €400 €0.8M €0.7M

Multicore CPU 4096 €1,400 €5.7M €4.9M

Main Memory 12 G Byte 6144 €180 €1.1M €0.9M

Dual GPU Card Water

Cooled

4096 €800 €3.3M €2.8M

Water Cooling Accessories 1024 €300 €0.3M €0.3M

FPGA 2048 €2,100 €4.3M €3.7M

CFX Memory 2 G Byte

SODIMM

8192 €25 €0.2M €4.2M

CFX:Optical Transcievers 8192 €150 €1.2M €1.0M

CFX‐Board 2048 €200 €0.4M €0.3M

PD:ASIC 16,384 €300 €4.9M €4.2M

PD: Memory 4GByte

SODIMM

65,538 €40 €2.6M €2.2M

PD Optical Transcievers 16,384 €150 €2.5M €2.2M

PD‐Board 8192 €300 €2.5M €2.2M

Total €28M

Table 34 Component cost breakdown of single station processing

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The procurement model for the Non‐Imaging processing is a hybrid between standard Off‐the‐Shelf

Components, COTS and custom hardware. Whilst making for a relatively complex supply chain, this

provides the cheapest (in terms of power and cost) solution.

15.2 Cost Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

Reference to

Substantiating

Evidence

Notes

Subsystem Hardware Costs incl of:

Component Cost Y €28M Based on

projecting

manufacturer’

s current

figures to

2015

Estimates for servers,

GPUs, FPGAs

ASIC cost professional

opinion



provides most but not

all of the internal

M&C.


Included in

component

cost

Manufacturer’

s data sheets

PSUs integral to

servers


whether open source

or supported


Included in

component

cost

Manufacturer’

s data sheets

Built into COTS

equipment or

included as in

component costs

EMC (shielding and resilience) NA ‐ Manufacturer’

s data sheets

Correlator room

provides shielding.

Servers FCC compliant

WP2‐040.030.020‐TD‐001 Revision : 1

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Included in

component

cost

Manufacturer’

s data sheets

Diagnostics for

servers, switches, HCA

& NICs inbuilt.

However this may not

be sufficient




sufficiently developed

to calculate this



to calculate this




installation)

N ‐ Installation costs not

yet considered

Simulators N ‐


Lightening protection N/A ‐ ‐ Lightning protection

provided by the

Central Processing

facility


room provides

required environment


costs incl:


Annual power costs Y €2.3M pa Based on

current

figures to

2015 is likely

to improve by

2015

Assumes equipment

running 100% of the



WP2‐040.030.020‐TD‐001 Revision : 1

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16 PAF Beamforming


costing. At the concept stage it is too early to provide costs on most of these items Software

Correlator

The cost of a PAF beamformer is sensitive to the cost of digital signal processing and data transport.

Both of these decrease with time. The more expensive design is that for the earlier generation SKA.

The design for Phase 1 transports RF data from the PAF on optical fibre, which limits the bandwidth

to at most one octave and at least two of these bands are needed to cover the total bandwidth of

the PAF. The optical RF data is demodulated, digitised and passed through a filterbank in units that

process 20 optical links each. Ribbon cable multimode optical links then send this data to the

beamformer. Optical links to the correlator have not been included in this cost. It is assumed that

the beamformer use FPGAs that are available in 2017. To a first approximation the cost of this

beamformer scales linearly with the number of PAF elements (Note a dual polarisation feed

comprises of two elements). Hence if it is decided to use a PAF with say 120 elements then the cost

is reduced to about €8M (2011 Euros)

For SKA Phase 2 it is assumed that 2011/12 FPGAs will be used and that the AIP have developed low

power ADCs/optical links that can be installed in the PAF assemble. This data is transported to a

single processing board that implements filterbanks and beamforming.

PAF

Beamformer


base year

value 2007

SKA1 PAF

250 dishes

200

elements

RF over Fibre TX and RX 250

x200

€70 €3.5M € 3.0M

ADC Coarse filterbank

20 channel

250x10 €1.4k €3.5M €3.0M

ADC/filterbank

beamformer optical link

250 €2.8k €0.7M €0.6M

Beamformer 250 €13k €3.3M €2.8M

Power supplies, card cages

etc

250 €8k €2M €1.7M

Total €11M

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Table 35 PAF Beamformer cost estimates SKA 112

PAF

Beamformer


base year

value 2007

SKA2 PAF

2000 dishes

200

elements

ADC subsystem 2000 €3.3k €6.6M € 5.7M

Optical link

ADC ‐ beamformer

2000 €2.2k €4.4M €3.7M

Filterbank/beamformer 2000 €5.6k €11.2M €9.6M

Power supplies, card cages

etc

2000 €1.4k €2.8M €2.4M

Total

€25M

€21M

Table 36 PAF Beamformer cost estimates SKA2


The PAF beamformer is mostly bespoke design including the processing circuit boards and Rear Transition Modules for optical interconnect. The use of the ATCA standard simplifies the effort required for card design as common outlines are used. The mechanical aspects of the implementation including shelf, cabinet and air cooling largely fit the COTS procurement profile.

16.2 Cost Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

Reference to

Substantiating

Evidence

Notes

Subsystem Hardware Costs SKA2 for

2000 dishes

Y €11M SKA1 Read across

from ASKAP

PAFs aren’t currently

part of Phase 1

The number of dishes

fitted with PAFS is an

€21M SKA2

12 This assumes PAFs will be used at SKA1 which is not in the base-line but is none the less useful. information

WP2‐040.030.020‐TD‐001 Revision : 1

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assumption


Internal M&C Y €0

Included in

component

cost

‐ M&C components and

network included

based on ASKAP

capability

Internal Power N SKA2 ‐ ‐


whether open source

or supported


component

cost

(heatsinks) or

Concept assumes

ATCA rack including

fans.

PAF Beamforming

likely to be at dishes

EMC (shielding and resilience) N ‐ Manufacturer’

s data sheets

Beamformer

equipment housing

provides shielding.

Cards to be

environmentally

tested to FCC EMC

standard


Included in

component

cost

Read across

from ASKAP

PAF

beamformer

technology





to calculate this



to calculate this

WP2‐040.030.020‐TD‐001 Revision : 1

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installation)

N ‐ ‐ Installation costs not

yet considered




provided by the

Central Processing

facility


room provides

required environment


costs incl:


Annual power costs N ‐

‐

N



Figure 1 FPGA Pulsar Processing Cost Estimates

17 Pulsar Signal Processing on UNIBOARD

The costing presented in this section is for the phase 1 UNIBOARD pulsar processing concept which

has been extracted from the concept descriptions WP2‐040.170.010‐TD‐001 [17]. SKA Memo 130

has been taken as its base line for the phase 1 functionality.

The FPGA pulsar processing concept[9] concludes one current UNIBOARD can process one beam for

any of the receptor technologies up to frequencies of 3GHz.

The number of beams is assumed to be 4000 in line with Pulsar survey with SKA phase 1 [4]. This is a

different assumption than currently used by the other concepts. The development of the system and

signal processing element requirements will provide convergence for the concepts in the

development phase.

The items considered for component costs for pulsar timing are detailed in the tables below

WP2‐040.030.020‐TD‐001 Revision : 1

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base year

value 2007

SKA1 Pulsar

Timing

Uniboard 25 €10k €0.25M €0.22M

SKA1 Pulsar

Survey

4000

beams

Uniboard 4000 €10k €40M €34M

Total €34M

Table 37 Uniboard Pulsar timing component costs



processing loads.

The quantities detailed in Table 20 have taken the 2009 Uniboard costs and assumed the same cost

in 2015. This is due to the performance limitation of memory performance rather than processing

capability.



The Uniboard pulsar processing is a bespoke design requiring the documentation and drawing set associated with design activities for the processing circuit boards, backplane and shelf metalwork.

WP2‐040.030.020‐TD‐001 Revision : 1

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17.2 Cost Estimates


Component

included

Yes/ No / NA

Cost

Estimate

Base Year

Value 2007

Reference to

Substantiating

Evidence

Notes

Component Cost pulsar timing Y €0.22M Read across

from current

Uniboard

projects


SKA1

Component cost pulsar survey Y €34M Doesn’t include

acceleration

processing


Internal M&C Y €0

Included in

component

cost

‐



whether open

source or supported


local cooling.

Concept assumes


ambient air is a

service provided by

the correlator room.

EMC (shielding and resilience) N ‐ ‐ Correlator room

provides shielding.

Cards to be

environmentally

tested to FCC EMC

standard

WP2‐040.030.020‐TD‐001 Revision : 1

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Included in

component

cost

Read across

from existing

Uniboard design




sufficiently

developed to

calculate this


sufficiently

developed to

calculate this




installation)


not yet considered




provided by the

Central Processing

facility


room provides

required

environment


costs incl:


Annual power costs Y €8k pulsar

timing

€1.4M

pulsar

Projection from

current

Uniboard

projects

Assumes equipment

running 100% of the


Does not include

WP2‐040.030.020‐TD‐001 Revision : 1

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survey

acceleration

processing

Does not Include

power supply

efficiency and

cooling

N Pulsar

survey



Table 38 Cost coverage UNIBOARD Pulsar processing for SKA1

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