SimPL: An Effective Placement Algorithm Myung-Chul Kim, Dong-Jin Lee and Igor L. Markov Dept. of...
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Transcript of SimPL: An Effective Placement Algorithm Myung-Chul Kim, Dong-Jin Lee and Igor L. Markov Dept. of...
ICCAD 2010, Myung-Chul Kim, University of Michigan
SimPL: An Effective Placement Algorithm
Myung-Chul Kim, Dong-Jin Leeand Igor L. MarkovDept. of EECS, University of Michigan
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ICCAD 2010, Myung-Chul Kim, University of Michigan
Global Placement: Motivation
■Interconnect lagging in performance while transistors continue scaling
− Circuit delay, power dissipation and areadominated by interconnect
− Routing quality highly controlled by placement
■Circuit size and complexity rapidly increasing− Scalable placement algorithm is critical− Simplicity, integration with other optimizations
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Unloaded
Coupling
IR drop
RC delay
ICCAD 2010, Myung-Chul Kim, University of Michigan
Placement Formulation
■Objective: Minimize estimated wirelength (half-perimeter wirelength)
■Subject to constraints:− Legality: Row-based
placement with no overlaps− Routability: Limiting
local interconnect congestion for successful routing
− Timing: Meeting performancetarget of a design
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Prior Work
■ Ideal Placer
− Fast runtime without sacrificing solution quality
− Simplicity, integration with other optimization
4ICCAD 2010, Myung-Chul Kim, University of Michigan
Sp
eed
Solution Quality
Non-convex optimization
mFAR, Kraftwerk2, FastPlace3
Ideal placer
mPL6, APlace2, NTUPlace3
Quadratic and force-directed
Key features of SimPL
■Flat quadratic placement■Primal dual optimization
− Closing the gap between upper and lower bounds
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Final Solution
Lower-Bound Solutionby Linear System Solver
Wir
elen
gth
Iteration
Final Legal Solution
Upper-Bound Solution by Look-ahead Legalization
Initial WL Opt.
ICCAD 2010, Myung-Chul Kim, University of Michigan
Common Analytical Placement Flow
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Placement Instance
Converge
yes
no
GlobalPlacement
Initial WLOptimization
Legalizationand Detailed Placement
SimPL Flow
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We delegate final legalization and detailed placement to FastPlace-DP [M. Pan, et al, “An Efficient and Effective Detailed Placement Algorithm”, ICCAD2005]
Placement Instance
Legalizationand Detailed Placement
B2B net model[P. Spindler, et al, “Kraftwerk2 - A Fast Force-Directed Quadratic Placement Approach Using an Accurate Net Model,” TCAD 2008]
yesno
Pseudonet Insertion
Look-aheadLegalization
(Upper-Bound)
B2B GraphBuilding
Linear System Solver (Lower-Bound)
ConvergeGlobal
Placement
B2B GraphBuilding
Linear System Solver
WLConverge
yes
noInitial WLOptimization
SimPL: Look-ahead Legalization
■Purpose: Produces almost-legal placement (Upper-Bound)
while preserving the relative cell ordering given by linear system solver (Lower-Bound)
■Identify target region − Find overflow bin b− Create a minimal wide enough bin cluster B around b
■Perform geometric top-down partitioning − Find cell area median (Cc) and whitespace median (CB)
− Assign cells (Cc) to corresponding partitions (CB)
■Non-linear scaling− Form stripe regions− Move cells across stripe regions in-order based on whitespace
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ICCAD 2010, Myung-Chul Kim, University of Michigan
SimPL: Look-ahead Legalization (1)
Performing geometric top-down partitioning
Overfilled binCell-area median (Cc)
B0 B1
whitespacemedian (CB)
Bin cluster (B)
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ICCAD 2010, Myung-Chul Kim, University of Michigan
SimPL: Look-ahead Legalization (2)
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Cell-area median (Cc)
whitespacemedian (CB)
B0
ICCAD 2010, Myung-Chul Kim, University of Michigan
SimPL: Look-ahead Legalization (2)
CB
Obstacle
borders
Uniform cutlines
CellOrdering
Per-stripeLinear Scaling
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4
37
58
1
CB
26
4
37
58
1
CB
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SimPL: Look-ahead Legalization (3)
■Example (adaptec1)
Look-ahead legalization stops when target regions become small enough
ICCAD 2010, Myung-Chul Kim, University of Michigan
SimPL: Using legal locations as anchors
■Purpose: Gradually perturb the linear system to generate
lower-bound solutions with less overlap
■Anchors and Pseudonets− Look-ahead locations used
as fixed, zero-area anchors − Anchors and original cells
connected with 2-pin pseudonets− Pseudonet weights grow
linearly with iterations
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ICCAD 2010, Myung-Chul Kim, University of Michigan
Next illustration: Tug-of-war between low-wirelength and
legalized placements
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SimPL Iterations on Adaptec1 (1)Iteration=0 (Init WL Opt.) Iteration=1 (Upper Bound)
Iteration=2 (Lower Bound) Iteration=3 (Upper Bound)
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SimPL Iterations on Adaptec1 (2)Iteration=11 (Upper Bound)
Iteration=20 (Lower Bound) Iteration=21 (Upper Bound)
Iteration=11 (Upper Bound)
Iteration=20 (Lower Bound) Iteration=21 (Upper Bound)
Iteration=10 (Lower Bound)
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SimPL Iterations on Adaptec1 (3)
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Iteration=31 (Upper Bound)Iteration=30 (Lower Bound)
Iteration=40 (Lower Bound) Iteration=41 (Upper Bound)
ICCAD 2010, Myung-Chul Kim, University of Michigan
Convergence of SimPL
■ Legal solution is formed between two bounds
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ICCAD 2010, Myung-Chul Kim, University of Michigan
Empirical Results: ISPD05 Benchmarks
■Experimental setup− Single threaded runs on a 3.2GHz Intel core i7
Quad CPU Q660 Linux workstation− HPWL is computed by GSRC Bookshelf Evaluator− < 5000 lines of code in C++, including
CG-based solver for sparse linear systems with Jacobi preconditioner
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Improvements after ICCAD submission
Empirical Results: Scalability Study
■Take an existing design (ISPD 2005) and split each movable cell into two cells of smaller size
− Each connection to the original cell is inherited byone of two split cells, which are connected by a 2-pin net
Not in ICCAD paper
ICCAD 2010, Myung-Chul Kim, University of Michigan
Parallelism in Conjugate Gradient Solver
■Runtime bottleneck in SimPL: Conjugate gradient linear system solver
■Coarse-grain row partitioning− Implemented using OpenMP3.0 compiler intrinsic■SSE2 (Streaming SIMD Extensions) instructions
− Process 4 multiple data with a single instruction− Marginal runtime improvement in SpMxV■Reducing memory bandwidth demand of SpMxV
− CSR (Compressed Sparse Row) format Y. Saad, “Iterative Methods for Sparse Linear Systems,” SIAM 2003
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ICCAD 2010, Myung-Chul Kim, University of Michigan
On-going Research
■Integration with physical synthesis− Look-ahead placement offers opportunity for early
estimation of circuit parameters–Timing look-ahead–Congestion look-ahead–Power-density look-ahead
− Improving the speed and quality of physical synthesis
■Parallel look-ahead legalization− Run independently in separate sub-regions
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ICCAD 2010, Myung-Chul Kim, University of Michigan
Conclusions
■ New flat quadratic placement algorithm: SimPL− Novel primal-dual approach − Amenable to integration with physical synthesis
■ Self-contained, compact implementation − Fastest among available academic placers − Highly competitive solution quality
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