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Sigmoid Function Approximation for ANN Implementation in FPGA
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Transcript of Sigmoid Function Approximation for ANN Implementation in FPGA
Sigmoid Function Approximation for ANNImplementation in FPGA Devices
Djalal Eddine KHODJA1 , Aissa KHELDOUN2, and Larbi REFOUFI2
(1)Faculty of Engineering Sciences, University Muhamed Boudiaf of M’silaB.P N° 116 Ichebilia (28000), Algeria, Tel/Fax: +213 35 55 18 36,
E-mail: [email protected](2) Signals & Systems Laboratory
Institute of Electronics and Electrical EngineeringBoumerdes [email protected]
Abstract - The objective of this work is the implementation of Artificial Neural Network on aFPGA board. This implementation aim is to contribute in the hardware integration solutionsin the areas such as monitoring, diagnosis, maintenance and control of power system as wellas industrial processes. Since the Simulink library provided by Xilinx, has all the blocks thatare necessary for the design of Artificial Neural Networks except a few functions such assigmoid function. In this work, an approximation of the sigmoid function in polynomial formhas been proposed. Then, the sigmoid function approximation has been implemented onFPGA using the Xilinx library. Tests results are satisfactory.
Keywords - ANN, FPGA, Xilinx, Sigmoid Function, power system..
1 IntroductionMonitoring, control and maintenance of any element ofwide area power system become an important issue forensuring the continuity of electric supply and avoidingthe black out. It is important to early detect the defectsthat can occur in these elements by monitoring theiroperations and then developing methods for applyingadaptive control and preventive maintenance [1, 2, 3].
The fast implementation of the developedmethods is necessary needs for the industry and thecomplex (smart) power systems. These methods maybe investigated using several techniques that havedifferent characteristics to solve the encounteringproblems [4, 5]
The most commonly used techniques are theartificial intelligence-based techniques such asArtificial Neural Networks (ANN) [5, 6, 7] that theyare easier to implement on electronic circuit board suchas: Digital Signal Processing (DSP) chips, ApplicationSpecific Integrated Circuits (ASICs) or Fieldprogrammable gate array (FPGAs) [8, 9, 10].The objective of this work is the implementation ofartificial neural network on a FPGA. Thisimplementation aim to contribute in hardwareintegration solutions using FPGA applied to differentareas such as monitoring, diagnosis, maintenance and
control of power systems.In this study, we begin by adapting ANN to allow
optimal implementation. This implementation mustensure efficiency, timeless and a minimum possiblespace on the FPGA. Then, we schedule the ANN onthe System Generator. The System Generator togenerate VHDL code. This code is verified andimplemented on a FPGA Spartan-like by the ISEsoftware from Xilinx Fondation.
2 ANN and simulation
To ensure efficiency, timeless and a minimum possiblespace on the FPGA, we propose a network thatcontains two hidden layers the first layer has threeneurons and the second has two neurons, and outputlayer has two neurons.
We conducted a machine learning using theMATLAB software to where we obtain a smallestsquared error (2.7401 e-015) for 202 inputs, (see Fig .1).
The design of ANN through the use Simulink isshown in the figure 2.
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2.1 Design of ANN in Simulink
2.2 Test of ANN
Once the ANN that is implemented and learningperformance has reached. Satisfactory tests areinvestigated, their results are presented in table1.
Table.1: Simulation (test) Results of ANN for differentcases.
Outputof ANN
Safety case Fault1 Fault2
S1 1.2222 e-018 1.0000 e+000 6.2836 e-016
S2 1.0000 e+000 1.6661 e-007 1.0000 e+000
From the obtained results in the testing phase, itcan be found that almost ANN in accordance (witherror E-008) with the desired predetermined outputs.
3 ANN Review and Simulation of theSystem Generator
The Simulink library provided by Xilinx, works in thesame principle as the other elements of Simulink. Itcontains blocks representing different functions that aresubjected and interconnected to form algorithms [8].These blocks do not only serve to simulation, but canalso generate VHDL or Verilog code.
In addition, the library provided by Xilinx toSimulink, has all blocks that are necessary for thedesign of ANN except a few functions such as sigmoidfunction..
For this reason, we suggested an implementation ofthe sigmoid function through the use of Taylor series[9], the resulting function (of order 5) causes an errorof 0.51% with respect to the continuous model.
In our work, the sigmoid function has beenapproximated in polynomial form as given in thefollowing :function,
cxexf
1
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(1)
Equation (1) can be rewritten as follows :
2)( axbxcxf (2)
Where the coefficients c, b, a are given by:
first:
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with:
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Input 1
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Figure 2 ANN using Simulink library
Figure 1 Evolution of average quadratic error of ANN
Layer 1 Layer 2 outputsInputs
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Outputs layer
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1Out1sysgen[a:b]
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Modeling the resulting function is given by Xilinx asshown in Fig.3:
Figure 3 modelling of sigmoid function .
Figure.4 shows that the sigmoid function curveobtained by Simulink is in accordance with the curveof sigmoid function obtained by Xilinx. The design ofANN using Simulink is shown in Figure.5
According to the construction of ANN in theSimulink/Xilinx the system generator can also generatethe VHDL code.
4 Implementation of ANN in FPGA
We place the entire contents of the block of ANN inthe same subsystem, with a single generator system,then, it generates the VHDL code (see figure.6).This part is devoted to description of theimplementation of ANN on FPGA. In order, to do this,we use the Xilinx System Genrator.Synthesizer: you click on Synthesizer to find spaceresources occupied by the VHDL (see figure.7)
The result is displayed in the Synthesizer as given intable.2.From the obtained results shown in the table, we noticethat the VHDL code occupies an area of 208% onFPGA, means that the FPGA typeSpartan2 xc2s200e-6tq does not support this VHDLcode.However, the implementation of the code obtained in asystem Spartan3 gives the results shown in table 3.From this table, we found that the code implemented
in Spartan3 takes only 63% of storage space of FPGA.
5 Conclusion
In this work, we proposed a simple algorithm for theimplementation of the ANN. The proposed hardwaresynthesis algorithm is performed by the SystemGenerator. Routing and implementation in FPGA typeSpartan2E was made by ISE Foundation.
The use of high-level design tool, System Generatoris very beneficial for the verification of the behaviourof the algorithm in Simulink. The simulations for thesigmoid function show that the obtained results usingXilinx give the same performance as the sigmoidfunction obtained by Simulink.
Furthermore, the implementation of the obtainedcode using two different systems Spartan2 andSpartan3 leads to the conclusion that the FPGA typeSpartan3 supported the generated VHDL code givesadequate results.
Finally, one can conclude that the implementationof functions in FPGAs is easier because now VHDLcode of any circuit can be generated not only by anadvanced language but also by the software MATLAB.This gives us the ability to simulate any function insimulink, using the library of Xilinx after that the latteris directly converted into VHDL by System Generator.
0 200 400 600 800 1000 12000
0.1
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simulinkxilinx
Figure 4 Comparaison of Sigmoid functions of Simulink
and Xilinx
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Table.2 : Space used on FPGA Fig.5 programming ANN using SIMULINK
Fig.7 Space occupied by the implementation.
References
[1] G.Zwinngelsten, « Diagnostic des défaillances:théorie et pratique pour les systèmesindustriels », Ed. Hermès Paris. 1995.
[2] B.Dubuisson ; « Détection et diagnostic despannes sur processus », Technique del’ingénieur. R7597,1992.
[3] B.Chetate, DJ.Khodja, « Diagnostic en tempsréel des défaillances d’un ensemble Moteurasynchrone-convertisseur électronique enutilisant les réseaux de neurones artificiels»,Journal Electrotekhnika, Moscou 12/2003,pp:16-20
Layer1 Layer2 OutputInputs
y{1}
Layer of outputs
neuron1
neuron1
neuron1
neuron2
neuron2 neuron2
neuron3
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In1
In2
In3
Out1
In1
In2
In3
Out1
In1
In2
In3
Out1
In1
In2
In3
Out1
In1
In2Out1
In1
In2
In3
Out1
Input 1
E3
Input 1
E2
Input 1
E1
Table.3: Summary of used space on the FPGA.
Figure 6 System Generator interface.
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ISBN: 978-960-474-262-2 115
[4] DJ.Khodja, B.Chetate, «ANN system foridentification and localisation of faillures ofanatomawed electric asynchronous drive», 2nd
International Symposium on Electrical,Electronic and Computer engineering enExhibition, March, 11-13, NEU-CEE 2004,NICOSIA, TRNC pp : 156-161.
[5] DJ.Khodja, B.Chetate, «Development of NeuralNetwork module for fault identification inAsynchronous machine using various types ofreference signals», 2nd International ConferencePHYSICS and CONTROL, August,24-26,Physcon 2005, St Ptersburg, Russia, 2005,. pp :537-542.
[6] V.A.Tolovka. « Réseaux de neurones :Apprentissage, Organisation et Utilisation », Ed,Entreprise de rédaction de journal‘Radiotekhnika’ Moscou, 2001.
[7] N. Moubayed, "Detection et Localisation DesDéfauts Dans Les Convertisseurs Statiques",6TH International Conference onElectromechanical and Power Systems,Chişinău, Rep. Moldova, October, 2007.
[8] K. Roy-Neogi and C. Sechen, "Multiple FPGAPartitioning with Performance Optimization",IEEE Computer Society, Proceedings of theThird International ACM Symposium on Field-Programmable Gate Arrays (FPGA’95), 1995.
[9] K. Renovell, P. Faure, J.M. Portal, J. Figuerasand Y. Zorian, "IS-FPGA: A New SymmetricFPGA Architecture With Implicit SCAN", IEEEITC International Test Conference, Paper 33.1,0-7803-7169-0/2001.
[10] Areibi, G. Grewal, D. Banerji and P. Du"Hierarchical FPGA Placement", CAN. J.ELECT. COMPUT. ENG., VOL. 32, NO. 1,Winter 2007.
Table 3 Summary of used space on the FPGA
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