Abstract The application of active power conditioners to

tackle power quality problems has become a matured subject. This paper is based on a unified approach for load and source compensation using Unified Power Quality Conditioner (UPQC). Performance of this UPQC has been evaluated with a typical industrial load with realistic parameters supplied by a polluted distribution network. The system performance for current harmonics, voltage harmonics, voltage sag and voltage swell has been evaluated. The MATLAB / Simulink based simulations are provided which support the functionality of the UPQC.

Index Terms-- Power Quality, UPQC, Harmonics, Reactive Power, Voltage Sag, Voltage Swell, SPS MATLAB / SIMULINK.

I. INTRODUCTION ECAUSE of the application of sophisticated and more advanced software and hardware for the control systems

the power quality has become one of the most important issues for power electronic engineers. With great advancement in all areas of engineering, particularly, in signal processing, control systems, and power electronics, the load characteristics have changed completely. In addition to this, loads are becoming very sensitive to voltage supplied to them. The loads based on power electronic devices generally pollute the nearby network by drawing non sinusoidal currents from the source. The rapid switching of electronic devices creates additional problems. This makes voltages and currents at point of common coupling (PCC) highly distorted.

One of the best solutions to compensate both current and voltage related problems, simultaneously, is the use of Unified Power Quality Conditioner (UPQC) [1-11]. A UPQC can be installed to protect the sensitive load inside the plant as well as to restrict entry of any distortion from load side. This dual functionality makes the UPQC as one of the most suitable devices that could solve the problems of both consumers as well as of utility. UPQC thus can help to improve voltage profile and hence the overall health of power distribution system. The application of UPQC to compensate reactive power, current harmonics and voltage harmonics are some of The authors would like to thank Natural Sciences and Engineering Research Council of Canada (NSERC) and IREQ / Hydro-Qubec for providing financial support for this research work.

1 V. Khadkikar and A. Chandra are with Dpartement de gnie lectrique, cole de Technologie Suprieure, Montral, Canada.

2 A. O. Barry is with Laboratoire de simulation de Rseaux, IREQ, Varenne, Qubec, Canada.

3 T. D. Nguyen is with Secteur Industriel et qualit du service lectrique, Hydro Qubec, Montral, Canada.

the functions suggested [1][7]. Recently more attention is being paid on mitigation of voltage sags, voltage swells and unbalance compensation by using UPQC [7][11].

This article is focused on voltage sag and swells along with current and voltage harmonics compensation. A complex network is considered with realistic parameters. The UPQC is installed to protect a sensitive load form any disturbances from the source side.

The network under consideration and plant load are discussed in section II. The control algorithm for UPQC is discussed in section III. The SIMPOWERSYSTEM (SPS) Matlab / Simulink based simulation results are discussed in section IV and finally section V concludes the paper.

II. SYSTEM UNDER CONSIDERATION

Fig. 1 shows a single line diagram of an industrial distribution network. The voltage is generated at 120 kV, transmitted and then stepped down at different voltage levels based on individual premises requirements. The UPQC is supposed to be installed at a plant which is located at a considerable distance from the distribution transformer and there are some loads present in between, represented by equivalent MW or MVA. The voltage which is available at the input bus bar B3 of the plant is at 12.7 kV. This voltage is stepped down at 600 V by using step down transformer T4. A point of connection is the point at which UPQC is connected to the distribution network. The UPQC is installed between bus B4, i.e. point of connection and load bus B5.

This plant consists of a typical load shown in Fig.2; which is a combination of two AC motors (L1 & L2), two diode bridge rectifiers (DBR) (L3 & L4) and a pure resistive load. Considering the resistive load L5 as a sensitive load to be protected from any disturbances. On the other hand two DBR loads L3 and L4 are harmonics producing loads. The harmonics generated by them should not reach at point of connection. The ratings of all the loads are as given below:

L1: AC Motor - 50 HP, 1775 RPM, Tm = 125 N.m L2: AC Motor - 50 HP, 1775 RPM, Tm = 75 N.m L3: Diode Bridge Rectifier - 40 kVA L4: Diode Bridge Rectifier - 25 kVA L5: Resistive Load -25 kW The UPQC is installed in order to isolate all the loads within

the plant from any disturbance from the source side. In addition to this UPQC is acting as a harmonic isolator, preventing any current harmonics going towards point of connection from the plant side. Fig.3 shows the basic block diagram of the UPQC,

V. Khadkikar1, Student Member, IEEE A. Chandra1, Senior Member, IEEE, A. O. Barry2 and T. D. Nguyen3E-mail : v_khadkikar@yahoo.com, chandra@ele.etsmtl.ca

Application of UPQC to Protect a Sensitive Load on a Polluted Distribution Network

B

1-4244-0493-2/06/$20.00 2006 IEEE.

Series APF Shunt APF UPQC

injv

s hi

Li

Bus - B4 LoadBus B5

4Bi

4Bv Lv

dcv

Point of Connection

realized by using two voltage source inverters. One acting as a shunt active power filter (APF), while the other as series APF. Both the APFs share a common dc link in between them. Each inverter is realized by using six IGBT switches. The voltage at bus B4 before UPQC, the load voltage at load bus B5, voltage injected by series APF and the dc link voltage between two inverters are represented by 4Bv , Lv , injv and

dcv respectively. Whereas, the current at bus B4, total load current drawn by all the loads and the current injected by shunt APF are represented by 4Bi , Li and shi respectively. Aim is to maintain the voltage at bus B5 at desired constant level and

Feeder No. Feeder Length Parameter Value

(1) and (2)

8 km each

Parallel Feeder 5 km

Positive Sequence Impedance

Zero Sequence Impedance

R1 = 0.1153 ( ohm/km ) L1 = 1.048 ( ohm/km ) R0 = 0.3963 ( ohm/km) L0 = 2.73 ( ohm/km )

free from any distortions. Also the harmonics and reactive current drawn should be compensated such that the current at bus B4, 4Bi , would be pure sinusoidal. The feeder parameters and transformer specifications are given in Table I and II. All voltages are mentioned on the basis of line to line values.

III. CONTROL STRATEGY FOR UPQC

The control strategy is basically the way to generate reference signals for both shunt and series APFs of UPQC. The compensation effectiveness of the UPQC depends on its ability to follow with a minimum error and time delay to calculate the reference signals to compensate the distortions, unbalanced voltages or currents or any other undesirable condition. In the following section an approach based on Unit Vector Templates Generation (UVTG) is explained to extract the reference voltage and current signals for series and shunt APFs, respectively.

Fig. 1. Typical Industrial Distribution Network

Bus No Voltage Level Bus 1 120 kV Bus 2 12.7 kV Bus 3 12.7 kV Bus 4 600 V Bus 5 600 V

M M

L1 L2 L3 L4 L5

Load Bus B5

1Li 2Li 3Li 4Li 5Li

Fig. 2. Plant Load

Fig. 3. UPQC Block Diagram

Table I : Feeder Parameters

No. Rating Voltages

T 1 56 MVA 120kV / 12.7kV / 12.7kV

T2 100 MVA 120kV / 25kV

T3 104 MVA 120kV / 13kV

T4 1 MVA 12.7kV / 600V

Table II : Transformer Specifications

14 MVALOAD

75 MVALOAD

@ 0.9 pf

20 MW4 MvarLOAD

3 MWLOAD

4 MWLOAD

UPQC PlantLoad

Source6000 MVA SC

T1

T2

T3

T4Bus - B2

Bus - B1

PlantBus B3

Bus - B4 LoadBus B5

~ 8 km Feeder(1)

~ 8 km Feeder(2)

~ Parallel Feeder( 5 km )

PLANT

52 MVALOAD

@ 0.9 pf

Point of Connection

Reference Voltage Signal Generation

The extractions of 3 phase voltage reference signals are based on Unit Vector Template Generation. A Phase Locked Loop (PLL) is used to extract the pure sinusoidal signal at fundamental frequency. The PLL gives signal in terms of sine and cosine functions. Here only sine terms are considered. As we know the supply voltage peak amplitude in advance, we can generate the unity supply voltage signals. To get the unity terminal voltage vector UB4_abc, the terminal voltages are sensed and multiplied by a gain equal to 1/Vm. Where Vm is the peak amplitude of fundamental terminal voltage. These unity voltage vectors are then taken to PLL. Thus the output of PLL is equal to unity terminal voltage at fundamental frequency only. With proper phase angle shifting the unit vector templates for 3 phases are generated. We also know the desired load voltage level at load bus. Therefore by multiplying this peak amplitude of load voltage, VLm, with unit vector templates, gives the reference load voltage signals for series APF. The overall reference voltage signal generation for series APF is shown in Fig. 4. Reference Current Signal Generation

The unit vector templates can also be applied for shunt APF to compensate the harmonic currents generated by non-linear load. The shunt APF is used to compensate for current harmonics as well as to maintain the dc link voltage at constant level. To achieve the aforementioned task the dc link voltage is sensed and compared with the reference dc link voltage. The error is then processed by a PI controller. The output of the PI controller then will be the peak amplitude of fundamental input current, Im, which must be drawn from the supply in order to maintain dc link voltage at constant level and to supply losses associated with UPQC. This peak amplitude, Im, is then multiplied with unit vector templates giving reference current signals for shunt APF, as shown in Fig. 5. Gating Signal Generation

After extracting the reference voltage and current signals for series and shunt APF, the next step is to force the inverters to follow these reference signals. This can be done by switching the inverter IGBTs in a proper manner. To have the required gating signals, the modulation technique is used; here

the Hysteresis Band Control technique based on PWM strategy is considered for both APFs. The generated reference current signals and the voltage signals for shunt and series APF are compared with actual sensed source current and the actual sensed load voltage respectively. The Hysteresis controller gives the switching instant whenever the error exceeds the Hysteresis band.

IV. SIMULATION RESULTS

In order to verify the effectiveness of control algorithm in above discussed utility network with realistic parameters and moderately complex load situation, a MATLAB / Simulink based digital simulation is carried out. The performance of UPQC under such environment with difference conditions such as current harmonics, reactive current, voltage harmonics, voltage sag and swell compensation are tested.

The steady state currents drawn by each load is shown in the Fig. 6 (a) (f). Both Motor draw considerable reactive power from the utility, as shown in the Fig. 6 (a) and Fig. 6 (b), compared to the fundamental current component drawn by resistive load shown in Fig. 6 (e). Both the diode bridge rectifier loads are generating distorted currents. The total load current Li drawn with the combination of all the loads is shown in Fig. 6 (f). The current THD of load L3 is 26.5 %, load L4 is 27.52 %, whereas the current THD of total load current is 12.79 %. The harmonics spectrum of the total load current Li is as shown in the Fig. 8 (a). Under this normal operating condition without UPQC installed, the total load consumes 132.7 kW active power and 40 kvar reactive power. Distorted Utility Voltage The distortion in utility voltage is introduced deliberately by injecting 5th (10%), 7th (7.5), 9th (15%), 11th (5%), 13th (2.5%), 17th (1.25%) and 19th (1%) order voltage harmonics, keeping major content of triplen harmonics. The resulting highly distorted source voltage waveform is shown in the Fig. 7 (a) has THD of 28.86 %. Such a highly distorted voltage may be problematic for many sensitive loads. In addition to this the current drawn by loads with such distorted voltage would be highly distorted, as viewed from the Fig. 7 (f). Here THD of the load current Li increases from 12.79 % to 28.08 % due to the distorted voltage present at bus B4. The harmonic

SensedBus B4

Voltages

Phase LockedLoop(PLL)

Desired LoadVoltage

Magnitude

-120PhaseShift

o

+120PhaseShift

o

Sin t

( 2 / 3)Sin t

( 2 / 3)Sin t +

4 _B av4 _B bv4_B cv

4 _B aU

4 _B bU

4 _B cU

1k

V m=

aU

bU

cU

HysteresisController

*Lav

*Lbv

*Lcv

SensedLoad

Voltages

GateSignals

LmV

Lav Lbv Lcvkkk

Fig. 4. Reference Voltage Signal Generation for Series APF

HysteresisController

*Sai

*Sbi

*Sci

SensedLoad

Voltages

GateSignals

Sai Sbi Sci

aU

bU

cU

P IController

Limiter +

*dcV

dcVmI

Fig. 5. Reference Current Signal Generation for Shunt APF

spectrum of load current Li under distorted voltage is shown in the Fig. 8 (b).

Current Harmonics Compensation

To visualize the shunt APF and series APF performance

individually, both APFs are put into operation at different instant. At time t1=0.15 sec, shunt APF was put into operation first. After maintaining dc link voltage at set reference value, the shunt APF starts compensating current harmonics as well as reactive current simultaneously. The current injected by shunt APF is nothing but the sum of harmonics current and reactive current as shown in the Fig 7 (g). Before time t1 the current at bus B4 is highly distorted (28.08 %), after t1 it becomes sinusoidal and in phase with utility voltage with the use of shunt APF, as shown in the Fig. 7 (e). It is evident that shunt APF is compensating current harmonics generated by DBR loads and is also supplying the reactive power required by the Motors even under non-sinusoidal utility voltage. The THD of current 4Bi improved from 28.08 % to 4.6 %. Voltage Harmonics Compensation

At time t2=0.25 sec the series APF is put into the operation. The series APF starts compensating voltage harmonics immediately by injecting sum of the 5th,7th, 9th, 11th, 13th, 17th and 19th harmonics, making load voltage at load bus B5 distortion free, as shown in Fig. 7 (b). The voltage injected by series APF is shown in Fig. 7 (c). Here load voltage THD is improved form 28.86 % to 3.2 %. This improved voltage at bus B5 not only improves the load current THD value from 28.08 % to 12.92 % i.e. steady state value but also improves source current THD value too. Here source current THD further reduced to 2.38 %. The harmonic spectrums of load bus voltage and current at bus B4 when UPQC is ON, are shown in Fig. 8 (c) and (d), respectively.

Reactive Power Compensation

Under steady state condition without any compensation utility provides 45.26 kvars to the plant, out of which 40 kvars are consumed by plant loads. But with UPQC installed, utility is now supplying 3716 vars only; since shunt APF is handling all reactive power demanded by the load as well as by all

Fig. 7 (a)-(g) UPQC: Current and Voltage Harmonics Compensation

0

5

10

15

20

25

30

1 3 5 7 9 11 13 15 17 19 21 23 25

THD = 12.79

Load Current Harmonic Spectrum

H armonic Order

Mag

( %

of

fund

a )

0

5

10

15

20

25

30

1 3 5 7 9 11 13 15 17 19 21 23 25

THD = 28.08 %

Harmonic Order

Mag

( %

of

fun

da

)

Load Current Harmonic Spectrum

0

5

10

15

20

25

30

1 3 5 7 9 11 13 15 17 19 21 23 25

THD = 3.2 %

Load Voltage Harmonic Spectrum

H armonic Order

Mag

( %

of

fun

da )

0

5

10

15

20

25

30

1 3 5 7 9 11 13 15 17 19 21 23 25

THD = 2.38 %

Bus B4 Current Harmonic Spectrum

Harmonic Order

Mag

( %

of f

unda

)

a) Load Current under steady state without any Compensation

b) Load Current with Voltage Harmonics without any compensation

c) Load Voltage after UPQC On d) B4 Current after UPQC ON

Fig. 8 (a)-(d) % Harmonic Contents

Fig. 6 (a)-(f) Steady State Current drawn by each Load

transformers and coupling inductances. The shunt APF provides 41.94 kvars, thus eliminating the reactive power burden of the utility. Voltage Sag Compensation

To analyse the performance of UPQC during voltage sag and swell conditions, the voltage at bus B4 is assumed to be pure sinusoidal. The simulation results for voltage sag compensation are shown in the Fig. 9. There are four instants; t1, t2, t3 and t4. At time t1=0.15 sec, the shunt APF is put into the operation and its operation is as discussed previously. At time t2=0.2 sec, series APF is put into operation. Now a sag (25%) is introduced on the system at time t3=0.25 sec. This sag lasted till time t4=0.35 sec, as shown in the Fig. 9 (a). After time t4=0.35 sec, the system is again at normal working condition. During this voltage sag condition, the series APF is providing the required voltage by injecting in phase compensating voltage (25%) equals to the difference between the reference load voltage and voltage at bus B4, as shown in the Fig. 9 (c). The load voltage profile in the Fig. 9 (b) shows that UPQC is maintaining it at desired constant voltage level at load bus B5 even during the sag on the system such that the plant loads can not see any voltage variation.

While series APF is providing the required real power to the

load, the shunt APF is maintaining the dc link voltage at constant level such that the series APF can provide the needed real power to the load. To achieve the aforementioned task the

source delivered more current. This increased current profile can be noticed from Fig. 9 (e). In other words, the required load power is provided by the source only, by delivering more current. This extra power flows from source to shunt APF, shunt APF to series APF via dc link and from series APF to the load, but without any delay in the operation. Fig. 9 (d) shows there is slightly reduction in dc link voltage, whereas the load current profile in Fig. 9 (f) shows that there is no effect of voltage sag on the loads since this current is always in steady state even during voltage sag on the plant. Voltage Swell Compensation

A swell (25%) is now introduced on the system during the time t3=0.25 sec to t4=0.35 sec, as shown in the Fig. 10. Under this condition the series APF injects an out of phase compensating voltage (25%) in the line through series transformers, equal to the difference between the reference load voltage and voltage at bus B4, as shown in the Fig. 10 (c). The load voltage profile in the Fig. 10 (b) shows the UPQC is effectively maintaining the load bus voltage at desired constant level. The UPQC controller acts in such a way that source delivers the reduced current, as shown in Fig. 10 (e). In other words the extra power due to the voltage swell condition is fed back to the source by taking reduced fundamental source current. The shunt APF maintains the dc link voltage at almost constant level, slightly increases due to the swell on the system as shown in Fig. 10 (d).

Fig. 9 (a)-(g) UPQC: Voltage Sag Compensation

Fig. 10 (a)-(g) UPQC: Voltage Swell Compensation

Sudden Change of Load In order to evaluate the performance of UPQC during transient condition, the load on the system changed suddenly. The simulation results during this condition are shown in the Fig. 11. Before time t1=0.3 sec, only two motors are ON. Both shunt and series APFs are working under this condition. Shunt APF provides the reactive power demanded by both the motors by injecting a 900 leading current as shown in the Fig. 11 (d). Now at time t1=0.3 sec both DBR loads are connected to the load bus suddenly. This results in increased and distorted load current as shown in Fig. 11 (b). During this transient condition UPQC controller acts immediately without any delay in the operation and gain the new steady state. The shunt APF now injects a current equals to sum of harmonic and reactive current. Now at time t2=0.4 sec both the DBR loads turned OFF. Even during this condition UPQC adapts new steady state immediately.

V. CONCLUSION The performance of UPQC in a complex distribution network with realistic parameter has been evaluated. A Matlab / Simulink based simulation is carried out in order to verify its performance based on Unit Vector Template Generation control. The simulation results for current harmonics compensation, voltage harmonics compensation, voltage sag & swell compensations and during transient condition are given. These simulation results show the controller is operating effectively giving improved results. The current THD is reduced from 12.06 % to 2.38 % and the voltage THD at the load bus is reduced to 3.2 % from 28.86 %. The UPQC is maintaining the load voltage at desired level even during sags or swells on the system.

VI. REFERENCES [1] H. Akagi, New trends in active filters for improving power quality, Proceedings of the 1996 International Confe, Vol.1, Jan 1996, pp. 417 425. [2] B. Singh, K. Al-Haddad, A. Chandra, A Review of Active Power Filters for Power Quality Improvement, IEEE Trans on Industrial Electronics, Vol. 45, No.5, Oct1999, pp. 960-071. [3] Khadkikar V, Agarwal P, Chandra A, Barry A O and Nguyen T.D, A simple new control technique for unified power quality conditioner (UPQC),

Harmonics and Quality of Power, 2004. 11th International Conference on 12-15 Sept. 2004, pp. 289 293. [4] A. Chandra, B. Singh, B.N. Singh, K. Al-Haddad, An Improved Control Algorithm of Shunt Active Filter for Voltage Regulation, Harmonic Elimination, Power Factor Correction, and Balancing of Nonlinear Loads, IEEE Trans on Power Electronics, Vol. 15, No. 3, May 2000, pp.495-507. [5] Yunping Chen; Xiaoming Zha; Jin Wang; Huijin Liu; Jianjun Sun; Honghai Tang, Unified Power Quality Conditioner (UPQC): the theory, modeling and application. Power System Technology, 2000. Proceedings. Volume: 3, 4-7 Dec. 2000. Page(s): 1329 -1333. [6] Muthu, S.; Kim, J.M.S, Steady-state operating characteristics of unified active power filters. Applied Power Electronics Conference and Exposition, 1997. APEC '97 Conference Proceedings 1997, Twelfth Annual, Volume: 1, 23-27 Feb 1997, pp. 199 -205. [7] Li R.; Johns A T. and Elkateb M.M., Control concept of Unified Power Line Conditioner. Power Engineering Society Winter Meeting, 2000. IEEE, Volume:4 , 23-27 Jan 2000, pp. 2594 -2599. [8] Elnady A and Salama M.M.A., New functionalities of the unified power quality conditioner. Transmission and Distribution Conference and Exposition, 2001 IEEE/PES, Volume: 1, 28 Oct.-2 Nov 2001, pp. 415 -420. [9] Basu M, Das S.P. and Dubey G.K., Performance study of UPQC-Q for load compensation and voltage sag mitigation. IECON 02, IEEE, Volume: 1, 5-8 Nov 2002, pp. 698 -703. [10] Guozhu Chen, Yang Chen, Sanchez L.F., Smedle, K.M,. A unified voltage quality conditioner without reference calculation, Power Electronics Specialists Conference, 2004. PESC 04. Volume 6, 20-25 June 2004 Page(s):4251 4256. [11] Ghosh A, Jindal A.K. and Joshi A., A unified power quality conditioner for voltage regulation of critical load bus, Power Engineering Society General Meeting, 2004. IEEE 6-10 June 2004, pp. 471 476.

VII. BIOGRAPHIES Vinod Khadkikar was born at Aurangabad (MH, INDIA) in 1978. He received his Bachelor of Engineering and Master of Technology degrees in Electrical Engineering from Dr. B.A.M University, Aurangabad and IIT Delhi in 2000 and 2002, respectively. Presently he is pursuing his Ph. D. in the Department of Electrical Engineering, cole de Technologie Suprieure, Montral, CANADA. His research interests are Application of Power Electronics in Distribution Systems, Power Quality Analysis, Active Power Filters, etc. Ambrish Chandra (SM99) was born in India in 1955. He received B.E. degree from the University of Roorkee, India, M. Tech. degree form I.I.T., New Delhi, India, and Ph.D. degree from University of Calgary, Canada, in 1977, 1980, and 1987, respectively. He worked as a Lecturer and later as a Reader at University of Roorkee. Since 1994 he is working as a Professor in Electrical Engineering Department at cole de technologie suprieure, Universi du Qubec, Montreal, Canada. His main research interests are power quality, active filters, static reactive power compensation, and flexible AC transmission systems (FACTS). Dr. Chandra is a senior member of IEEE and member of the Ordre des Ingnieurs du Qubec, Canada. Alpha Oumar Barry was born in Republic of Guinea in 1956. He graduated from Universit Laval, Qubec, Canada, in 1982, where he received the B. S. in Electrical Engineering and a M. S. in Power Electronics at Universit du Qubec Trois-Rivires, Qubec, Canada, in 1985. Since 1984, he is with the Institute de Recherche dHydro-Qubec (IREQ). From 1984 to 1988, he worked with the Research Group in the area of wind generation, dealing with system problems in motor control and power electronics as applied to aerogenerators. His current research area is in power system simulation including real-time digital models interfaced with analog simulator. He is member of Ordre des Ingnieurs du Qubec, Canada. T. D. Nguyen graduated from cole Polytechnique, Montral, Canada, in 1977. Since then he is working as an Engineer in Hydro Qubec, Montral, Canada. He is mainly involved in planification, exploitation, equipment and distribution network. Since 1990, he is the coordinator of R&D activities in the area of power quality. He has worked on many power quality problems of industrial clients. He is a member of Ordre des Ingnieurs du Qubec, Canada.

Fig. 11 (a)-(d) UPQC: Sudden Load Change

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