RT15 Berkeley | Introduction to FPGA Power Electronic & Electric Machine real-time simulation for...
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Transcript of RT15 Berkeley | Introduction to FPGA Power Electronic & Electric Machine real-time simulation for...
1
Alan SoltisOPAL-RT
FPGA Power Electronic & Electric Machine
real-time simulation for HIL - Introduction
2
- Turnkey HIL Simulation Solutions (~20 minutes)
- Why organizations use HIL for power electronics & machine development & testing today
- Where we are today - Where are we going?
- "Signal Level" HIL versus "Power HIL"
- Workflow improvements: From e-Machine Specialists to Controls & testing Engineers
- CPU vs. FPGA based simulation
- Using FEA to accelerate machine design as well as controls testing & validation with HIL
- eFPGASim as a development & test tool
- eHS: The flexible solution for power electronics development & test in real-time
Agenda
3
Our solutions cover the complete spectrum of power system analysis and studies
ePHASORsimReal-Time TransientStability Simulator10 ms time step
HYPERsimLarge Scale Power SystemSimulation for Utilities & Manufacturers25 µs to 100 µs time step
eFPGAsimPower Electronics Simulation on FPGA1 µs to 100 ns time step
1 s(1 Hz)
10,000
2,000
1,000
500
100
10
0
10 ms(100 Hz)
50 µs(20 KHz)
10 µs(100 KHz)
1µs(1 MHz)
100 ns(10 MHz)
10 ns(100 MHz)
20,000
Period (frequency) of transient phenomena simulated
Number of3-PhaseBuses
eMEGAsimPower System & Power Electronics SimulationBased on Matlab/Simulink and SimPowerSystems10 µs to 100 µs time step
Alan’s Subject
OPAL-RT Solutions …. again
44
The Challenge of Electric Motor & Power Electronics Control Testing
Control engineers want :
To test the motor controller with non-ideal behavior.
To test the motor controller with different points of operation, such a saturated states
To insert fault conditions
To rapidly simulate different types of motors and power electronics topologies
High-fidelity and flexible Drive & PE simulation
55
The Challenge of Electric Motor Control Testing 2
• increase test case coverage• reduce costs • accelerate time to market
By reducing testing time on real dynamometer
• How “real” can HIL get?
By detecting errors at earlier stages of the design
Faster improvement of complex control strategies
Managers want to:
Creation of a technical link between Designer
and control engineer – HIL model IS the design
6
Model-based Design (MBD) & Hardware-in-the-Loop (HIL)
Validate
Model
Off-line simulation
Virtual Prototype
HIL, RT simulation
3D visualization
Control Prototype
HIL, RT simulation,
Physical Components
Design
Implementation
Production Code
Physical Components
Lab Testing
with actual
controller
Integration & Test
In-system commiss-
ioning & calibration
Deployment
Production
Maintenance
This implementation is
performed by the
software team
This implementation is
performed by the
control team
This implementation
is performed by the
integration team
Models become the method to share
information with disparate
development teams
HIL
“AVOID REDUNDANT
MODEL DEVELOPMENT!”
7
General eFPGAsim structure
• eFPGAsim is a suite of FPGA models and solvers
• All models/solvers uses floating point format
• Designed for full connectivity of models within a fixed bitstream on Virtex-7
8
eHS: ‘Electric Hardware Solver’
• Automated Electric Circuit Solver• Variable topology, variable parameter, ‘non-flashing’
• Enable the simulation of switched electric circuits on FPGA directly from a SimPowerSystems/PLECS/PSIM model
9
• Fixed Admittance Matrix Nodal Method
• All switches in the circuit: • Modeled as a capacitor when open
• Modeled as an inductor when closed
• If L/h=h/C then the admittance matrix is constant
(For backward Euler method, h is the time step)
Automated Nodal Electric Circuit Solver
eHS: ‘Electric Hardware Solver’
10
eHS example: Matrix Converter Drive
10
- 22 switches in total in the converter- Connected to PMSM on the FPGA- Calculation time on FPGA : 590 ns on eHS-16
(estimated timing on eHS-64: 350 ns)
11
• FPGA structure based on optimized dot-product units and operation scheduler
Automated Nodal Electric Circuit Solver
eHS: ‘Electric Hardware Solver’
eHS characteristics
Virtex-6(eHS-16)
Virtex-7(eHS-64)
Inputs 16 32
Outputs 16 32
Switches 24 64
Max # eHSCore
2 2
Cycle time 150 ns - 1 µs 150 ns - 1 µs
eHS-16 configuration
12
Why FPGA simulation?
• Low sampling time and therefore excellent resolution for high frequency IGBT gating (up to 50-100 kHz)
• Excellent latency (typ. 1 µs) for direct current-control motor applications or FODP (Fast On-board Drive Protection)
• Massively parallel pre-processing unit for CPU• very good example: MMC (Multi-Level Modular Converter)
ALU cores
I/O
s
DU
T(c
on
tro
ller)Logic & mem
CPU FPGA
PCIe bus
FOB
P
13
Disadvantages of FPGA simulation
• Higher coding complexity than CPU counterparts.• User has more control over lower level abstraction levels but this
increases the complexity of the designs
• Many basic CPU coding schemes must be verbosely expressed in the FPGA design, which can be cumbersome. Ex: ‘for’ loops in matrix multiplications.
• Very long compilation time• Generating a new FPGA bitstream from FPGA code can take 1-2
hours on big FPGA chips like Virtex-6 or Virtex-7
• Increased debugging/probing difficulty
eFPGAsim is designed to avoid these problems
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HIL for ECU Testing and Validation
Virtual Plant
Machines, PE,
Peripherals
Electronic Control Unit (ECU) Under Test
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Role of FPGA in HIL Simulation
CPU
I/O
s
ECU
(co
ntr
olle
r)
Logic & mem
TARGET-PC FPGA
PCIe link
BASIC HIL SIMULATOR
Gates Signals
Probes Feedback
Feedback Latency: 1.5us
Feedback Latency: 40us
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Example: PMSM Solver on FPGA
Performance Recap:
Step Time :15-60us
Model total Latency:20-100us
Step Time :100-450ns
Model total Latency:Bellow 2.5us
FEA PMSM Solver OPAL-RT PMSM FPGA Solver
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• Plant model exported from FEA, is integrated with I/O & any peripheral plant model
components in Simulink to be compiled for real-time.
• Xilinx System Generator is a FPGA Simulink blockset
• No need to know VHDL language
• User can customize the I/O for complex applications
RT-LAB I/O is fully programmable with Xilinx System Generator
A typical XSG model in RT-LAB
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Example eFPGAsim configuration (1)
Dual-PMSM +boost (Prius configuration)• Common drive configuration used on the Prius, Ford
Fusion Hybrid and Denso supplier.
• PMSM Finite-Element Model (JMAG-RT/Infolytica)
M. Harakawa, C. Dufour, S. Nishimura, T.Nagano, “Real-Time Simulation of a PMSM Drive in Faulty Modes with Validation Against an Actual Drive System”, Proceedings of the 13th European Conference on Power Electronics and Applications (EPE-2009), Barcelona, Spain, Sept. 8-10, 2009
Validation of JMAG-PMSM model against real motor
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Example eFPGAsim configuration(2)
SRM + H-bridge buck-boost• Switched Reluctance Motors offer an alternative to highly
priced rare-earth magnets of PMSM.
• FEA data of SRM imported from JMAG (JSOL) or MotorSolve (Infolytica)
(3-phase shown)
L-1
(,iabc)
rotor
FPGA
(Virtex 6)
Digital Input
(5 ns) (IGBT
gates)
Multi-core CPU
(Intel Core i7)
Internal testmodulators
DC-DC PWM
10-100 kHz
SRM Drive
Analog
Output
(currents)
Analog
Output
(resolver)
Digital
Output
(quad enc)
I/Os &
sig. cond.
Analog Input
(resolver
excitation)
High-Level Mechanical system(modeled in Simulink and RTW)
Mas
ter
ECU
Batteryvoltage
H-bridge
Buck-Boost converter
SG User
designed I/O
ECU
un
der
tes
t
CAN
(6/4 SRM shown)
SRM Motor
SRM Flux Data
Labc
SRM controller
(hysterisis current type)
SRM Torque Data
iabc
FPGA
(Virtex 6)
C. Dufour, S. Cense, J. Bélanger, “FPGA-based Switched Reluctance Motor Drive and DC-DC Converter Models for High-Bandwidth HIL Real-Time Simulator”, Proceedings of the 15th European Conference on Power Electronics and Applications (EPE’13 ECCE Europe), Lille, France, Sept. 3-5, 2013
SRM FEA analysis from MotorSolve
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Example eFPGAsim configuration(3)
Induction Motor Drive
• Linear induction motor
• Model with fixed DQ frame.
• Mechanical model and feeder grid circuit can be interfaced on regular CPUs of RT-LAB
C. Dufour, S. Cense, J. Bélanger, “ An Induction Machine and Power Electronic Test System on FPGA”, ELECTRIMACS 2014 conference, Valencia, Spain, May 19th -22nd, 2014.
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Offline results (SPS) On-line results (Virtex-6 on-chip)
IM-FPGA test: 6-pulse mode, 1225 rpm
Test #1PWM frequency 680 HzModulation Null
6-pulse modeMotor speed 1125 RPMSlip 0.0625
Case from: C. Dufour, S. Abourida, J. Bélanger, “Real-Time Simulation of Electrical Vehicle Motor Drives on a PC Cluster”, Proceedings of the 10th European Conference on Power Electronics and Applications (EPE 2003), Toulouse, September 2-4 2003.
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PMSM models: DQ, VDQ and SH
N
Siabc
rotor
PMSM
rotor
idqref
iabc idq (ref)
(Park transform)(hysteresis switching)
+- iabc(ref)
IGBT inverterVdc
When the motor starts to saturate:
• DQ model: produces higher torque than normal
• VDQ (DQ with variable Ld Lq): has the correct average torque
• Spatial Harmonic (SH) : more precise with cogging torque andslot-induced inductance torque variation
This test in current control mode shows the different torque levels produced for the SAME current!
2323
Next step: Power HIL versus Signal Level HIL Simulation
PHIL simulation is a scenario where a simulation environmentvirtually exchanges power with real hardware, in contrast to cases which involves only low-power signal exchange.
Power Hardware-In-the-Loop
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Power HIL: Why, How, Where?
• Join the real-time simulator capabilities to the powerequipment• Power systems, power electronic, protection equipement,
controller logic, etc.
• Requires high quality amplifier• High accuracy, low distorsion, high bandwith, low phase lag,
etc.
• Connect a real power device under test• Wind turbine, solar panel, motors/generators, protection
relays, gate drives, etc.
• $ trade-off
2525
Power HIL: Why, How, Where?
Potential Applications
• Grid Applications• Grid Emulator (50, 60, 400 Hz)
• Grid Load
• PV-Inverter Emulation
• Wind-Generator Emulation
• UPS (Uninteruptible Power Supply) Emulation
• Grid Inverter Emulation
• Grid Motor / Generator Emulation
• Motor Applications• Motor / Generator Emulator
• Drive Inverter Emulator
• Frequency Inverter Emulator
• Aerospace / Military
• 400 Hz Supply Grid Emulator
• DC-Supply emulation
• 400 Hz Aerospace device emulator
• AC-DC Coupling Emulator
• Generator / Motor Emulator
• 400 Hz Inverter Emulator
• Automotive Applications
• Electrical drive train emulation
• Battery Emulator
• Drive Inverter Emulator
• Motor Emulator
• eVehicle Applications
• eVehicle charging station emulator
• Test Bench for charging
• Test Benches for combustion engine drive train
• Drive Inverter for electrical machines connected to combustion machines, wheel, gear boxes
• Transportation• Supply Grid Emulator
• Machine Emulator
• Inverter Emulator
• Electrical drive train emulation
2626
Summary 1
FPGA is now the default solution for HIL testing
High-fidelity HIL model on FPGA is finally a reality Large scale parametric analysis of (example) Prius Motor was done to
prepare data for Opal-RT software using ANSYS FEA software
Enhanced control algorithm validation is now possible on HIL
Faster tests, simplified workflow, lower cost
Motor and controller designer can work closely together – The exported FEA model (Design) IS the HIL plant model
27
Summary 2
• eFPGAsim is designed to ease the use of FPGA technologies for motor drive and power electronic HIL testing• avoid very long ‘Place And Route’ time of modern, large FPGAs.
• non-flashing, variable parameter and variable topology methodology
• Available motor models as of today: PMSM, SRM, IM . . .
• eHS can be used to build exotic power converter topologies
eFPGAsim is a useful tool to increase test coverage of motor drive and power electronics systems in early stage of development and reduce overall project costs
…. Time for a quick Demo!
Req. Design Implement ValidationRat
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The later the detection, the more expensive the correction