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Revolutionary Debug Techniques to Improve Verification Productivity

2 © 2014 Cadence Design Systems, Inc. All rights reserved.

Revolutionary Debug Techniques Agenda

Debug Overview and Challenges

Debug Methodologies Overview

Summary

Revolution in Debug Methodology


• Customers are spending over 50% of overall verification effort in Debug

• Signal level debug is the norm

• Debug methodology is shifting from purely signal based Class and Transaction based debug

• Debugger paradigm must change

Debug is the Main Bottleneck in Verification

50%

Verification

efforts

5% 10%

25%

10% Test planning

Test creation

Test execution (formal + sim + HW)

Debug

Coverage analysis


•Multiple debug iterations

•Context switching

•Manual grep/search through code

•Ramp up on unfamiliar

environment

• Varying debug skillset

Human Time Sink

• Large designs

• Lengthy simulations

• Regression management (DRM’s)

• Management of large databases

• Debug turnaround time

Performance

•Complex designs/verification

environments

• Feature interactions

• OOP/AOP languages for Testbenches

•Legacy/unfamiliar code

•Generated code

•Encrypted code

Code Complexity

•Working at the waveform signal

level too often

•Print statement debug

•Often difficult to see the “big

picture” or the “right picture”

•Encrypted IPs

• IP/VIP protocol debug

Abstraction

• Debug handover

• Different tool set (design vs.

verification vs. SW)

•Different mindset (design vs.

verification vs. SW)

•Manual knowledge transfer

(emails, phone, meetings)

Collaboration

•Regression data explosion

•Coverage, log files, reports,

•Regression tracking, test case

ranking

•Performance profiling, linting

•Combining information into

meaningful picture

Information Overload

•Defining complex

scenarios/constraint sets

• Is my coverage correct

•Are my assertions capturing

correct scenarios

• Is my coverage actually being

sampled correctly

Coverage

•Assertions, SV, e, SC, C++, C, HDL

syntax/semantics

•Different debug methodologies

(RTL vs. HVL vs. SW)

•Different toolsets

•Mixed language

designs/verification environments

•Language interactions

Multi-

Language

Some of Today’s Many Debug Challenges





Summary




Method 4:

Interactive debug

(Single stepping and breakpoints)

Method 7:

Embedded SW Debug

(Interactive or IPP)

• No “one size fits all” methodology

• Each methodology addresses certain needs well – Debug becomes challenging when we use methodologies not

optimized for the specific issue

Method 5:

Interactive Post

Process (IPP)

(Recording code execution,

post process analysis)

Method 6:

IPP with regression automation

(Automated failure triage

and re-run with recording and collaborative

debug)

Method 2:

Post process HDL

waveform inspection +

log file

Method 3:

Post Process HDL/HVL waveform

inspection + log file

Method1:

Post Process

HDL waveform inspection


Debug Capabilities


Method 2:

Post process HDL

waveform inspection +

log file

Method 3:

Post Process HDL/HVL waveform

inspection + log file

Method 4:

Interactive debug

(Single stepping and breakpoints)

Method 5:

Interactive Post

Process (IPP)

(Recording code execution,

post process analysis)

Method 6:

IPP with regression automation

(Automated failure triage

and re-run with recording and collaborative

debug)

Method1:

Post Process

HDL waveform inspection

Method 7:

Embedded SW Debug

(Interactive or IPP)

Industry Average

Significant opportunity for debug productivity

increase





Summary



What is Debug Performance?

• Can be measured in cycles – Simulator Cycles: Simulation throughput on a given server

– Engineer Cycles: Abstract notion but could be wall clock time

9

SIMULATOR ENGINEER

• Goal in increasing debug performance is to: 1.Use Engineer cycles as efficiently as possible

– Engineers are very expensive (compared to new server)

2.Reduce the number of simulator cycles to achieve goals – Write shorter, higher coverage tests

3.Run each simulator cycle as efficiently as possible – Build the fastest simulator possible


How do we measure

debug

performance?


• What if we never needed to re-run more than once?

• We had a tool that guided us through the debug process?

• What if we could step forward/backward through code?

• What if we could immediately jump through time and space to interesting events in a single click?

• What if we never needed to manually grep log files?

• We were able to cut our debug turnaround time in half?

• All of the above was enabled through only a slight modification to our post process debug methodology?



Regression Automation Dashboard

Original failures

Rerun

Open Debug Analyzer

Open saved debug session


Debug Videos on YouTube: http://goo.gl/EewfNf

http://goo.gl/EewfNf







Summary



• Debug is the main bottleneck in todays projects

• Debug performance measured by both – Human Cycles

– Machine cycles

• Debug performance must increase for today’s designs

• Cadence offers revolutionary debug solutions to dramatically reduce Human Cycles and remove Machine Cycles – Incisive Debug Analyzer

– Industry’s first Interactive Post Process Debug solution

– Incisive Enterprise Manager – Automated failure triage, rerun and collaborative debug

– Incisive Embedded SW Debug

Summary


Successful Story: ST Micro http://www.cadence.com/rl/Resources/success_stories/STMicro_cs.pdf

• Business Challenges – Achieve faster debug of RTL data cache flow

– Quickly gain familiarity with new testbench for enhanced productivity

• Design Challenges – Learn testbench environment and manage debug process

independently after support from testbench developer ended

– Detect and resolve bugs faster and earlier in the process

• Cadence Solutions – Incisive Debug Analyzer

– Incisive Specman Elite Testbench

– Incisive Enterprise Simulator

– SimVision

• Results – Saved 2 months of debugging time

– Enhanced team productivity with easy-to-use debug tool

Features are mostly useful: 1. Playback debugger

2. Smartlog window

3. Search

4. Variable value

Comment from customer:

“We were using print messages for debug, but using this method,

we weren’t able to catch all of the errors and

it was taking a really long time. Using Incisive Debug Analyzer, we

were able to learn the structure of our third

party-developed testbench environment step by step, and built a

reliable environment for fixing bugs. Using

Incisive Debug Analyzer, we saved two months in our overall

debug cycle.”

“I keep the GUI for Incisive Debug Analyzer on all day,

because I’m using the tool often. In fact, every day,

I discover a new feature of the tool that helps us during the debug

process,”

“Based on the efficiency gain we’ve already seen with the tool,

we can see ways to extend the benefits deeper into our company

by using the tool in other flows worldwide.”

http://www.cadence.com/rl/Resources/success_stories/STMicro_cs.pdf


General Usability Features

Most

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What’s new

in the latest

debug

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