Knowledge Reuse for Software Reuse - University College Dublin
Reuse: Right Idea, Wrong representation?
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Transcript of Reuse: Right Idea, Wrong representation?
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REUSE: RIGHT IDEA, WRONG REPRESENTATION?
June, 2013(New Slides Added to Support Unaided
Reading)Ted J. Biggerstaff
Software Generators, LLC
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Never Reprogram AgainTM
ImplementationNeutral
ComputationSpec
DSLGen
Von NeumannArchitecture
MulticoreThreaded
Parallelism
InstructionLevel
Parallelism(ILP)
MulticoreThreadedAnd ILP
GPUParallelism(e.g., C and
CUDA)
API orLayeredLibrary
(e.g, DirectX)Speciality
Platform orFramework(e.g, MDE
Docs)
FutureArchitectures
Digital SignalProcessing
ChipAPI
ExecutionPlatform
Spec
//Sobel Edge Detectionb=[(a Å s)2 +(a Å sp)2]1/2
((PL C) (partition t))
Von Neumann with
Partitioning
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Never Reprogram AgainTM
ImplementationNeutral
ComputationSpec
DSLGen
Von NeumannArchitecture
MulticoreThreaded
Parallelism
InstructionLevel
Parallelism(ILP)
MulticoreThreadedAnd ILP
GPUParallelism(e.g., C and
CUDA)
API orLayeredLibrary
(e.g, DirectX)Speciality
Platform orFramework(e.g, MDE
Docs)
FutureArchitectures
Digital SignalProcessing
ChipAPI
ExecutionPlatform
Spec
//Sobel Edge Detectionb=[(a Å s)2 +(a Å sp)2]1/2
((PL C) (partition t) Mcore (Threads MS) (LoadLevel (SliceSize 5)))
MulticoreThreadedParallel
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Never Reprogram AgainTM
ImplementationNeutral
ComputationSpec
DSLGen
Von NeumannArchitecture
MulticoreThreaded
Parallelism
InstructionLevel
Parallelism(ILP)
MulticoreThreadedAnd ILP
GPUParallelism(e.g., C and
CUDA)
API orLayeredLibrary
(e.g, DirectX)Speciality
Platform orFramework(e.g, MDE
Docs)
FutureArchitectures
Digital SignalProcessing
ChipAPI
ExecutionPlatform
Spec
//Sobel Edge Detectionb=[(a Å s)2 +(a Å sp)2]1/2
((PL C) (partition t) (ILP SSE))
Instruction Level
Parallelism with SSE
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Alternative Output Opportunities
ImplementationNeutral
ComputationSpec
DSLGen
Von NeumannArchitecture
MulticoreThreaded
Parallelism
InstructionLevel
Parallelism(ILP)
MulticoreThreadedAnd ILP
GPUParallelism(e.g., C and
CUDA)
API orLayeredLibrary
(e.g, DirectX)Speciality
Platform orFramework(e.g, MDE
Docs)
FutureArchitectures
Digital SignalProcessing
ChipAPI
ExecutionPlatform
Spec
//Sobel Edge Detectionb=[(a Å s)2 +(a Å sp)2]1/2
((PL MDE) (partition t) (ILP SSE)) MDE DOCs
for Parallelism with SSE
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Beyond MDEPROBLEM DOMAIN (PD) PROGRAM LANGUAGE
DOMAIN (PLD) DSLGen™ Design in
PD MDE (Model Driven
Engineering) in PLD
PL PL
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Beyond MDEPROBLEM DOMAIN (PD) PROGRAM LANGUAGE
DOMAIN (PLD) DSLGen™ Design in
PD MDE (Model Driven
Engineering) in PLD Abstractions
PLINITIALLY, NO: OO Classes OO Methods PL Scopes PL Routines Routine Signatures PL Loops Control Flow Data Flow Aliasing …
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Beyond MDEPROBLEM DOMAIN (PD) PROGRAM LANGUAGE
DOMAIN (PLD) DSLGen™ Design in
PD MDE (Model Driven
Engineering) in PLD
PLAssociativeProgrammingCONSTRAINTS
(APCs)Initial DSLGen™
Architecture Representation
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Beyond MDEPROBLEM DOMAIN (PD) PROGRAM LANGUAGE
DOMAIN (PLD) DSLGen™ Design in
PD MDE (Model Driven
Engineering) in PLD
PLInitial DSLGen™
Architectural Layers
Iterative APC (e.g.,PD Loop)
PD Partion APC (e.g., edge or center)PD Design Entity (e.g., Pixel neighborhood specialized to partition)PD Component Definition (Method- Transform specialized to partition)
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Implementation Neutral Specification (INS)
a b//Sobel Edge Detectionb=[(a Å s)2 +(a Å sp)2]1/2
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Essence of Computation
a bS
SP
aaaaaaaaa
jijiji
jijiji
jijiji
1,1,11,1
1,1,1,
1,1,11,1 Å =
aaaaaaaaa
jijiji
jijiji
jijiji
1,1,11,1
1,1,1,
1,1,11,1 Å =
+
121000121
101202101
aaaaaaaaa
jijiji
jijiji
jijiji
*1*2*1*0*0*0*1*2*1
1,1,11,1
1,1,1,
1,1,11,1
aaaaaaaaa
jijiji
jijiji
jijiji
*1*0*1*2*0*2*1*0*1
1,1,11,1
1,1,1,
1,1,11,1
where ai,j is NOT an edge pixel
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Essence of Computation
a bS
SP
aaaaaaaaa
jijiji
jijiji
jijiji
1,1,11,1
1,1,1,
1,1,11,1 Å =
aaaaaaaaa
jijiji
jijiji
jijiji
1,1,11,1
1,1,1,
1,1,11,1 Å =
+
000000000
000000000
aaaaaaaaa
jijiji
jijiji
jijiji
*0*0*0*0*0*0*0*0*0
1,1,11,1
1,1,1,
1,1,11,1
where ai,j IS an edge pixel
aaaaaaaaa
jijiji
jijiji
jijiji
*0*0*0*0*0*0*0*0*0
1,1,11,1
1,1,1,
1,1,11,1
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Design Features Of Differing Generated Implementations
a b
//Sobel Edge Detectionb=[(a Å s)2 +(a Å sp)2]1/2
DSLGen™
Von NeumannMachine
Multicore withThreads
Vector Machine
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Von Neumann ImplementationProcessEdges
Sequentially
ProcessCenter
a b
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Von Neumann Design FeaturesEdge Processing
Loops
1 Dimensional Loops
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Von Neumann Design FeaturesCenter
Processing Loops
Neighborhood of c[idx13,idx14]
Processing Loops
Essence of
Sobel
(c[idx13,idx14] Å s[p15,q16])(c[idx13,idx14] Å sp[p15,q16])
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Thread Based Implementation
Thread MgrEdges Thread
Center Slice Threads
a b
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Thread Manager Design Features
Start Edge Thread Routine
Start Center Slice Routine for each Slice
Slice Up Center
Synchronize Thread Routines
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Edge Thread Design Features
Synchronize
Thread
Edge Processing Thread One
Dimensional Loops
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Center Slice Design Features
Loops Over
Center Slice
Synchronize
Thread
Loops Over c[i,j] Pixel
Neighborhood
Essence of Sobel Edge Detection
Center Processing
Thread
(c[i,j] Å s[p,q])(c[i,j] Å sp[p,q])
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SIMD Implementation
ProcessCenter(RGB)
a b
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SIMD Design FeaturesAn RGB Edge Loop
Generated WeightVectors
(c[idx3,idx4] Å dsarray9)(c[idx3,idx4] Å dsarray10)
Neighbor-hood Loops As SSE InstructionMacros
RGB Center Loops
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The Problem Changing Platforms in Programming
Language (PL) Domain Requires Difficult Reprogramming Von Neumann to Multicore to Vector Processor Inter-related structures change across the
program PL-Based Abstractions Too Restrictive Conclusion: Non-PL Abstractions Needed
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New Abstractions for DSLGen
Associative Programming Constraints (APC) Isolated design feature of an implementation
form Partial and provisional specification Retains domain knowledge Can be composed Can be manipulated (algebra of APCs)
Design Frameworks (formal “Design Patterns”) Large scale architectural framework
Logical Architecture (LA) when combined
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APC’s Used in DSLGen Iteration Constraints
Loop Constraints Recursion Constraints
Partitioning Constraints (Natural) Matrix edges, corners, non-corner edges,
centers Upper triangular, diagonal, and more
Partitioning Constraints (Synthetic) Add design features to solution
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Sobel Edge Detection Computation
Programmer’s Specification of Computation
Programmer’s Specification ofThe Platform
a b
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Sobel Edge Detection Computation
Programmer’s Specification of Computation
Programmer’s Specification ofThe Platform
a b
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Programmers Specification of Computation
(DSDeclare Neighborhood s :form (array (-1 1) (-1 1)) :of DSNumber)(DSDeclare Neighborhood sp :form (array (-1 1) (-1 1))
:of DSNumber)(DSDeclare DSNumber m :facts ((> m 1)))(DSDeclare DSNumber n :facts ((> n 1)))(DSDeclare BWImage a :form (array m n) :of BWPixel)(DSDeclare BWImage b :form (array m n) :of BWPixel)
(Defcomponent w (sp #. ArrayReference ?p ?q) (if (or (== ?i ?ilow) (== ?j ?jlow) (== ?i ?ihigh) (== ?j ?jhigh)
(tags (constraints partitionmatrixtest edge))) (then 0) (else (if (and (!= ?p 0) (!= ?q 0)) (then ?q) (else (if (and (== ?p 0) (!= ?q 0)) (then (* 2 ?q)) (else 0)))))))(Defcomponent w (s #. ArrayReference ?p ?q) ….)
b = [(a Å s)2 +(a Å sp)2]1/2
a b
Built-In Def:(ai.j Å s) = (Σp, q (w(s)p , q * a i+p
, j+q )
CenterSpecializations
Go To Platform Spec
Edge
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(ai.j Å s) = (p, q (w(s)p , q * a i+p , j+q)
a bS
SP
aaaaaaaaa
jijiji
jijiji
jijiji
1,1,11,1
1,1,1,
1,1,11,1 Å =
aaaaaaaaa
jijiji
jijiji
jijiji
1,1,11,1
1,1,1,
1,1,11,1 Å =
+
121000121
101202101
aaaaaaaaa
jijiji
jijiji
jijiji
*1*2*1*0*0*0*1*2*1
1,1,11,1
1,1,1,
1,1,11,1
aaaaaaaaa
jijiji
jijiji
jijiji
*1*0*1*2*0*2*1*0*1
1,1,11,1
1,1,1,
1,1,11,1
where ai,j is NOT an edge pixel
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(ai.j Å s) = (p, q (w(s)p , q * a i+p , j+q)
a bS
SP
aaaaaaaaa
jijiji
jijiji
jijiji
1,1,11,1
1,1,1,
1,1,11,1 Å =
aaaaaaaaa
jijiji
jijiji
jijiji
1,1,11,1
1,1,1,
1,1,11,1 Å =
+
000000000
000000000
aaaaaaaaa
jijiji
jijiji
jijiji
*0*0*0*0*0*0*0*0*0
1,1,11,1
1,1,1,
1,1,11,1
where ai,j IS an edge pixel
aaaaaaaaa
jijiji
jijiji
jijiji
*0*0*0*0*0*0*0*0*0
1,1,11,1
1,1,1,
1,1,11,1
Return
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IL Specializations Specialize IL(Defcomponent w (sp #.
ArrayReference ?p ?q) (if (or (== ?i ?ilow) (== ?j ?jlow) (== ?i ?ihigh) (== ?j ?jhigh) (tags (constraints
partitionmatrixtest edge))) (then 0) (else (if (and (!= ?p 0) (!= ?q 0))
(then ?q) (else (if (and (== ?p 0)
(!= ?q 0)) (then (* 2 ?q)) (else 0)))))))
SP-Edge1 (== ?i ?ilow)(Defcomponent w (sp-Edge1
#. ArrayReference ?p ?q) 0)
SP-Center5 (ELSE)(Defcomponent w (sp-Center5
#. ArrayReference ?p ?q)(if (and (!= ?p 0) (!= ?q 0))
(then ?q) (else (if (and (== ?p 0)
(!= ?q 0)) (then (* 2 ?q)) (else 0)))))
Return
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Programmers Specification of the Platform
Programmer’s Specification of Computation
Programmer’s Specification ofThe Platform
a b
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Programmers Specification of the Platform
Programmer’s Specification of Computation
((PL C) (partition t) Mcore (Threads MS) (LoadLevel (SliceSize 5)))
a b
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Generation: Logical Architecture
….b = [(a Å s)2 + (a Å sp)2]1/2
((PL C) (partition t) Mcore (Threads MS) (LoadLevel (SliceSize 5)))
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Logical Architecture
Edge2
Set of Partitions
Edg
e1
Edg
e3
Edge4
Center5
Partially Translated INS Expression:b [i,j]= [(a[i,j] Ås[p,q])2 + (a[i,j]Åsp[p,q])2]1/2
Loop Constraint:(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), Partestx(S)}
SpecializationsOf
NeighbothoodsS and SP:
S-Edge1Sp-Edge1S-Edge2Sp-Edge2S-Edge3Sp-Edge3S-Edge4Sp-Edge4S-Center5Sp-Center5
Convolution Neighborhoods
Transforms
WPartestxRowCol...
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Logical Architecture (Internal Form)
W method-transform component definition specialized to neighborhood spart-0-edge11
Partition APC modifying loop APC
Loop APC
Neighborhoods spart & sppart specialized toEdge11 partition
Component definitions for selected neighborhood spart-0-edge11
NB: Concrete Example where Spart & sppart are analogous to s & sp in abstract example.
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Logical Architecture (Internal Form)
W method-transform component definition specialized to neighborhood spart-0-center15
Component definitions for selected neighborhood spart-0-center15
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W.Spart Specialized to Center
Recall body of definition of W of sp
Return
NB: Concrete Example where Spart & sppart are analogous to s & sp in abstract example.
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W.Spart Specialized to Edge
w.Spart body specialized to
edge
Return
NB: Concrete Example where Spart & sppart are analogous to s & sp in abstract example.
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Generation: Logical Architecture(Synthetic Partitioning)
….
b = [(a Å s)2 + (a Å sp)2]1/2
((PL C) (partition t) Mcore (Threads MS) (LoadLevel (SliceSize 5)))
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Generation: Logical Architecture(Synthetic Partitioning)
Edge2
Edg
e1
Edg
e3
Edge4
Slicer: (forall (h) { 0<= h<=(m-1), eq(mod(h, Rstep(S-Center5-KSegs)), 0),Partestx(S-Center5-KSegs))
SpecializationsOf Neighbothoods
S and SP:S-Edge1Sp-Edge1S-Edge2Sp-Edge2S-Edge3Sp-Edge3S-Edge4Sp-Edge4S-Center5
Sp-Center5S-Center5-ASegSp-Center5-ASegS-Center5-KSegs
SP-Center5-KSegs
Center5-K
…..…..…..…..…..…..…..…..…..
ASlice: (forall (i j) {h<= i<min((h +RStep(S-Center5-KSegs),m), 0<=j<=(n-1), Partestx(S-Center5-ASeg)}
Partially Translated INS Expression:b [i,j]= [(a[i,j] Ås[p,q])2 + (a[i,j]Åsp[p,q])2]1/2
Center5-0
Center5-ASeg
Center5-KSegs
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Generation: Logical Architecture(Cloning and Specializing)
….
b = [(a Å s)2 + (a Å sp)2]1/2
((PL C) (partition t) Mcore (Threads MS) (LoadLevel (SliceSize 5)))
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Generation: Logical Architecture(Cloning and Specializing)
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Generation: Physical Architecture(Finding Design Framework)
….
b = [(a Å s)2 + (a Å sp)2]1/2
((PL C) (partition t) Mcore (Threads MS) (LoadLevel (SliceSize 5)))
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Generation: Physical Architecture(Finding Design Framework)
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Generation Phases
….
b = [(a Å s)2 + (a Å sp)2]1/2
((PL C) (partition t) Mcore (Threads MS) (LoadLevel (SliceSize 5)))
Demo
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Performance with Threads
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Performance with SIMD
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DSLGen Tools Demo
Transformation and Type Inference Rule
Definitions
TransformationEngine
PatternEngine
Partial Evaluation
Engine
Generator Execution Unit
v Read Computation Specificationv Read Target Machine Specificationv Read List of Phasesv For each Phase
o Enable Transforms of that Phaseo Traverse Specification Applying Rewriting
Transforms v Write Out Generated Program
ComputationSpecification
TargetMachine
Specification
GeneratedGPL Program
Phase ListDefinitions
AssociativeProgramming
ConstraintDefinitions
InferenceEngines
Data Abstractions
Demo
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Patents 8,060,857 – Automated partitioning of a
computation for parallel or other high capability architecture
8,225,277 – Non-localized constraints for automated program generation
8,327,321 - Synthetic partitioning for imposing implementation design patterns onto logical architectures of computations
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End of Presentation
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DSLGEN™ TOOLS DEMOJune, 2013
Ted J. BiggerstaffSoftware Generators, LLC
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Tools Building Logical Architecture History Debugger Partial Evaluation Engine Synchronizing Design Decisions Pattern Matching Engine Transformation Engine Type Inference Engine Inference Engine
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How Did LA Get Built?
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b = [(a Å s)2 +(a Å sp)2]1/2
=
+
b
Å
s a
square
Å
sp a
square
sqrtLoop2d1
Loop2d2
Loop2d3
Loop2d2 (e1-c5)Loop2d3 (e6-
c10)
Loop2d4 ((e11-c15) = (e1-c5, e6-c10))
Loop2d5 ((e11-c15) =(e1-c5, e6-c10))
bi,j
ak,l sp,q at,u
spv,w
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Tools Building Logical Architecture History Debugger Partial Evaluation Engine Synchronizing Design Decisions Pattern Matching Engine Transformation Engine Type Inference Engine Inference Engine
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Domain Engineer Debugging
Domain Engineer’s Job is DSLGen Extensions Problem: Analyzing Creation of Logical
Architecture How are loop constraints and index names
created? How are partitions created, combined &
specialized? How do design decisions (e.g., Idx1 -> Idx3 )
happen? Tools for Analyzing a Generation History? History Debugger
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History Debugger
HistoryTree at TopLevel (total
tree typically
~3K nodes)
Bindings of selected history
node used to rewrite AST
AST beforerewriting
AST afterrewriting
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History Debugger
Selected history node (e.g., transform,
routine or trace info)
Bindings created by
operation of selected
node
Dialog to search
history tree
Bookmarked locations (for debugging or presentation
s).
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History Debugger Dialogs available from History Debugger
Architecture browser (as used earlier to display LA)
Examine transforms (as used earlier to show w.part)
Inspect any object (e.g., examine slots of idx3) Open source file of a DSLGen™ routine in an
editor (e.g., Gnuemacs)
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Tools Building Logical Architecture History Debugger Partial Evaluation Engine Synchronizing Design Decisions Pattern Matching Engine Transformation Engine Type Inference Engine Inference Engine
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Degenerate Loops for Edges?
void Sobel Edges9( ) { /* Edge1 partitioning condition is (i=0) */ {for (int j=0; j<=(n-1);++j) b [0,j]=0;}
_endthread( ); }
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Architecture Specializations
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Specializations of W.Spart
W.Spart specialized to center
W.Spart body specialized to
edge
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Physical Architecture Inline the Intermediate Language (IL)
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), Partestx(S-Edge1)} b [i,j]=[(a[i,j] Ås-edge1[i,j])2 + (a[i,j]Åsp-edge1[i,j])2]1/2
Partestx Å
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Physical Architecture Inline the Intermediate Language (IL)
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), Partestx(S-Edge1)} b [i,j]=[(a[i,j] Ås-Edge1[i,j])2 + (a[i,j]Åsp-edge1[i,j])2]1/2
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), (i==0) )} b [0,j]= [ ((sum(p q) {0<= p<=2, 0<=q<=2} (* (aref a (row s-Edge1 a[i,j] p q)
(col s-Edge1 a[i,j] p q) ) (w s-Edge1 a[i,j] p q))))2
+ (convolution using sp-Edge1)2]1/2
Partestx Å
row colw
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Physical Architecture Inline the Intermediate Language (IL)
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), Partestx(S-Edge1)} b [i,j]=[(a[i,j] Ås-Edge1[i,j])2 + (a[i,j]Åsp-Edge1[i,j])2]1/2
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), (i==0) )} b [0,j]= [ ((sum (p q) {0<= p<=2, 0<=q<=2} (* (aref a (row s-Edge1 a[i,j] p q)
(col s-Edge1 a[i,j] p q) ) (w s-Edge1 a[i,j] p q))))2
+ (convolution using sp-Edge1)2]1/2
Partestx Å
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), (i==0) )} b [0,j]= [ ((sum (p q) {0<= p<=2, 0<=q<=2} (* (aref a (+ 0 (+ p -1))
(+ j (+ q -1))) 0)))2 + (“convolution using sp-Edge1” )2]1/2
row colw
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Physical Architecture Inline the Intermediate Language (IL)
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), Partestx(S-Edge1)} b [i,j]=[(a[i,j] Ås-Edge1[i,j])2 + (a[i,j]Åsp-Edge1[i,j])2]1/2
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), (i==0) )} b [0,j]= [ ((sum (p q) {0<= p<=2, 0<=q<=2} (* (aref a (row s-Edge1 a[i,j] p q)
(col s-Edge1 a[i,j] p q) ) (w s-Edge1 a[i,j] p q))))2
+ (convolution using sp-Edge1)2]1/2
Partestx Å
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), (i==0) )} b [0,j]= [ ((sum(p q) {0<= p<=2, 0<=q<=2} (* (aref a (+ 0 (+ p -1))
(+ j (+ q -1))) 0)))2 + (“convolution using sp-Edge1” )2]1/2
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), (i==0) } b [0,j]=[ 0 + 0]1/2
row colw
(…* 0) (…* 0)
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Physical Architecture(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), Partestx(S-Edge1)} b [i,j]=[(a[i,j] Ås-Edge1[i,j])2 + (a[i,j]Åsp-Edge1[i,j])2]1/2
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), (i==0) )} b [0,j]= [ ((forall (p q) {0<= p<=2, 0<=q<=2} (* (aref a (row s-Edge1 a[i,j] p q)
(col s-Edge1 a[i,j] p q) ) (w s-Edge1 a[i,j] p q))))2
+ (convolution using sp-Edge1)2]1/2
Partestx Å
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), (i==0) )} b [0,j]= [ ((forall (p q) {0<= p<=2, 0<=q<=2} (* (aref a (+ 0 (+ p -1))
(+ j (+ q -1))) 0)))2 + (“convolution using sp-Edge1” )2]1/2
(forall (i j) { 0<= i<=(m-1), 0<=j<=(n-1), (i==0) } b [0,j]=[ 0 + 0]1/2
row colw
(…* 0) (…* 0)
(forall (j) { 0<= i<=(m-1), 0<=j<=(n-1), (i==0) } b [0,j]= 0
PE
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Degenerate Loops for Edges?
void Sobel Edges9( ) { /* Edge1 partitioning condition is (i=0) */ {for (int j=0; j<=(n-1);++j) b [0,j]=0;}
_endthread( ); }
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Analyzing Behavior with History Debugger
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Tools Building Logical Architecture History Debugger Partial Evaluation Engine Synchronizing Design Decisions Pattern Matching Engine Transformation Engine Type Inference Engine Inference Engine
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Synchronizing Design Decisions
How did index variables get synchronized? di,j and ck,l and ct,u
Answer: Loop constraint combining transforms generated fix up transforms to be executed later Loop2d4 combo transform generated
K -> I, T-> I, L-> J, U->J transforms NB: Loop constraints for neighborhoods s and
sp elided from example for simplicity
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Tools Building Logical Architecture History Debugger Partial Evaluation Engine Synchronizing Design Decisions Pattern Matching Engine Transformation Engine Type Inference Engine Inference Engine
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Pattern Language Left-Hand-Side (LHS) of transformations Reverse quoting language
Non-syntactically enhanced items are literals (e.g., “a”) Syntactically enhanced are operators E.G., ?x is variable, $(op …) is a pattern operator
Full backtracking on failure (via “continuations”) Extensible – User can define new operators Internal – Lambda tree + fail stack of
continuations De-compiler for internal to external Turing complete
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Example Pattern Constructs
$(Por pat1 pat2….patn) $(Pand pat1 pat2 …patn) $(pnot pat) $(none pat1 pat2 … patn) $(remain ?x) $(spanto ?x <pattern>) $(bindvar ?x <pattern>) $(bindconst ?x
<constant>) $(pcut) $(pfail) $(pmatch <pattern>
<data>)
$(within <pattern>) $(ptest <lisp function of
one argument>) $(papply function ?arg1 ?
arg2 ... ?argn) $(pat <variable>) $(plisp <Lisp Code>) $(psuch slotname ?vbl
<pattern>) $(ptrace <lisp
expression> label) $(plet <let list>
<pattern>) …others …
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Tools Building Logical Architecture History Debugger Partial Evaluation Engine Synchronizing Design Decisions Pattern Matching Engine Transformation Engine Type Inference Engine Inference Engine
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Transformations Pattern Language used to specify LHS Transformations
Format Preroutines and postroutines (like before and
after methods) Inheritance
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Example TransformationsTransform(=> PartitioningCompositeLeaf LocalizeAndPartition image `$(pand #.LeafOperator
$(psuch dimensions ?op ((,_Member ?iiter (,_Range ?ilow ?ihigh)) (,_Member ?jiter (,_Range ?jlow ?jhigh)))) $(por ($(spanto ?taglessremain (tags)) ?thetags) $(psucceed)))
`(,leaf ?newleaf (tags (commasplice ?newtaglist))) enablePartitioningCompositeLeaf nil all)
Method-Transform (Defines IL)(Defcomponent w (sp #. ArrayReference ?p ?q) (if (or (== ?i ?ilow) (== ?j ?jlow) (== ?i ?ihigh) (== ?j ?jhigh) (tags (constraints partitionmatrixtest edge))) (then 0) (else (if (and (!= ?p 0) (!= ?q 0)) (then ?q) (else (if (and (== ?p 0) (!= ?q 0)) (then (* 2 ?q)) (else 0)))))))
(defconstant LeafOperator `$(por (,leaf ?op) $(pand $(ptest atom) ?op)))
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Use of Example Transformation
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Transform Viewer
Preroutine handles
bookkeeping
operations after LHS
match
Type object where
transform lives
Phase where it is enabled to
execute
LHS patternRHS
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Transformation Pattern Matching
Transformation Definition(=> PartitioningCompositeLeaf
LocalizeAndPartition image `$(pand #.LeafOperator
$(psuch dimensions ?op ((,_Member ?iiter (,_Range ?
ilow ?ihigh)) (,_Member ?jiter (,_Range ?
jlow ?jhigh)))) $(por ($(spanto ?taglessremain (tags)) ?thetags)
$(psucceed))) `(,leaf ?newleaf (tags (commasplice ?
newtaglist))) enablePartitioningCompositeLeaf nil all)
WHERE
(defconstant LeafOperator `$(por (,leaf ?op) $(pand $(ptest
atom) ?op)))
DSLGen Internal StateAST before rewrite = (leaf d (tags (itype
colorimage)))AST after rewrite = (leaf colorpixel1 (tags (itype
colorpixel) (constraints loop2d1)))
__________________________________________________(dimension d) = ((_Member iiter6 (_Range 0 99 1)) (_Member jiter6 (_Range 0 99
1)))__________________________________________________Bindings After Matching and Preroutine =((?newleaf colorpixel1) (?idx1 idx1) (?idx2 idx2) (?theapc loop2d1) (?inewtype colorpixel) (?newtaglist ((itype colorpixel) (constraints loop2d1))) (?thetags (tags (itype colorpixel) (constraints loop2d1))) (?taglessremain (leaf d)) (?jhigh 99) (?jlow 0) (?jiter jiter6) (?ihigh 99) (?ilow 0) (?iiter iiter6) (?op d) (?phase localizeandpartition) (?defclass image) (?transformname partitioningcompositeleaf))
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Transformations Pattern Language used to specify LHS Transformations
Format Preroutines and postroutines (like before and
after methods) Inheritance – Up type hierarchy
If there is no “(row sp-0-center15 …)” specialization, “(row sp …)” will be used when in-lining definitions
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Tools Building Logical Architecture History Debugger Partial Evaluation Engine Synchronizing Design Decisions Pattern Matching Engine Transformation Engine Type Inference Engine Inference Engine
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Example Type Inference Rules
(DefOPInference ImageOperators (ImageOperators image iatemplate) 1)(DefOPInference ImageOperators (ImageOperators pixel iatemplate) 1)(DefOPInference ImageOperators (ImageOperators channel iatemplate) 1)(DefOPInference AOperators (AOperators DSNumber DSNumber) DSNumber)(DefOPInference RelationalOperators (RelationalOperators (oneormore t)) DSSymbol)(DefOPInference LogicalOperators (LogicalOperators (oneormore t)) DSSymbol)(DefOpInference AssignOp (AssignOp t t) last) ; resultant type is infered type of the last arg (DefOpInference ProgmOp (ProgmOp (oneormore t)) last)(DefOpInference IfOp (IfOp t t t) 2)(DefOpInference IfExprOp (IfExprOp t t t) 2)(DefOpInference IfOp (IfOp t t) 2)(DefOpInference ThenOp (ThenOp (oneormore t)) last)(DefOpInference ElseOp (ElseOp (oneormore t)) last)(DefOpInference ListOp (ListOp (oneormore t)) last)
(DefMethodInference IATemplate (Prange IATemplate image DSNumber DSNumber Iterator) Range)(DefMethodInference IATemplate (Qrange IATemplate image DSNumber DSNumber Iterator) Range)(DefMethodInference IATemplate (W IATemplate channel t t) DSNumber)
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Tools Building Logical Architecture History Debugger Partial Evaluation Engine Synchronizing Design Decisions Pattern Matching Engine Transformation Engine Type Inference Engine Inference Engine
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Inference Engine Given
(Idx1 == 0) from partitioning condition (0 <= Idx1 <= (m -1)) from loop range (m > 1) from :facts slot of m
Is partial evaluation of “(Idx1 == (m – 1))” true, false or unknown for all m?
False. “(m >1)” fact eliminates the only possible true case (i.e., for (m == 1)).
Inference engine based on Fourier-Motzkin elimination.
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Code For Image Average/* Definitions from scope SCOPE1: */ int M = 100; int N = 100; BWPIXEL IMAGEAVG (DSNUMBER M, DSNUMBER N, BWIMAGE A[M][N], BWIMAGE B[M][N]) {{ /* DSLGen (Version 0 Revision 2) generated this program at 3:26:38 pm on 11/Jun/2009 */ int IDX3 ; int IDX4 ; int P5 ; int Q6 ; int ANS1 ; {/*Initial values from scope SCOPE3 are ((IDX4 0) (IDX3 0))*/ int IDX4 = 0; int IDX3 = 0; for (IDX3=0; IDX3<=(M - 1); ++IDX3) {{ for (IDX4=0; IDX4<=(N - 1); ++IDX4) {{{/*Initial values from scope SCOPE4 are ((ANS1 0) (Q6 0) (P5 0))*/ int ANS1 = 0; int Q6 = 0; int P5 = 0; for (P5=((IDX3 == 0) ? 1:0); P5<=((IDX3 == (M - 1)) ? 1:2); ++P5) {{for (Q6=((IDX4 == 0) ? 1:0); Q6<=((IDX4 == (N - 1)) ? 1:2); ++Q6) {{ANS1 += ((*((*(A + ((IDX3 + (P5 + -1))*N))) + (IDX4 + (Q6 + -1)))) * ((((IDX3 == 0) || (IDX3 == (M - 1))) && ((IDX4 == 0) || (IDX4 == (N - 1)))) ? 0.25: (((IDX3 == 0) || ((IDX3 == (M - 1)) || ((IDX4 == 0) || (IDX4 == (N - 1))))) ? 0.166666666666667:0.111111111111111))); }}}} (*((*(B + (IDX3*N))) + IDX4)) = ANS1; }}}}}}}}
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End of Tools Demo