Renesas Electronics America Inc.

RX Ethernet Peripheral

© 2011 Renesas Electronics America Inc. All rights reserved. 00000-A

Rev. 1.008/16/2011

Agenda

Contained in this Course: RX Ethernet Peripheral Highlights RX Ethernet Controller (EtherC) RX Ethernet Direct Memory Access Controller (E-DMAC) EtherC and E-DMAC Working Together

© 2011 Renesas Electronics America Inc. All rights reserved.2

This course contains an overview of the RX MCU Ethernet peripheral

RX Ethernet Peripheral Highlights

Ethernet Controller (EtherC) Ethernet Direct Memory Access Controller (E-DMAC) Physical Device Interface (MII or RMII)

© 2011 Renesas Electronics America Inc. All rights reserved.3

Ethernet Controller (EtherC)

Ethernet and IEEE 802.3 Frames Type encapsulation Length encapsulation

10 and 100 Mbps Operation Half and full Duplex Modes PAUSE MAC Layer Flow Control (IEEE 802.3x)

When in full duplex mode Wake-On-LAN (WOL) Magic Packet Detection Automatic Frame Checksum MII and RMII PHY Layer Interface

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Preamble Destination Address

Source Address

Type/Length Data FCS

8Bytes 6 6 2 4

Ethernet Frame

46-1500

Ethernet Direct Memory Access Controller (E-DMAC)

Dedicated DMA Engine Between EtherC and system memory Receive and transmit descriptors CPU load reduction

Single Frame and Multi-buffer Operation One buffer per frame Multiple buffers for longer frames Fully automated

Frame Status Information Transmit and receive status in descriptors More status information in control registers

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HW Descriptor

E-DMAC Software

Software Descriptors Circular Buffers to Form Links On-chip or External Buffers Automated Operation

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RX_BUFF

RECEIVE DESCRIPTORS

statusbufsize size

Char *buf_pDiscript *next

statusbufsize size

Char *buf_pDiscript *next

statusbufsize size

Char *buf_pDiscript *next

RX_BUFF

RX_BUFF

***

TX_BUFF

TRANSMIT DESCRIPTORS

statusbufsize size

Char *buf_pDiscript *next

statusbufsize size

Char *buf_pDiscript *next

statusbufsize size

Char *buf_pDiscript *next

TX_BUFF

TX_BUFF

***

EtherC and E-DMAC Working Together

PHY

RECEIVE DESCRIPTORS

TRANSMIT DESCRIPTORS

TX BUFFER

TX BUFFER

TX BUFFER

RX BUFFER

RX BUFFER

RX BUFFER

E-D

MA

C Interface

RX

TX

MAC

RM

II or

M

II

Ethernet

Mem

ory Bus Interface

RX Descriptor Information

TX Descriptor Information

RX DMAC

TX DMAC

E-DMAC

RAM

Internal Bus

RX FIFO

TX FIFO

CPUC

PU

Mem

ory Bus

RX

© 2011 Renesas Electronics America Inc. All rights reserved7

© 2011 Renesas Electronics America Inc. All rights reserved.8

Summary

RX Ethernet Peripheral Highlights

RX Ethernet Controller (EtherC)

RX Ethernet Direct Memory Access Controller (E-DMAC)

Software Implementation of E-DMAC

EtherC and E-DMAC Working Together

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