RegistersKIRAN RATHOREMISBAH MAHMOODSAHER KHAN

What are Registers? Common sequential device and a good example of sequential analysis and design. They are frequently used in building larger sequential circuits. Registers hold larger quantities of data than individual flip-flops. – Registers are central to the design of modern processors.

Flip-flops are limited because they can store only one bit. • A register is an extension of a flip-flop that can store multiple bits. • Registers are commonly used as temporary storage in a processor.

A Basic Register: Basic registers are easy to build. We can store multiple bits just by putting a bunch of flip-flops together!

Types of Registers: There are two types of registers: parallel and serial registers. They differ in the manner in which the binary data is loaded and retrieved from them.Serial-in/serial-outParallel-in/serial-outSerial-in/parallel-outUniversal parallel-in/parallel-out

Serial In - Serial Out Shift Registers: The serial in/serial out shift register accepts data serially – that is, one bit at a time on a single line. It produces the stored information on its output also in serial form

Serial-in- serial-out shift register with 4-stages or 4-bit register

Data in

Clock Data Out

FF0

Stage A

FF1Stage B

FF2

Stage C

FF3Stage D

The operation of the circuit The register is first cleared, forcing all four outputs to zero. The input data is then applied sequentially to the stage A input of the first flip-flop on the left (FF0). During each clock pulse, one bit is transmitted from left to right. Assume a data word to be 1001. The least significant bit of the data has to be shifted through the register from FF0 to FF3.

Serial In – Parallel Out Shift Registers:The is entered Serially the difference is the way in which the data bits are taken out of the register. Once the data are stored, each bit appears on its respective output line, and all bits are available simultaneously. A construction of a four-bit serial in - parallel out register is shown below.

Data in

Clock Data Out

QA QB QC QD

Serial-in- Parallel-out shift register with 4-stages or 4-bit register

FF0

Stage A

FF1Stage B

FF2

Stage C

FF3Stage D

The operation of the circuit:Four data bits will be shifted in from “data in” by four clock pulses and be available at QA through QD for driving external circuitry such as LEDs, lamps, relay drivers, and horns.After the first clock, the data at “data in” appears at QA.After the second clock, The old QA data appears at QB; QA receives next data from “data in”. After the third clock, QB data is at QC. After the fourth clock, QC data is at QD. This stage contains the data first present at “data in”. The shift register should now contain four data bits.

Parallel In – Serial Out Shift Registers:A four-bit parallel in - serial out shift register is shown below. The circuit uses D flip-flops and NAND gates for entering data (ie writing) to the register. A construction of a four-bit serial in - parallel out register is shown below.

DA DB DC DD Data in

Clock Data Out

Parallel-in- Serial-out shift register with 4-stages or 4-bit register

FF0

Stage A

FF1Stage B

FF2

Stage C

FF3Stage D

Data is loaded into all stages at once of a parallel-in/serial-out shift register. The data is then shifted out via “data out” by clock pulses. Since a 4- stage shift register is shown above, four clock pulses are required to shift out all of the data. In the diagram above, stage D data will be present at the “data out” up until the first clock pulse; stage C data will be present at “data out” between the first clock and the second clock pulse; stage B data will be present between the second clock and the third clock; and stage A data will be present between the third and the fourth clock. After the fourth clock pulse and thereafter, successive bits of “data in” should appear at “data out” of the shift register after a delay of four clock pulses.

Parallel In – Parallel Out Shift Registers:A parallel-in/parallel-out shift register combines the function of the parallel-in, serial-out shift register with the function of the serial-in, parallel-out shift register to yield the universal shift register

DA DB DC DD

Data inClock mode Data Out Data Out

QA QB QC QD

Parallel-in- Serial-out shift register with 4-stages or 4-bit register

FF0

Stage A

FF1Stage B

FF2

Stage C

FF3Stage D

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