Register Rev

7/28/2019 Register Rev

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Registers

A register is a group of n flip-flops each of

them capable of storing one bit of

informationThere are two types of registers: parallel

and serial registers. They differ in the

manner in which the binary data is loadedand retrieved from them


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4-Bit Register 4-bit register constructed with four positive edge-triggered

D-type flip-flops with parallel load. Positive-edge-triggered D flip flop responses (i.e., value of

D transfers to Q) only to the transition from 0 to 1 andnothing else

The positive-edge-triggered D flip flop that is used in a4-bit register has also additional direct reset input namedCLEAR or RESET. When CLEAR is 0 the flip flop isresetting independent of clock and D values. It is usefulbecause in digital systems when the power is turned on

the state of flip-flops is unknown. Direct input CLEAR canbring all flip-flops to the known starting state prior to theclock operation. Next slid shows positive-edge-D flip flopwith asynchronous reset.


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Klasifikasi register

Masukan dan keluaran Seri Masukan seri keluaran paralel

Masukan seri keluaran seri

Masukan dan keluaran paralel

3


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4-bit Parallel Register 4-bit parallel register can be implemented with

negative-edge-triggered-DFF as well. Here isthe review of the graphic symbols for positive

and negative edge-triggered DFF


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Shift Register

A register capable of shifting its binary

information in one or both directions is called a

shift register

For example by connecting the output of each Dflip-flop to the input of another D flip flop in its

right, each clock pulse shifts the content of the

register one bit position to the right. The serial

input determines what goes into the leftmost flipflop during the shift. The serial output is taken

from the output of the rightmost flip flop.


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REGISTER GESER BEBAN SERI


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Register with Parallel load

If all bits of the register are loaded

simultaneously with a common clock pulse, we

say that the loading is done in parallel

When we want some registers remainunchanged (even with clock changes) we can

use a load control input (see the next slide)

The load input determines whether the next

pulse will accept new information or leave the

information in the register intact.


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Serial Transfer

The difference between serial transfer and parallel

transfer is:

In the parallel mode information is available from

all bits of register and all bits can be transferredsimultaneously during one clock pulse.

In the serial mode, the registers have a single

serial input and a single serial output. The

information is transferred one bit at a time while

registers are shifted in the same direction


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Serial Transfer For example next slide shows the serial transfer

from register A to register B by using shift register To prevent the loss of information stored in the

source register the serial output of A is connectedto its serial input

The shift control input determines when and howmany times the register are shift. Here eachregister has four bits and each rising edge of thepulse cause a one bit shift in each register. For a

fixed time of four clock pulses the content of A istransferred into B, while the contents of Aremains unchanged.


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Register Geser Universal


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Mode

Operasi

Masukan keluaran

CLK CLR S1 So DSR DSL Dn Qo Q1 Q2 Q3

Clear X L X X X X X L L L L

Tetap X H 1* 1* X X X qo q1 q2 Q3

Geser kiri H

H

h

h

1*

1*

X

X

1*

h

X

X

q1

Q1

q2

q1

q3

q1

L

H

Geser kenan HH 1*1* hH 1*h XX XX LH qoqo q1q1 q2q2

Beban

Paralel

H h h X X dn do d1 d2 d3

Tabel fungsi Register geser 74194

H = level tegangan tinggih = level tegangan tinggi sesaat sebelum transisi detak R ke T

L = level tegangan rendah

1 = level tegangan rendah sesaat sebelum transisi detak R ke T

dn(qn) = menyatakan keadaan masukan(keluaran) sesaat sebelum transisi detak R ke T


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Register Rev

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