Refresher course in transistor circuits

Dr N HarrisSchool of Electronics and Computer Science

(Based on notes by Dr Neil Ross for ELEC2012And me for ELEC1005 if you want more detail)

Course Contents and Aims

Brief Revision of Bipolar Transistors Brief Revision of Field Effect Transistors Common configurations Biasing Small signal analysis Useful analog techniques

Differential amplifer Current mirrors Active loads

Op Amps (whats in them) Multipliers Assignment

Aim: To refresh your understanding of transistors and basic uses,and how to simulate circuits

The aim is to understand things like this

You will require Spice to do the assignment

Spice is a circuit simulation package Available from many different sources A good free one is available from Linear Technology

Its called LTSpice Get it from here

http://www.linear.com/designtools/software/

Other Spice is available on departmental computers egOrcad/Cadence

Bipolar transistors

C

B

E

C

B

E

n

p

n

p

n

p

Familiar?

But what is really happening inside?

Lets try and find out!

Notice that the construction of the transistor looks like 2 diodes back toback.

Its made of n and p doped silicon.

We start by looking at a pn diode:-

Ideal PN Diode

Defined by the diode equation

= 1kT

Vq

S eII

Is is called the saturation current of the diode.V is the applied voltageq is the charge on an electron - 1.6 x10-19Ck is the Boltzmann constant 1.38 x 10-23J/KT is the absolute temperature

= 1kT

Vq

S eII

kT/q = 25.3mV @ 20 degrees C = 25.8mV @ 27 degrees C Often a value of 25mV is assumed for numerical convenience

Is itself is very temperature dependant

A typical value for Is is 10-14 A at room temperature.

Diode Curve

1mA

2mA

0.64V

50mV

10-14 A

I

V

= 1kT

Vq

S eII

The slope at any point represents a conductance,(1/R). As the slope varies, we term this a dynamicconductance. The inverse of this is a dynamic resistance

A bit about Notation

Large Signal (DC) Capital letters eg IC DC collector current

Small Signal (AC) Lower case letters eg ic AC collector current

Instantaneous total signal Combination eg Ic

Useful as transistor circuits are analysed in 2 chunks

Bipolar Transistors - definitions

N NPiE

iBiC

Emitter Collector

Base

P PNiE

iBiC

Emitter Collector

Base

B

C

E

vBC

vBE vBE

iC

iBiBiE

vBC

C

E

BiC

iE

NPN PNP

N NPiE

iBiC

Emitter Collector

Base

P PNiE

iBiC

Emitter Collector

Base

B

C

E

vBC

vBE vBE

iC

iBiBiE

vBC

C

E

BiC

iE

NPN PNP

Direction of Conventional Current (holes)(Electrons go The other way)

Bipolar Transistors - definitions

Main points to remember The transistor can be thought

of a current source. The collector current is independent of collector-base voltage

The emitter current is controlled by the base-emitter voltage

The emitter current and the collector current are nearly the same (base current small)

Collector current is therefore controlled by the base-emitter voltage

So what?

+ +

R

Add a load resistor

A small voltage change Vi between emitter and base causes a current changeIE. If all this current passes to the collector, then the output voltage changesby IE.R. Basically it is controlled by R (within reason!)

Specifically, A=Vo/Vi=(R IE)/(r IE )=R/r where r is the dynamic resistance of the base-emitter junction and is usually low (1000s of ohms), but sadly, as its dynamic,changes its value with applied voltage (so not linear)

E

B

C

P N P

Transistor

This is the basis of transistor action. Power gain has been achieved as the voltage is increased although the current hasnt changed much.(VI is bigger)

Current in the low resistance input circuit has been transferred to the high resistance output circuit.

Transistor= transfer resistor

However, not all the current gets from the emitter to the collector. Some is lost in the base due to

recombination. is the fraction of the emitter current reaching the collector. Usually quite close to 1

IE IC

IB++

EB junction CB junctionReverse biasForward bias

Conventional current

relates to the fraction that is lost. can be a large number and is very useful

IE IC

IB++

EB junction CB junctionReverse biasForward bias

P PN

What about a NPN device?

Best considered with Electron Current (go the other way to conventional current - holes)

IE IC

IB+ +

BE junction CB junctionReverse biasForward bias

N P N

The bias potentials are the other way round, and the flow shows themajority carriers (in this case electrons)

What about a NPN device?

Now considered with Conventional Current (holes)

IE IC

IB+ +

BE junction CB junctionReverse biasForward bias

N P N

Can be considered that IC and IB go in and add up to IE

Can be thought of as a current controlled valve

Base current can be used to program a collector current

The fraction of the emitter current flowing in the collector is called the alpha () of the transistor

is called the common base current gain < 1, but 1-

A bit more on Beta from Kirchoff

C

CCECB

ECB

i

iiiii

iii

=

+==

=++

1

0

Therefore

=

=

1BC

ii

Which is sometimes called hfe

Beta (cont)

Note also that

+

=

1Beta is called the common emitter current gainIt is one of the main manifestations of gain in the transistor.Eg if =0.99, beta=0.99/(1-0.99)=99For every microamp of base current, we get 99 microamps of collector current

It is a current amplifier

iC=iBVery Important!

Common Emitter cct-Base circuit

IB

VBE

(A)

102030

0.5 1

VCE>1VB

EvBE

iC

iBiE

C

VBE

VCERL

Lets wire up a transistor and have a look.

We have an input circuit (base) and an output circuit (collector) with a common emitter. The input looks like a diode (as expected)

Emitter circuitIC

1234

1 2 3 4 5VCE

mA

iB=10A

iB=20A

iB=30A

iB=40AActive Region

Saturation Region

B

EvBE

iC

iBiE

C

VBE

VCERL

The output looks like a constant current source, but dependent on ib

(Remember transistor action)

Current gain (or F)

Maximum value of is at 10-20 mA for discrete transistors and 0.05-0.5 mA for IC transistors

IC

1234

1 2 3 4 5VCE

mA

iB=10A

iB=20A

iB=30A

iB=40AActive Region

Saturation Region

The Early voltage

Vea

Collector voltage has a small effect on collector current. Width of Base reduces, collector current increases (Vea~70V).

Transistor characteristics

Notice non-linearity with input voltage

Generic FET operation

The generic FET can be considered to be a semiconducting material with a connection at either end (Drain and Source), with its resistance modulated by the electric field applied perpendicularly at the gate.

It can also be considered as a long PN junction, with lateral conduction, so the depletion zone increases as you cross the device

NS D

Field P

V

Depletion Zone

Types of Field Effect Transistors

Junction Field Effect transistor (JFET) Important in historical development

Not used much these days

Metal Oxide Semiconductor FET (MOSFET) Mostly used for logic circuits

Also used for power circuits (Power MOSFET)

Increasingly used for Analogue IC design in CMOS processes along with Digital IC

FET operation

In both the JFET and MOSFET, the operation is basically the same.

The number of carriers in a conducting channel is controlled by a lateral gate

The details of operation are quite different in both cases but they are both operating effectively as variable resistors

MOSFET structure

Consider an n-channel device:

N+ N+

P

PolysiliconOxide

B

S G D

Channel

DS

G B

D

S

G B

D

S

G B

D

S

G B

N depletion N enhancement

P depletion P enhancement

MOSFET Schematic Symbols

Notes on MOSFETs

The MOSFET is a 4 terminal device, not three.

For discrete devices, the substrate (B) is normally connected to the source to effectively give a three terminal device

MOSFETs can be of two forms: depletion : conducting when VGS=0

enhancement : non-conducting when VGS=0

ID

VDS

Region 1 Region 2

VGS increasing

VT+1

VT+2

VT+3

VT+4

DC characteristics of FETs

Fortunately, we can use the same basic model for both types of device.

n-channel device

Note: for depletion device: VT < 0for enhancement device: VT > 0

Saturation region

Linear region

IC

1234

1 2 3 4 5VCE

mA

iB=10A

iB=20A

iB=30A

iB=40AActive Region

Saturation Region

Compare with bipolar

ID

VGS

Region 2i.e. VDS large

VTD VTE

Depletion DeviceJFET or MOSFET

Enhancement MOSTonly

VT is the threshold voltage.

The voltage at which the devicestarts to conduct

FET Input Curves they are quadratic, not exponential

IC

VCE

IB increasing

IC

VBE

VCE large

Compare with bipolar

DC Characteristics of FETS

Region (1) is much smaller in bipolar device (

DC Characteristics of FETS

Bipolar is an enhancement type device (in FET terms)

Negligible gate current flows for FETS Note different terminology for saturation for the two types of device

Mathematical Description

In region (2), beyond pinchoff,

This is only valid for VGS-VT 0 ie VGS VTAlso only valid for VDS VGS-VT ie region 2 Notice that we have two parameters to describe the FET, K and VT.

( )22 TGSD

VVKI =VDS

Region 1 Region 2

VGS increasing

VT+1

VT+2

VT+3

VT+4

VDS

Region 1 Region 2

VGS increasing

VT+1

VT+2

VT+3

VT+4

Mathematical Description

VT is called the threshold voltage K has the dimensions A/V2 and is called the device constant or beta of the device.

For the MOSFET the parameter is called KP

For a JFET the parameter is called BETA

We avoid using the term beta in this context to remove the possibility of confusion with bipolar.

Mathematical Description

In region (1), we have a different equation

K and VT are the same as before. We still have the restriction VGS-VT 0 This time the restriction on VDS is 0 VDSVGS-VT

( )

=

2.

DSTGSDSD

VVVVKI

VDS

Region 1 Region 2

VGS increasing

VT+1

VT+2

VT+3

VT+4

VDS

Region 1 Region 2

VGS increasing

VT+1

VT+2

VT+3

VT+4

Basic transistor circuits

Emitter is common to input and output

Basic transistor circuits

Collector is common to input and output

Basic transistor circuits

Base is common to input and output

Consider the Common Emitter configuration -Transfer Function for DC

vBE

iC

iB VCE=Vout

RL

vS

RS

VCC

vout

vinvB

0.6V

SRLRSlope =

Example using Pspice

So how do we use this as an amplifier? The Problem

We want to amplify a small signal We cannot apply it direct to our amplifier Why?

RL

vin

RS

vout

vout

vinvB

Applying an AC signal results in different outputsDepending on bias (or offset)

Input signals

Output signals

Basic Biassing

For AC we can couple through a capacitor

RL

vin

vout

RB

C

LCCCOUT

BC

B

BECCB

RIVVII

RVV

I

=

=

=

Let Vin = 0

Now apply VinTransistor is already in the active region

A small bias current always flows through RB

Simple bias circuit more detailAssume VBE = 0.6 V

B

C

B

CCCout

CB

CCCCCCQCCout

BQCQ

B

CCBQ

BBCC

RR

RRVV

RR

VVRIVV

IIR

VI

RIV

6.01

6.0

6.06.0

+

=

==

=

=

+=

Q-point depends on the value of - not very good!

RL

vin

vout

RB

C

Simple bias circuit

=100 =50

Traditional Preferred Bias Technique (Emitter biasing)

R1 and R2 form a potential divider providing a fixed VBVB becomes VBE+IERE

RE provides a form of negative feedback. As IE increases, IERE increases,and VBE falls, which results in IERE falling as well

DC Analysis (Quiescent Point)

1) Replace R1 and R2 by the Thevenin equivalent

RLCC2

VCC

RE

RTH

VTH

VOUT

RTH=R1//R2And VTH=VCC R2/(R1+R2)

TH

BTHB R

VVI =

We also make the assumption

( )( )( )

( )( )

( ) EBETH

ETH

BETHBC

ETH

BETHB

BETHETHB

EBBTHTHBE

THBTHB

RVV

RRVV

II

RRVV

I

VVRRIRIIRVV

RIVV

++

==

++

=

=++

+=

=

1

1

11

TH

BTHB R

VVI =From

BEEB VVV =From

Small compared with

Hence IC is largely independent of

=

B

CCC R

VI 6.0Compared to simple method

Improved bias circuit

Improved bias circuit

=100 =50

Small signal Models

Having biased the transistor, we need to know the gain for our signalsof interest.

Small signal model is used. It only works for small signals, as thesmall signal model assumes a straight line fit to the transistor curvesi.e it is linearised around the operating point.

Small signal analysis is very important, particularly for designing andunderstanding IC design techniques.

Its all about trying to make a non-linear expression linear.

This makes analysing it much easier as we can use the common andwell known techniques of network theory, such as superposition, and Norton and Thevenin theorems.

Transistor Curves (What is the gain for a small signal?)

vBE

iBVBE Slope=1/r

vBE

iCVBE Slope=gm

Base Collector

BC II =RememberWe assume a straight line atthe Q point, as shown.The output current looks likeas shown in the second graph

We can see why there is no gain for low iB. A large variation in VBEproduces very little variation in iC.

kTqv

SC

BE

eIi =

BE

C

dvdi

Now

And the slope is given by

vBE

iCVBE Slope=gm

But we know that we are operating at the quiescent pointso we set the ac or small signal to zero as

cCC iIi +=and ic=0, therefore iC=IC

Note that gm is different depending on where you are on the curve.

We need the slope at the operating point

Total current = DC + AC

And so the top equation applies

So

kTqI

eIkTq

dvedI

dvdi CkT

qV

S

IiBE

kTqv

S

IiBE

CBE

Cc

BE

Cc

===

=

=

BecausekT

qV

SC

BE

eII =

This is the slope at the Q point and is therefore the mutual conductance

m

C gkTqI

=

Basically the diode equation

This is the definition of DC current

Note only dependent on DC conditions

Refer back to the base

BC II =Remembering Therefore the input slope isr

gkTqI

slope mC 11 ===

vBE

iBVBE Slope=1/r

Giving the input resistance r as

pi

r

gr

m

==

Basic Hybrid PI Modelb c

gmvbe

e

rp

m

Cm

gr

qkTI

g

pi =

=

Basis of small signal analysis ignores the DC conditions

Note that small in this case means less than 25mV

It is the same as this -

b c

hfeib

e

rp

ib

bbmbem

beb

iirgvgvri

pipi

=

feh

The difference is that in this case,the output makes use of a currentdependent generator rather than a voltage dependent one.

Small Signal FET model

In region (2), FETS behave like a voltage controlled current source, just like a bipolar.

Therefore we can use the same small signal equivalent circuit:

gmvgs

vg

g d

sNote that because there is no gateCurrent, rpi disappears

Gm is much lower in FETs

High frequency Hybrid pi model

Rx is the spreading resistance (~150)

The capacitances lead to non-ideal performance (high frequency limitations)

Application of the Small signal model Consider our simple common emitter cct with simple biasing

What is the small signal gain?

VCC=5RB=820KohmRC=2.2Kohm =200

VBE=0.6V

Common Emitter Amplifier

Determine the DC bias condition

( )

V

RVVRV

RIVV

mAR

VVI

AR

VVI

B

BECCCCC

CBCCC

B

BECCC

B

BECCB

64.236.25

07.1

36.5

=

=

=

=

=

=

=

=

VCC=5RB=820KohmRC=2.2Kohm =200

VBE=0.6V

Calculate the components in the hybrid pi model

kg

r

mSq

kTI

g

m

Cm

65.4

432507.1

==

===

pi

Now draw small signal equivalent circuit

Power supplies s/cat signal frequency.We are performing a superposition analysisso suppress all sourcesexcept the one we areinterested in. Voltage sources go short circuit

Coupling Capacitor

Coupling Capacitor

Make it look better

Get rid of capacitors!

Csm

Cbemo

RvgRvgv

=

=

6.94=

== CmS

oV Rg

v

vA

( )

CL

LCm

s

l

CLbeml

RRRR

gv

v

RRvgv

+=

=

With RL disconnected, vl=-gmRCvs

What happens if we add a load

Bias conditions unaffected

Csm

Cbemo

RvgRvgv

=

=

6.94=

== CmS

oV Rg

v

vA

Let RL be 10Kohm

RL

LCsm

LCbemo

RRvg

RRvgv

=

=

77=

== LCmS

oV RRg

v

vA

Gain is reduced. Loading effects of amplifiers are important as we shall see

Summary

We know the importance of biassing the transistor

Having biased the transistor, we need to know the gain for our signalsof interest.

Small signal model is used. It only works for small signals, as thesmall signal model assumes a straight line fit to the transistor curvesi.e it is linearised around the operating point

We have looked at small signals as applied to the basic biassing circuitand we have seen that it becomes easy to calculate the gain for small(

We want a better biassing technique. This is emitter biassing

What effect does RE have on the gain? A small signal circuit should help usanalyse this circuit easily.

Small Signal Equivalent Circuit

m

Cm

gr

qkT

Ig

pi =

=

Power supply is grounded for signals

We can replace the bias resistors R1 and R2 with RTH

Cbemout Rvgv =

But we need to establish vbe

We can see instantly that

This is not so obvious as REis in both the input and outputloop

We notice that the current through RE comprises of an element from the input circuit (ib) and gmvbe, and that the input circuit current is equivalent of vbe/rpiDefining 1/rpi as gpi ,we can see that

( )( )

( )

( ) EminCm

out

Em

inbe

EmbebeEbein

EEmbe

RggvRg

v

Rggv

v

RggvvvvvvRggv

pi

pi

pi

pi

++

=

++=

++=+=

=+

1

1

Cbemout Rvgv =As

EC

in

out

mEm

RR

v

v

thenggandRg

>>>> pi1

But if

( ) EminCm

out RggvRg

vpi++

=

1

Hence we do not get the gain we want (-gmRC) but a much lower gain, -RC/RE

Therefore

How can we get gain but use the better biasing?

Separate the DC and the AC circuit performance

Think of a way to eliminate the emitter resistor at signal frequencies

Use a capacitor in parallel to the emitter resistor!

Bypassed Emitter Resistor

Capacitor

Worked example

2kCC2

VCC=6

1k

40k

20k

CC1VIN

VOUT

CE

=100

VBE=0.7

What is the voltage gain of this circuit, with and without CE

First calculate IQ

( )mA14.1

1013.137.02100

=

+

==

kkII CQ

( )( ) ETH

BETHBC RR

VVII

++

==

1

2kCC2

VCC=6

1k

40k

20k

CC1VIN

VOUT

CE

=100

VBE=0.7

For the input circuit, VTH=2V and RTH=40k//20k=13.3kohm

Therefore

From

( ) VkmAVCQ 7.3214.16 ==

Calculate gm and Rpi

kg

r

mSq

kTIg

m

Cm

2.21046

100

4610251014.1

3

3

3

=

==

=

==

pi

( ) ( ) 94.1146.0461246

1=

++

=

++

=

kmSmSkmS

RggRg

v

v

Em

Cm

in

out

pi

With emitter resistor(no capacitor)

Low gain

Include CE

2kCC2

VCC=6

1k

40k

20k

CC1VIN

VOUT

CE

=100

VBE=0.7

When we include CE, we can see that intuitively REtends towards zero as the capacitor acts as a short circuit

92== Cmin

out Rgv

vTherefore

Common emitter amplifier

C1 and C2 are for AC coupling (DC blocking)

CE decouples the emitter (i.e low impedance to ground for AC signals)

The above are usually assumed to be open circuit for DC analysis

Small signal analysis determines gain, bandwidth etc.

So now we know what all the bits do!

Mid-band frequency response

In mid-band, gain is independent of frequency

Coupling capacitors have negligible impedance

Internal capacitances are not significant

1. Coupling and de-coupling capacitors become short circuit

2. Internal capacitances are ignored

3. DC supplies replaced with short circuits

Input and output impedances for a CE Amplifier

The input impedance, Rin, is the impedance seen looking into the input terminals

i.e. the ratio of input voltage to input current.

It is rpi for a CE amplifier

The output impedance, Rout, is the Norton or Thevenin impedance of the output circuit.

Using the hybrid pi model, the output circuit is a Norton equivalent (current source in parallel with a resistance). In the simplified model the current source is treated as ideal and so has infinite output impedance, thus RL is the only resistance seen.

It is RLfor a CE amplifier

Now lets look at the Emitter follower, or common collector

Circuit Small signal equivalent

i

Notice the introduction of r0,the output impedance of thetransistor

Analysis of emitter follower

Ebbb

Ebb

i

o

m

biEmbob

RiiriRii

VV

rgVriVRVgiVriV

)()(

)(,)(,

pi

pi

pipipipi

++

+=

=

+=+==

E

E

i

o

RrR

VV

)1()1(

pi ++

+=

1

)1(If

>>+

i

o

E

VV

rR pi

Ro is neglected

Input and output impedances

b

Ebb

b

iin i

RiriiVZ )1( pi ++==

Ein RrZ )1( pi ++=

21

21''

'

'

''

,

with parallelin is , impedance,input Actual

RRRRR

RZRZ

Z

RZZ

in

inin

inin

+=

+=

Input and output impedances

)1()1()1(

)1()1(

gives gRearrangin

)1()1( ,)1()1(

circuit)short (Output circuit)open (Output

pi

pi

pi

pipi

+

++

+=

++

+=

+=+=

+=+=

==

iE

Eiout

E

Eioc

ociEEoc

isc

sc

oc

o

o

out

Vr

RrRV

Z

RrRVV

r

VVRiRV

r

Vii

iV

iV

Z

pi

pi

pi

+

++=

1)1(r

RrrR

ZE

Eout

Summary of emitter follower Voltage gain equals 1 (if is large) Current gain is

Input impedance is large

Output impedance is small

E

E

i

o

RrR

VV

)1()1(

pi ++

+=

Ein RrZ )1( pi ++=

pi

pi

pi

+

++=

1)1(r

RrrR

ZE

Eout

Comparison of CC with CE

Things to think about

Although the basic configurations give ussome useful amplifiers, they are not ideal

Major drawbacks include Cannot accept DC signals due to coupling capacitors

Biasing resistors lead to low input impedance

Necessary improvements

We would like to have a high gain amplifier that can operate at DC

We would like a high input impedance to avoid loading effects

We would like to integrate these features into a single chip Big resistors dont integrate well Integrated transistors can be well matched (vital for DC systems)

This leads us to the Op-Amp

What do we need for an Op-Amp

Very high input impedance (virtual earth) Very low output resistance (no loading) Very high voltage gain (so we can apply feedback)

Very wide bandwidth, including DC Vout = 0 when V1=V2 irrespective of the magnitude of V1(flexible input conditions)(Equivalent of saying Vout=0 when Vin=0)

So whats in an Op Amp

Differential input stage Voltage gain stage Output stage

All DC coupled

How to operate at DC

We cant have coupling capacitors Direct coupling

We introduced these to allow biasing resistors

However, direct connection will give us biassing issues

Alternative way of biassing

We need to provide a finite IC We did this by pushing a known IB into the transistor

We could just pull a known current through the collector By placing a current source in the emitter

Unfortunately this stops the transistor amplifying as it now has a constant current flowing though it Transistor action requires the collector current to be varied by the transistor now not possible!

Think about this a bit more

A ideal current source has infinite resistance

A practical current source has a large, but finite resistance

In terms of AC (small signal), a current source will appear as this resistance

We could use this feature to make alarge resistor for AC

Therefore, care has to be taken in the assumptions made when modelling.

Going back to our example

In terms of gain, the CE amplifier has a value of -RC/RE

In this case RE is infinite Therefore the gain tends to zero Even if we include a non-infinite resistance, the gain is still nearly zero

If we swap RC and I over, the gain gets very large in principle (more later)

Lets persevere with this arrangement.as it has some advantages

We can solve this problem by introducing a second transistor in a parallel arrangement to the first

Now we have scope to allow the collector currents to vary as when one goes down, the other can go up to compensate, thus still allowing a constant IE It is constrained by the fact that the two collector currents must add up to the value of the emitter current source

Long tailed pair (LTP)

Current source maybe replaced by a resistor

A very useful basic amplifier stage.

The gain block used in most analogue ICs

When both inputs change levels together common mode signal

Amplifies difference between input levels

Transistors must be matched, i.e. have the same parameter values, etc.

Long tailed pair

The differential input voltage is given by

21 BBdin VVv =

The common mode input voltage is given by

( ) 2/21 BBcin VVV +=

If the transistors are well matched

CCCCC

ECCC

RIVV

IIII

=

===

and

221

This is the average offset voltage of the input.

From the diagram above

The effective DC inputis the VBE of each transistorwhich is the average of thetotal input.

Superimposed on top of

this is the differential input

Simulated responseI am sweeping V1 whilst holding V3 constant

This is the large signal response.

Notice the non-linearity.

Notice the input voltage range is low

Small signal analysis

rpi rpi

g vm pi1 g vm pi2

RC RC

RE

vb1 vb2vc1 vc2

ve

vvpi1 pi2

Assume that the emitter current source has a dynamic resistance of RE (could be a resistor of this value).

LTP analysis

222121

2121

cccout

bbcin

ccdoutbbdin

vvv

vvv

vvvvvv

+=

+=

==

For a pure differential signal, vb1 = -vb2 therefore ve=0 (half way between the 2 input potentials)

For a pure differential signal, the increase in current in Q1 equals the decrease of current in Q2. Hence, there is no change in emitter voltage, ve = 0 as no overall change in current

Thus the emitter point is at ground potential (for small signal analysis) and the two halves of the amplifier can be considered separately and RE can be ignored

rpi rpi

g vm pi1 g vm pi2

RC RC

RE

vb1 vb2vc1 vc2

ve

vvpi1 pi2

LTP analysis

The gain of each transistor is just -gmRC and for a pure differential signal:

dinCm

bCmbCm

ccdout

vRg

vRgvRg

vvv

=

+=

=

21

21

Thus the differential voltage gain is given by

Cmdin

doutd Rgv

vA ==

LTP common mode inputFor pure common mode input vb1=vb2, and by symmetry vc1=vc2.

The two transistors are in parallel and can be considered as one device with forward transconductance 2gm and input resistance rpi ( is unchanged), with the collector resistor halved as they are in parallel.

If >>1, so gm>>gpi

E

CC R

RA21

With no loss of generality we can imagine the bases and collectors joined. (No current will flow, they are at the same potential).

Hence, for pure common mode signal, the circuit behaves like a CE stage with unbypassed emitter resistor RE.

( ) EmC

m

Cin

out

Rgg

RgA

v

v

pi22122

++

==

rpi rpi

g vm pi1 g vm pi2

RC RC

RE

vb1 vb2vc1 vc2

ve

vvpi1 pi2

( )amplifier CE for the1

FromEm

inCmout Rgg

vRgv

pi++

=

Summary of the LTP

It provides a differential input (and output if required) with a large differential gain and small common mode gain.

If the transistors are well matched, changes in VBE due to temperature appear as a common mode voltage. Hence the amplification of thermally induced voltages is small. This makes the LTP suitable as a DC amplifier.

Can be implemented in 2 ways..

Ones uses NPN and the other uses PNP.

Both give effectively the same result

Note the difference output

is the same

So how do we generate

our current source?

CURRENT MIRRORS

These are useful building block circuits. The idea is that a current is supplied to the input of the mirror and an identical current flows in the output circuit, irrespective of the secondary voltage.

In an extension of this concept current mirrors may be designed that provide an output current which is a multiple of the input current. Current mirrors are useful for biassing, and creating large dynamic impedances.

The simple current mirrorini oi

Q Q1 2

Assume the transistors are identical. Since the base emitter voltages are the same

21 CC II =hence,

ino II =

Current mirrors

Q1 is connected as a diode

Q1 and Q2 are matched ~ almost identical device properties

is large

+

=

2iO

II

11

2 (2+)

io II

Several transistors may be used to give several independent current sources. Their values will be equal if the transistors are identical.

Ratios other than unity may be obtained by varying the area of the transistors.

It is the current density which is determined by VBE. Hence the current in each transistor is proportional to its area

One current mirror may have several outputs with different current ratios. Useful for setting bias currents.

ini o1i

Q Q1 2

o2i

3Q

Improved current mirror

1 1

2

+

++=

++=

12

12

2

i

i

I

I

( ) 12

12 ++

+=

i

o

II

+ 12 ( )

+=

+=

12

12

b

b

i

i

Wilson current mirror

1 1

2+

+

+

12

+

+=

+

++=

1212

2

o

i

I

I

222

2

2

++

+=

i

o

II

Improved current ratio

Improved output impedance

Q2 (diode) adds feedback

The Active Load

The voltage gain of a simple CE amplifier depends on the gm of the transistor and the collector load resistance.

To increase the gain it is necessary to increase gm (increase the current) or increase RC. The maximum value of the product of the collector current and the load resistance is clearly limited by the supply voltage.

One way to avoid the restriction is to use a current source, as we have seen that these have large dynamic output impedance (RC).When considering very high load resistances, we also need to remember that the collector characteristics of a CE amplifier are also that of a current source ie very high. Its value is related to the Early voltage ie the slope of the IC/VCE characteristic in the active area

The gain is given by

The maximum gain is now limited by the output resistance of the transistor.

( )ComV RrgA //=Ci

Q

Vcc

LTP with active loadA current mirror is often used to provide an active load for a long tailed pair, and convert the differential output to single ended.

The active load

1) increases the single ended gain for differential input

2) reduces the single ended output for common mode input (improves CMRR)

Note this is the other way up

Compares to 741. Makes overall biassing easier

The other side of the current mirroris a diode. This has a low dynamicimpedance. We cannot just use currentsources because the collector currenton one side needs to vary. Decreasing the input toQ1 results in a decrease in current through diodeQ3. This is mirrored in Q4. However Q2 is asking formore current, and the excess is forced through the load.Voltage gain is lower on the Q1/Q3side, hence the singled sided operation.

Gain Stage Darlington connection

By connecting the emitter of one transistor directly to the base of the next, a very high gain amplifier is created

Can be considered as 2 cascaded emitter followers with infinite emitter resistance in the first stage

1

1+

(1+)

(1+)(1+)

Current gain is effectively 2

Output stage

We want to minimise quiescent current We want low output resistance We need to drive useful current

Complementary emitter follower

(Class B output stage)

Emitter follower (common collector)has a low output impedance.

Also has a voltage gain of 1ie no gain, but has a high currentgain.

This is fine as the previous 2 stageshave given us high voltage gain.

Cross-over distortion

Vi must exceed +0.6V for Q1 to turn on,or be less than -0.6V for Q2 to turn on.

If an offset voltage is applied at the input, linearity is greatly improved.

The maximum efficiency of a class B amplifier with sine wave drive is 78.6%.

Practical class B circuit (actually class AB)

The classic circuit

Vin

Vee

RL

I1

D2

Q2

Q1

D1

Vcc

Q3

The diodes D1 and D2 provide the offset together with the current in Q3. The diodes may be diode connected transistors.

Q3 can be the gain stage.

Once again as Vin is increased,the current tries to increase. I1resists this and so VCE has to rise.The diode voltage doesnt alter, allowing low distortion operation.

741 op-amp

Simplified op-amp schematic

Net result:

Operation down to DC Extremely high gain (100,000 or more) Resistance to common mode signals

Makes it insensitive to temperature

0 v in gives 0 v out High input impedance, low output impedance Ideal for feedback

Feedback allows amplifier characteristics to be ignored!

Analogue Multiplier (2 quadrant)

One use of the LTP is as a multiplier gm is defined by the bias current and is linear

If we can modulate the bias current we can vary the gain!

The LTP again

dinCm

bCmbCm

ccdout

vRg

vRgvRg

vvv

=

+=

=

21

21

T

CCm V

IkTqIg ==

Let 2IC=IE (ie biassed equally)

CdinT

Eout

EC

CdinT

Cout

RVVIVII

RVVIV

22 Now ==

=

So Vout is proportional to IE x Vdin (a current multiplied by a voltage)

The LTP again

RVVI BEiE

=2

RVI iE 2=

So lets put a voltage to current converterin the tail. We can use a current mirror.

R

Vi2

-VEE

As it will be the current through R ifthe mirror is perfect.

We can imagine a set of conditionswhere Vi2>>VBE and so

diniout

CdinT

iout

CdinT

Eout

VVV

RVRV

VV

RVVIV

2

2

So2

So

2 Now

=

=

Another use

Notice that if we drive Vi2 from a variable DC source we can make a voltage controlled amplifier

Can also be used as a modulator (but only for positive signals!)

Limitations

Vdin has to be small due to small signal model use Vi2 can only be positive, as bias current always has to

flow

This is called a 2 quadrant multiplier:-

Vi2

Vdin

LTspice implementation

Varying V4 and V5.

The slope gives the gain.

Note the change in gain for changing V5 (Tail current)

The gain is the slope of thelines below.

Also note differentialsymmetry, but that the V5voltage needs to be positive to keep the tailcurrent positive

Also note non-linearity!

One potential use - modulator

V4 is a high frequency sine wave (Carrier)

V5 is a low frequency sine wave (Modulation)

The multiplier allows the low frequencyto be superimposed upon a carrier.

Amplitude modulation

V5 is changing thegain of the amplifiersinusoidally

Revisit the LTP

Remember one of its limitations is that it is only linear for small signals.

It is well known that feedback can improve linearity (Remember CE biassing?)

Can we apply feedback to our LTP to improve its linear range?

Emitter degeneration If we add a resistor in the emitter of our LTP we can

improves things

In this example we set the tail current to 1mA By changing the value of {Res} we can see we reduce

the gain but we increase the linear range

How does this work?

For the LTP, a Large signal analysis shows that (part of the assignment)

Where VID=VBE2-VBE1 Which is only linear when VID/2VT

Add a resistor By adding a resistor we reduce the value of VBE for a given input

voltage

VBE2 VBE1

IR IR

IRVVIRVV

IRIRVVV

DINID

IDDIN

BEBEDIN

=+=

++=

22

12

=

=

T

DIN

T

IDC V

IRVIV

VII2

2tanh2

2tanh2 00

RIV

VIRifIRVIRVV

VIRVV

IRVV

IRVIV

IRVII

MAXDIN

TDIN

TDIN

TDIN

T

DIN

T

DIN

T

DINC

0)(

00

22222

22ie

12

2if

222

22

tanh2

+

=

=

>

Which is easy to make true

(For the case of a puredifferential mode signal weneed only consider differentialchanges in VBE and IR)

To show this, noticeI=2IC and substitute in above

Maximum I occurs when

I = I0 so max VDIN= I0R

As I0R is usually bigger than 2VT

I0

So for our circuit If we have a maximum I of +/-0.5 mA (Half the tail current), and a

resistor of 1K then VIN can now be +/-1V for a linear response (to a first approximation)

1K

+/-1V

General Assignment (Bipolar design)

Analyse a 4 quadrant bipolar multiplierwhich is linear, giving +/-10V outputs for +/-5V inputs.

The coursework is in stages You will need access to LTSpice or another circuit simulator.

Deliverables A short report (

Specific Tasks to be done

Perform a large signal analysis of the long tail pair and verify that

=

T

IDC V

VII2

tanh0

Relate this to the small signal analysis done in these notes and discuss the limitationsof the small signal performance ie what is the maximum signal that can be input forthe system to be linear

Enter and simulate the given circuit

You will have to enter a suitable simulation command, and identify theinputs and outputs

Analyse this and show that it is now a 4 quadrant multiplier

Verify, (and show working) that this circuit has a response of

=

T

ID

T

IDC V

VV

VII2

tanh2

tanh 210

And explain how this has removed the 2 quadrant problem.

Also say what the linear range of inputs are for this circuit.

You need now to extend the linear range

Show this linearises the top input by simulation

Include emitter degeneration in the bottom LTP

This should allow you to linearise the lower differential input across a range of your choice

Now adjust if necessary to meet the spec

Simulate this and calculate/choose values for voltages/currents/resistors thatshow the linear response for inputs of +/-5V with an output of +/- 10V.

There are extra marks for calculating these values instead of just trying values out

Now write a couple of paragraphs that critically evaluate the circuit

Assignment submission details Deadline is 8th January (first Tuesday back) Hand it in before you go if you are going to be late back

4:00 pm at the latest. ECS Coursework office. Report detailing your findings, showing the points described in previous slides.

Limit yourself to 6 pages

Web page has a summary of the assignment