Reconfigurable Hardware in Wearable Computing Nodes Christian Plessl 1 Rolf Enzler 2 Herbert Walder...

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Reconfigura Reconfigura ble ble Hardware in Hardware in Wearable Wearable Computing Computing Nodes Nodes Christian Plessl 1 Rolf Enzler 2 Herbert Walder 1 Jan Beutel 1 Marco Platzner 1 Lothar Thiele 1 1 Computer Engineering Lab 2 Electronics Lab ETH Zurich, Switzerland

Transcript of Reconfigurable Hardware in Wearable Computing Nodes Christian Plessl 1 Rolf Enzler 2 Herbert Walder...

Page 1: Reconfigurable Hardware in Wearable Computing Nodes Christian Plessl 1 Rolf Enzler 2 Herbert Walder 1 Jan Beutel 1 Marco Platzner 1 Lothar Thiele 1 1 Computer.

Reconfigurable Reconfigurable Hardware in Hardware in

Wearable Wearable Computing Computing

NodesNodes

Christian Plessl1

Rolf Enzler2

Herbert Walder1

Jan Beutel1

Marco Platzner1

Lothar Thiele1

1Computer Engineering Lab

2Electronics Lab

ETH Zurich, Switzerland

Page 2: Reconfigurable Hardware in Wearable Computing Nodes Christian Plessl 1 Rolf Enzler 2 Herbert Walder 1 Jan Beutel 1 Marco Platzner 1 Lothar Thiele 1 1 Computer.

OutlineOutline

Characteristics of Wearable Computers

Hardware architectures

Reconfigurable Devices

Use of Reconfigurable HW in Wearable Computing

Wearable Unit with Reconfigurable Modules (WURM)

Case studies, Prototypes

Conclusions

Page 3: Reconfigurable Hardware in Wearable Computing Nodes Christian Plessl 1 Rolf Enzler 2 Herbert Walder 1 Jan Beutel 1 Marco Platzner 1 Lothar Thiele 1 1 Computer.

Wearable Computing Systems…Wearable Computing Systems…… as we see it… as we see it

Distinctive Features: embedded distributed heterogeneous connected via body area

network

Design characteristics: multi-mode performance energy awareness high flexibility /

adaptability

Page 4: Reconfigurable Hardware in Wearable Computing Nodes Christian Plessl 1 Rolf Enzler 2 Herbert Walder 1 Jan Beutel 1 Marco Platzner 1 Lothar Thiele 1 1 Computer.

The Quest for an Optimal Architecture for The Quest for an Optimal Architecture for Wearable ComputersWearable Computers

Conflicting goals: high-performance low-power flexibility

Performance1/Power consumption

Flexibility

DSP

ASIC

CPU

RC

Page 5: Reconfigurable Hardware in Wearable Computing Nodes Christian Plessl 1 Rolf Enzler 2 Herbert Walder 1 Jan Beutel 1 Marco Platzner 1 Lothar Thiele 1 1 Computer.

Reconfigurable (RC) Devices - HardwareReconfigurable (RC) Devices - Hardware

Predominant device: FPGA

• CLBs (Configurable Logic Blocks)

• Routing Ressources

• IOBs (Input / Output Blocks)

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RC Devices – Application DomainsRC Devices – Application Domains

RC most efficient for: regular and parallelizable operations bit-level operations custom bitwidths

Examples: Mencer et al [ICASSP’98]: IDEA encryption:

Stitt et al [FCCM’02]: Energy savings of 71% on a set of embedded benchmarks (measured on Triscend E5)

Mobile multimedia (IMEC Gecko plattform)

Type Device Mbit/s Mbit/Ws

CPU StrongARM SA-110 32.0 32.0

DSP TI TMS320C6x 53.1 8.9

FPGA Xilinx XC4020XL 528.0 167.6

DSPCryptoCommunication

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Use for RC in Wearable ComputersUse for RC in Wearable Computers

ASIC on demand application specific coprocessors available locally, or sent via wireless network new circuits provided when new applications arise

Adaptive interfaces device provides generic I/O pins and transceivers protocol for communication is not fixed, but software

defined in FPGA Interface might be simple or complex

– SPI, I2C, Ethernet, RS232 (simple)– IP, UDP, TCP (complex)

Offload Parts of communication protocol handling

Page 8: Reconfigurable Hardware in Wearable Computing Nodes Christian Plessl 1 Rolf Enzler 2 Herbert Walder 1 Jan Beutel 1 Marco Platzner 1 Lothar Thiele 1 1 Computer.

Use for RC in Wearable Computers (2)Use for RC in Wearable Computers (2)

ADPCMCompression

Feature Extract-tion & Analysis

Arm motionsensing

Main Module

170 kbit/s

Main Module

3 bit/s

Main Module

120 bit/s

Harddisk Context Engine Context Engine

Gyro sensors

706 kbit/s I2C

Page 9: Reconfigurable Hardware in Wearable Computing Nodes Christian Plessl 1 Rolf Enzler 2 Herbert Walder 1 Jan Beutel 1 Marco Platzner 1 Lothar Thiele 1 1 Computer.

Research Issues – What’s neededResearch Issues – What’s needed

HW Plattforms: RC partially reconfigurable RC fast reconfigurable CPU – RC interface fast and versatile

SW Tools: Synthesis / compilation

– abstraction for hw tasks– creation of partially reconfigurable tasks

RC Operating System– multitasking of RC– interfaces hw/sw

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WURM - Wearable Unit with RC ModulesWURM - Wearable Unit with RC Modules

WURM Hardware Architecture CPU for:

–legacy C-code, binary only code–low-intensity, background tasks

RC unit for:–high-performance tasks–low-power tasks

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WURM - Hardware PrototypeWURM - Hardware Prototype

XESS board, multitude of I/O interfaces

Soft CPU (LEON, 32bit SPARC)

BTnode (custom Bluetooth Module)

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WURM - SW ArchitectureWURM - SW Architecture

WURM OS layer: loading, placing and scheduling of hw/sw tasks inter-task communication, task I/O sw tasks handled by realtime os

CPU RC

WURM-OS

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Case Study 1: ASIC on DemandCase Study 1: ASIC on Demand

Audio stream player

Complete WURM on FPGA LEON 32bit SPARC soft-CPU core RTEMS (real-time OS) ADPCM decoder (Intel DVI compliant)

Eth

erne

t

CPU(LEON core,

RTEMS)

PCM/ADPCMPlayer

FPGA

PCM / ADPCMaudio data

dynamic reconfiguration

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Case Study 2: Adaptive InterfaceCase Study 2: Adaptive Interface

Bluetooth/Ethernet-Bridge

IP access point for WURM modules via Bluetooth Minimal TCP/IP stack Ethernet MAC

BTnodeBluetoothmodule

((( )))Hard-

ware IP stack

RS232 EthernetIP

Network

IP Network

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Conclusions & Next StepsConclusions & Next Steps

Concept for reconfigurable hardware in wearable computing

Experimental status: first implementation of partially reconfigurable WURM

prototype including BTnode tool for creation of partially reconfigurable tasks multi-tasking on RC demonstrated

Next Steps: autonomous reconfiguration, receive tasks over

network task and resource management in WURM OS

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BackupBackup

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BTnodeBTnode