Rapid Controller Prototyping at the SUPSI...
Transcript of Rapid Controller Prototyping at the SUPSI...
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Rapid Controller Prototyping at the SUPSI laboratory
Prof. Roberto BucherSUPSI - ISEA – SMT
Manno 9.05.2014
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Outline
• The mechatronics laboratory at SUPSI• The SUPSI Rapid Control Prototyping System• Linux RT systems and other targets• The Computer Aided Control System Design environments• The CAN bus approach• Examples• Conclusions
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Introduction – SUPSI Labor Place
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The Control Design Loop
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The RCP system
• A general purpose PC• Different OS's with real-time features• Different CACSD environments including a code generator• Plants built on commercial CAN bus capable devices• A physical CAN bus interface
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The RCP system
CACSD: Matlab/SimulinkScicoslabScilab/xCosPython/gEDA
OS: Linux RTAILinux Preempt-RT
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The RCP system
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RCP methods
• Design of the controller in the CACSD environment (Matlab, Scilab, Scicoslab, Python)
• Hybrid (discrete controller, continous plant) simulation of the controller with the dynamic model of the plant
• Substitute the model of the plant with sensors and actuators blocks
• Substitute the scopes with RT scopes• Generate and compile the code• Verify the controller on the real plant
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RCP methods
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RCP methods
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The RT targets
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The Linux RTAI project
• Hard real-time extension to the Linux OS• Project from Dipartimento di Ingegneria Aerospaziale del Politecnico di Milano• SUPSI is involved in project since 2002 (first automatic generation of a kernel
task from a Simulink block diagram)• Free Open Source Software (FOSS) • Same PC for the controller design, for the hard real-time controller task and
for the soft real-time monitoring task• Hard real-time in kernel and user space• RTAI API• Distributed control through the net_rpc modul• Latency: < 15 µs on modern HW• Typical sampling frequencies: 1 ... 10 kHz
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RTAI projects
http://www.gb.nrao.edu/43m/
http://www.inrialpes.fr/sed
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RTAI projects
http://www.alma.nrao.edu/
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RTAILab
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RTAILab
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RTAILab
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RTAI-XML
http://www.rtaixml.net/realtime-suite
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RTAI-XML
http://www.rtaixml.net/realtime-suite
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The Linux Preempt-RT project
• Real-time extension to the Linux OS (Ingo Molnar - RedHat, Thomas Gleixner - Pengutronix)
• Free Open Source Software (FOSS) • Same PC for the controller design, for the real-time controller
task and for the monitoring task (browser)• real-time in user space• POSIX API• Latency: < 50 µs on modern HW• Typical sampling frequencies: 100 ... 1000 Hz• IBM - WebSphere Real Time (Java RT)
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Linux with preempt_rt
www.osadl.org
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XML Browser from Klaus Weichinger
http://bioe.sourceforge.net/
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Linux ARM systems (with rt_preempt patch)
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dsPIC
• C-Code• MPLABX project• dsPIC 33FJ64MC810• dsPIC 33FJ64MC804
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The CACSD Environments
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Matlab / Simulink / RTW
• Matlab for solving the control design algorithms• Simulink for hybrid simulation• Real Time Workshop for C-Code generation• Linux RTAI as RT target
– RTAI.tlc + RTAI.tmf developed at SUPSI with Dipartimento di Ingegneria Aerospaziale del Politecnico di Milano (DIAPM)
• Commercial licences! (quite expensive)
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Matlab/Simulink/RTW
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Matlab/Simulink/RTW
disksRT.cdisksRT.hdisksRT_data.c....
rtai.tmf
disksRT.mk
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Matlab/Simulink/RTW
disksRT.cdisksRT.hdisksRT_data.c....
rtai.tmf
disksRT.mk
Mathworks libs RTAI and custom libs
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Matlab/Simulink/RTW
disksRT.cdisksRT.hdisksRT_data.c....
rtai.tmf
disksRT.mk
Mathworks libs
RT standalone executable
RTAI and custom libs
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CACSD – Matlab / Simulink / RTW
• Matlab / Simulink are “de facto” THE TOOLS in education
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CACSD – Matlab / Simulink / RTW
• Matlab / Simulink are “de facto” THE TOOLS in education
• But...– What happens wenn our (ex-) students have to develop
advanced control systems in little companies?– Mathworks commercial licenses are too expensive for
most little companies!
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Scicoslab
• Developed by INRIA Rocquencourt• Fork of the scilab project• Scicos for hybrid simulation• Modelica extension (bond graphs)• Original code generator modified by Roberto Bucher for embedding
in target• Integration with Linux RTAI, Linux preempt_rt and dsPIC embedded
systems possible• Not open source but free
• Next version should be called NSP
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Scilab / xCos
• Developed by INRIA Rocquencourt• Xcos for hybrid simulation• Modelica• Original code generator modified by Roberto Bucher for
embedding in target• Integration with Linux RTAI and Linux preempt_rt possible
(CTI project 13910.1 PFIW-IW)• Cecill licence (like GPL licence)
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Scicoslab (or scilab+Xcos)
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Scicoslab (or scilab+Xcos)
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Scicoslab (or scilab+Xcos)
disksRT.c....
rtai.tmf
Makefile
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Scicoslab (or scilab+Xcos)
disksRT.c....
rtai.tmf
Makefile
Scicos libs RTAI and custom libs
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Scicoslab (or scilab+Xcos)
disksRT.c....
rtai.tmf
Makefile
Scicos libs
RT standalone executable
RTAI and custom libs
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Python
• Project started at Centrum Wiskunde & Informatica in the Netherlands (1989)
• Control Toolbox from Richard Murray (Caltech)• Additional functions from Roberto Bucher (SUPSI) for
– Correcting some bugs in Control Toolbox– Solving complex control tasks– Adding hybrid simulation– Code generation (Linux with preempt_rt now)
• Python Software Foundation License (PSFL) (like BSD)
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gEDA tools
• Open source tool for generating block diagram• Custom blocks are possible• From schematics it is possible to generate a netlist• A python tool translate the netlist into python blocks for code
generation (C-Code)
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Python / gEDA
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Python / gEDA
* Spice netlister for gnetlistDISP 2 4 3 nin:3,nout:0,printBlkSRV nin:0,nout:0,rtxmlServerBlk,Signals Plot1: 'Sig1 Sig2',Signals Plot 2: 'Sig1',Signals Plot 3: 'Sig2',Additional XML Par: '<PAR></PAR>',HTTP port: 3141OUTPOS 4 nin:1,nout:0,rtxmlSigBlk,Signals Name: 'Sig2',Default Value: 0.0OUTREF 2 nin:1,nout:0,rtxmlSigBlk,Signals Name: 'Sig1',Default Value: 0.0ENC2 4 nin:0,nout:1,maxon_EncBlk,Device ID: 0x02,Resolution: 500ENC1 3 nin:0,nout:1,maxon_EncBlk,Device ID: 0x01,Resolution: 500MOTOR 7 nin:1,nout:0,maxon_MotBlk,Device ID: 0x01,Prop. gain: 8000,Integ. gain: 4000CTRFBK 7 6 nin:1,nout:1,dssBlk,System: gss_out,Initial conditions: 0SAT 5 7 nin:1,nout:1,saturBlk,Upper saturation:3000,Lower saturation: -3000B1 1 6 5 nin:2,nout:1,sumBlk,Gains: [1,1]REF 2 nin:0,nout:1,squareBlk,Amplitude: 4,Period: 10,Width: 5,Bias: 0,Delay: 0CTRIN 2 3 4 1 nin:3,nout:1,dssBlk,System: gss_in,Initial conditions: 0.END
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Python / gEDA
* Spice netlister for gnetlistDISP 2 4 3 nin:3,nout:0,printBlkSRV nin:0,nout:0,rtxmlServerBlk,Signals Plot1: 'Sig1 Sig2',Signals Plot 2: 'Sig1',Signals Plot 3: 'Sig2',Additional XML Par: '<PAR></PAR>',HTTP port: 3141OUTPOS 4 nin:1,nout:0,rtxmlSigBlk,Signals Name: 'Sig2',Default Value: 0.0OUTREF 2 nin:1,nout:0,rtxmlSigBlk,Signals Name: 'Sig1',Default Value: 0.0ENC2 4 nin:0,nout:1,maxon_EncBlk,Device ID: 0x02,Resolution: 500ENC1 3 nin:0,nout:1,maxon_EncBlk,Device ID: 0x01,Resolution: 500MOTOR 7 nin:1,nout:0,maxon_MotBlk,Device ID: 0x01,Prop. gain: 8000,Integ. gain: 4000CTRFBK 7 6 nin:1,nout:1,dssBlk,System: gss_out,Initial conditions: 0SAT 5 7 nin:1,nout:1,saturBlk,Upper saturation:3000,Lower saturation: -3000B1 1 6 5 nin:2,nout:1,sumBlk,Gains: [1,1]REF 2 nin:0,nout:1,squareBlk,Amplitude: 4,Period: 10,Width: 5,Bias: 0,Delay: 0CTRIN 2 3 4 1 nin:3,nout:1,dssBlk,System: gss_in,Initial conditions: 0.END
from supsictrl.RCPblk import *
DISP = printBlk([2, 4, 3])SRV = rtxmlServerBlk( 'Sig1 Sig2', 'Sig1', 'Sig2', '<PAR></PAR>', 3141)OUTPOS = rtxmlSigBlk([4], 'Sig2', 0.0)OUTREF = rtxmlSigBlk([2], 'Sig1', 0.0)ENC2 = maxon_EncBlk([4], 0x02, 500)ENC1 = maxon_EncBlk([3], 0x01, 500)MOTOR = maxon_MotBlk([7], 0x01, 8000, 4000)CTRFBK = dssBlk([7],[6], gss_out, 0)SAT = saturBlk([5],[7],3000, -3000)B1 = sumBlk([1, 6],[5], [1,1])REF = squareBlk([2], 4, 10, 5, 0, 0)CTRIN = dssBlk([2, 3, 4],[1], gss_in, 0)
blks = [DISP, SRV, OUTPOS, OUTREF, ENC2, ENC1, MOTOR, CTRFBK, SAT, B1, REF, CTRIN]fname = 'disksRT'genCode(fname, 0.01, blks)genMake(fname,'rt.tmf')
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Interfacing the real plants
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CAN Bus interface - Motivation
• Teaching environment based on tools found in industry• COTS components (multiple vendors)• Simplified maintenance and reduced costs• Easy expendability and flexibility of didactic activities
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CAN bus – the 4-tier implementation
• Combination of– Different CAN devices
– Different CACSD environments
– Different CAN interfaces
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CAN bus – the 4-tier implementation
• Combination of– Different CAN devices
– Different CACSD environments
– Different CAN interfaces
Complexity for specific SW interfaces unmanageable
Structured approach
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CAN bus – the 4-tier implementation
95% same code
Different CAN interfaces
Message dispatcher
devicespecific
code
PhysicalLayer
interface
CACSDspecific
layersimulink
ScicosXcos
python
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Example – Disks And Spring
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Example – Disks And Spring
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Inverted Pendulum
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Inverted Pendulum
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Delta haptic manipulator
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Delta haptic manipulator
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Other projects
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Other projects
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Other projects
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Labo example
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Example – Disks and spring
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Model identification
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Model identification
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Controller
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Controller
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Controller in compact form
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Matlab + Simulink
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Matlab + Simulink
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Scicoslab + Modelica
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Scicoslab + Modelica
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Scicoslab + Modelica
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Python implementation
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Code generation
• Find the right block sequence• Generate the C code with 3
functions:– Init
• Initialization– ISR
• Outputs update• States update
– Termination
continous time systems discrete time systems
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Block Diagram for simulation
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Block Diagram for simulation
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Block diagram for RT execution
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Python / gEDA / RT execution
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Python / gEDA / RT execution
* Spice netlister for gnetlistDISP 2 4 3 nin:3,nout:0,printBlkSRV nin:0,nout:0,rtxmlServerBlk,Signals Plot1: 'Sig1 Sig2',Signals Plot 2: 'Sig1',Signals Plot 3: 'Sig2',Additional XML Par: '<PAR></PAR>',HTTP port: 3141OUTPOS 4 nin:1,nout:0,rtxmlSigBlk,Signals Name: 'Sig2',Default Value: 0.0OUTREF 2 nin:1,nout:0,rtxmlSigBlk,Signals Name: 'Sig1',Default Value: 0.0ENC2 4 nin:0,nout:1,maxon_EncBlk,Device ID: 0x02,Resolution: 500ENC1 3 nin:0,nout:1,maxon_EncBlk,Device ID: 0x01,Resolution: 500MOTOR 7 nin:1,nout:0,maxon_MotBlk,Device ID: 0x01,Prop. gain: 8000,Integ. gain: 4000CTRFBK 7 6 nin:1,nout:1,dssBlk,System: gss_out,Initial conditions: 0SAT 5 7 nin:1,nout:1,saturBlk,Upper saturation:3000,Lower saturation: -3000B1 1 6 5 nin:2,nout:1,sumBlk,Gains: [1,1]REF 2 nin:0,nout:1,squareBlk,Amplitude: 4,Period: 10,Width: 5,Bias: 0,Delay: 0CTRIN 2 3 4 1 nin:3,nout:1,dssBlk,System: gss_in,Initial conditions: 0.END
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Python / gEDA / RT execution
* Spice netlister for gnetlistDISP 2 4 3 nin:3,nout:0,printBlkSRV nin:0,nout:0,rtxmlServerBlk,Signals Plot1: 'Sig1 Sig2',Signals Plot 2: 'Sig1',Signals Plot 3: 'Sig2',Additional XML Par: '<PAR></PAR>',HTTP port: 3141OUTPOS 4 nin:1,nout:0,rtxmlSigBlk,Signals Name: 'Sig2',Default Value: 0.0OUTREF 2 nin:1,nout:0,rtxmlSigBlk,Signals Name: 'Sig1',Default Value: 0.0ENC2 4 nin:0,nout:1,maxon_EncBlk,Device ID: 0x02,Resolution: 500ENC1 3 nin:0,nout:1,maxon_EncBlk,Device ID: 0x01,Resolution: 500MOTOR 7 nin:1,nout:0,maxon_MotBlk,Device ID: 0x01,Prop. gain: 8000,Integ. gain: 4000CTRFBK 7 6 nin:1,nout:1,dssBlk,System: gss_out,Initial conditions: 0SAT 5 7 nin:1,nout:1,saturBlk,Upper saturation:3000,Lower saturation: -3000B1 1 6 5 nin:2,nout:1,sumBlk,Gains: [1,1]REF 2 nin:0,nout:1,squareBlk,Amplitude: 4,Period: 10,Width: 5,Bias: 0,Delay: 0CTRIN 2 3 4 1 nin:3,nout:1,dssBlk,System: gss_in,Initial conditions: 0.END
from supsictrl.RCPblk import *
DISP = printBlk([2, 4, 3])SRV = rtxmlServerBlk( 'Sig1 Sig2', 'Sig1', 'Sig2', '<PAR></PAR>', 3141)OUTPOS = rtxmlSigBlk([4], 'Sig2', 0.0)OUTREF = rtxmlSigBlk([2], 'Sig1', 0.0)ENC2 = maxon_EncBlk([4], 0x02, 500)ENC1 = maxon_EncBlk([3], 0x01, 500)MOTOR = maxon_MotBlk([7], 0x01, 8000, 4000)CTRFBK = dssBlk([7],[6], gss_out, 0)SAT = saturBlk([5],[7],3000, -3000)B1 = sumBlk([1, 6],[5], [1,1])REF = squareBlk([2], 4, 10, 5, 0, 0)CTRIN = dssBlk([2, 3, 4],[1], gss_in, 0)
blks = [DISP, SRV, OUTPOS, OUTREF, ENC2, ENC1, MOTOR, CTRFBK, SAT, B1, REF, CTRIN]fname = 'disksRT'genCode(fname, 0.01, blks)genMake(fname,'rt.tmf')
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Conclusions
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Conclusions
• Investment of resources !– Gain of experience
– Gain of knowledges
• Appreciated by the students• Forms students with reusable skills• Easy to maintain and to develop• Synergies with research activities
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Other useful links
• www.rtai.org• www.osadl.org• robertobucher.dti.supsi.ch/• www.dti.supsi.ch/~smt/laboO4.html
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Questions?