Question Bank for Mid-2 r13(Vlsi).
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Transcript of Question Bank for Mid-2 r13(Vlsi).
Sl.No Question Text Book Page Nos.
DIGITAL SYSTEM DESIGNUnit-4
1 .a)Discuss about Kohavi algorithm and design a two level AND-OR circuit that realizes the function F=X1.X2+ X1X3’ X4’+ X2X4.
Find a minimum test set for this network.b) )Apply Kohavi algorithm and derive the minimal complete test set for SA-0 and SA-1 faults for a given function F(W,X,Y,Z)=W’Y’+Y’Z+WXZ+XYZ’.
T1 133-138(material)
2 a) A combinational circuit is defined by the functions F1=∑m(3, 5, 6, 7 )F2=∑m(0,2,4,7). Implement the circuit with a PLA having 3 inputs,3 product terms and 2 outputs.b) Explain the faults in PLA
T1 179
3 a) Explain the fault diagnosis process of combinational logic circuit with an example.b) What is the significance of Kohavi Algorithm? Explain how it detects multiple faults ina two-level network.
T1 123-134133-138
4 Explain the circuit under test methods a)path sensitization methodb) Boolean difference method
T1 128-133
5 Explain the concept built in self-test T1 195-99,457(t3)
6 What are the fault classes and models explain each with gates ?
T1 179,meterial
Unit-51 a) Conduct a Homing experiment and determine shortest
homing sequence which identifies the final state with an example?b) Write short note on sequential test techniques.
T1 250
2 Explain the fault detection in sequential circuits? T3 549,5643 Explain the following
a)circuit test approachb)initial state identification
4 Explain the procedure for machine identification? T2 meterial5 Explain the following with short description
a) distinguishing experimentsb) adaptive distinguishing experiments
6
NOTE: ALL ARE AVAILABLE IN DSD MATERIAL AND IN N BISWAS TEXT
T1—N.N.BISWAST2--MIRON MOVICIT3—MATERIAl
DEGITAL DESIGN USING HDL
Sl.No
Question Text Book
Page Nos.
Unit-41 What is meant by synthesis? Explain the synthesis in logic
circuits.T2 (760-63)
2 What are the sequential logic circuits (F/F,latches) and explain the synthesis of sequential logics ?
T2 (807-808)
3 Explain the followinga) implicit state machines b) explicit state machines
T2
4 How the synthesis process performed ina) registersb)counters
T2 (739-740)
5 Explain the concept synthesis in combinational logic T2 (322-329)6
Unit-51 Explain
a)need for testing logic circuitsb)fault model
T2 728-729
2 What is built in self-test? T2 743-7473 Explain the CAD TOOLS and give description? T2 760-7724 Explain the operation of printed circuit board in VLSI
technology?T2 750-753
5 Explain the following a) path sensitizationb)random tests
T2 731-736
6 what is complexity of a test set and explain the synthesis in testing of digital logic circuits ?
T2 729
T1—Bhaskar’s VHDL PrimerT2—Digital Logic Design By Stephen Brown ,Tata Mc Grahill
VLSI DESIGN &TECHNOLOGYSl.No
Question Text Book Page Nos.
Unit-4
1 a) What are the various simulators used for combinational logic design? Explain their need. (b) Explain how the gate placement effects load capacitance in fan-out of combinational logic
T3 (218-222)
2 a) Explain the technology independent and technology dependant strategies of power optimization used in sequential systems. (b) Write notes on clocking disciplines.
T3 (249-53)
3 a) What is meant by switch logic? Discuss about alternative gate circuits. (b) Explain how to determine resistive and inductive interconnect delays of logic circuits.
T3 (253-57)
4 Explain the design of arithmetic logic unit (ALU) ? T3 (349-50)5 What are the other system considerations in sub system
design ?T3
6 T3
Unit-5t31 (a) Explain the design validations in the floor planning methods.
(b) Describe the Placement and routing techniques used in floor planning.
T3 (379-90)
2 Explain the chip designing methodologies give description ? T3 (493-502)3 Explain the different types of architecture register – transfer
design ?T3 (442-45)
4 Explain the floor planning methods and off chip connections in floor planning .
T3 (403-408)
5 write short notes on the following: (a) Layout Synthesis. (b) Hardware/Software Co-Design.
T3 (533-540)566
6 Explain the architectures for low power vlsi chips& architecture testing .
T3 (502-510)
T1:PUCKNELT2:JOHN.P.VYEMUVAT3. VLSI by Wayne wolf
CPLD & FPGA ARCHITECTURE AND APPLICATIONS
Sl.No Question Text Book Page Nos.
Unit-41 The Actel ACT1 FPGA uses the following circuit shown
below. How would you Implement the function Y = A+B+C?
2 Explain about anti-fuse programming technology with an example ?
3 Write notes on the following. a) ACTEL’s and their speed performance. b) Parallel adder design using FPGA.
T1 (27-29)
4 Explain the device architecture in anti-fuise programmed architecture ?
T1 (16-18)
5 Explain the following actel architecture a) actel 1b) actel 2
T1 (28-30)
6 Explain the ACT 2 and ACT 3 Logic Modules. T1 2.15 ,folder
Unit-51 What are the applications over the FPGA architectures give
description?T1 (8-9)
2 Give brief description about followinga)general design issues b)accumulators with act architecture
3 What are the sequential circuit examples of FPGA’S ?4 Explain the operation and architecture of fast DMA
controller?5 Explain the following applications
a)fast video controllerb)position tracker for robot
6 Explain the designing of counter with act devices and give application ?
T1: FPGA ARCHITECHTURE& APPLICATION BY STEPHEN BROWNT2: DSD WITH FPGA &CPLD BY IAR GROUTT3: CPLDFPGA FOLDER
CMOS ANALOG IC DESIGN
Sl.No Question Text Book Page Nos.
Unit-41 Explain how the compensation of op-amps in cmos op-amp
devices?T2 (355-369)
2 Explain the any two measurements techniques in op-amps? T2 (297-307)3 Explain the concept of cascode op-amps in CMOS. T2 (334-336)4 Define PSSR? And how it will be in two stage op-amps? T2 (296-307)5 Design a two stage operational amplifier with CMOS
implementation?6 How a CMOS op-amp is designed? And give analysis?
Unit-51 What is comparator? Give its characterization?2 Explain the following
a) two-stage comparatorsb)open-loop comparators
3 Explain the discrete time comparators?4 What are the procedures for improving the performance of
open-loop comparators? 5 What are the other open loop comparators explain in brief ?6
T1: ANALYSIS & DESIGN OF ANALOG IC CIRCUITS by PAUL GRAY (SOFT COPY)
T2: DESIGN OF ANALOG CMOS IC CIRCUITS by BEHZAD RAZANI
CMOS DIGITAL IC DESIGN
Sl.No Question Text Book Page Nos.
Unit-41 Differentiate the high performance dynamic CMOS circuits
with CMOS circuits?T1 (380,388)
2 What is the basic principle of dynamic logic circuits and explain the need of dynamic logic in digital era ?
T1
3 Give complete description of dynamic CMOS transmission gate logic? Give its circuits?
T1 (245-248)
4 Explain the concept voltage bootstrapping?5 What is a pass transistor? And explain the synchronous
dynamic pass transistor circuits?Stephen brown
(146-149)
6
Unit-51 What are the different types of semiconductor memories
give brief description?T1 437
2 Explain the array organization of RAM? T1 4403 Explain the following
a) DRAM typesb) Leakage currents & refresh operation.
T1 (458-63)
4 Explain the following in SRAMa)leakage currents b) SRAM cells implementation
T1 (438-440)
5 Explain the two types of flash memories a)NORB) NAND
T1: ken martin ,oxford university editionT2: jan.p. rabey,PHI edition