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    GOKARAJU RANGARAJU INSTITUTE OF ENGINEERING AND TECHNOLOGY

    ECE DEPARTMENT

    MINI PROJECT DOCUMENTATION

    WIRELESS CONTROL FOR ROBOT VEHICLE

    DONE BY

    P.MIHIRA

    07241A0409

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    Chapter 1

    INTRODUCTION

    1.1Project Overview

    In this new world of automation while designing an autonomous robot, we often come

    across a major problem that occurs is the obstacles that come across in the path of the robot. So,

    there is a necessity for the designer to provide a proper mechanism to the robot so that the

    obstacles are avoided. The obstacles can be human being or any non-living rigid obstacles.

    The objective of the project was to design and build an autonomous robot which is

    capable of moving wirelessly under assigned directions. We made use of four motors under

    which our robot runs.The robot status is manipulated by the micro controller and accordingly the

    robot is driven forward or backward or to turn right or left. . Applications of the project include

    remote surveillance by adding a camera in hazardous and inaccessible areas. The decision to take

    up the project was based on numerous factors which include the potential future applications and

    also the complexity in designing and building the robot.

    Our main challenge during the project was the 2months time constraint. We therefore

    unable to incorporate additional features into our robot as we had anticipated.Hence we decided

    to complete the main sections indicated in our design documentation report and are proud to say

    that the majority of the design document objectives were met.This report includes a fine outline

    of all the hardware equipment and softwares used in successful completion of the project. Itfinally presents the reader with the results and concludes with future applications.

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    Chapter 2

    INTRODUCTION TO ATMEGA 8515

    2.1 TheMicrocontroller

    Microcontrollers are special purpose computers.Microcontrollers are embedded inside

    some other device (often a consumer product),that they can control the features or actions of the

    product. Another name for a Microcontroller, therefore, is Embedded Controller.

    Microcontrollers are dedicated to one task and run one specific program. The programis stored in

    ROM (read-only memory) and generally does not change.Microcontrollers are often low-power

    devices. A battery-operated Microcontroller might consume 50 mill watts of power. A

    Microcontroller has a dedicated input device and has a small LED and LCDdisplay for output. A

    Microcontroller also takes input from the device it iscontrolling and controls the device by

    sending signals to different components inthe device. For example, the Microcontroller inside a

    TV takes input from the remote control and displays output on the TV screen. The controller

    controls the channel selector, the speaker.

    2.2 Introduction

    TheAVRfamily of microcontrollers is made by a company called ATMEL.AVRis not

    an acronym as per ATMEL. However, a story goes that they stand for the initials of the two

    designers who made the first AVRmicrocontroller. AVRmicrocontrollers are among the most

    popular microcontrollers for both hobbyists as well as serious designers.

    The Microcontroller we are going to work on will be the ATmega8515. The basic

    requirement of any Microcontroller is that it should be able to read inputs and set outputs. The

    microcontroller pins are designed to be either input or output. In the program, we specify which

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    pins are inputs and which pins we want as outputs. All pins are called general-purpose I/O pins,

    or GPIOpins.

    The ATmega8515has 35 GPIO lines. There are some of the general purpose I/O lines

    that have alternate functions such as serial transmit, serial receive and so on. The GPIO lines areclubbed in groups of eight. Each group of 8 I/Olines is called aport.

    The ATmega8515has 4such ports

    PORTA

    PORTB

    PORTC

    PORTD

    GND

    PORTD

    VCC=5V

    PORTB

    ATmeg

    a8515

    See for the notch on the chip. Pin on

    the left of the notch is pin1

    PORTA

    PORTC

    Figure: 2.2.1Ports of ATmega8515

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    The ATmega8515 we are going to work on is a 40-pin IC. It operates on 5V. Pin no. 40 is

    VCC (5V) and pin no. 20 is GND. A notch on the top of the IC will help to make out which pin

    is no. 1. It is important to know which pin is 1, since placing the IC upside down in the socket

    and powering it up will damage the IC.

    2.3 Pin Diagram of ATmega8515

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    Figure: 2.3.1 Pin configuration of ATmega8515

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    2.4 Pin Description

    VCC: Digital supply voltage.

    GND: Ground.

    Port A (PA7..PA0): Port A is an 8-bit bi-directional I/O port with internal pull-up resistors

    (selected for each bit). The Port Aoutput buffers have symmetrical drive characteristics

    with both high sink and source capability. When pins PA0 to PA7 are used as inputs and are

    externallypulled low, they will source current if the internal pull-up resistors are activated. The

    PortA pins are tri-stated when a reset condition becomes active, even if the clock is not running.

    Port B (PB7..PB0): Port B is an 8-bit bi-directional I/O port with internal pull-up resistors

    (selected for each bit). The Port Boutput buffers have symmetrical drive characteristics

    with both high sink and source capability. As inputs,Port B pins that are externally pulled low

    will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a

    resetcondition becomes active, even if the clock is not running.

    Port C (PC7..PC0): Port C is an 8-bit bi-directional I/O port with internal pull-up resistors

    (selected for each bit). The Port C output buffers have symmetrical drive characteristics with

    both high sinkand source capability. As inputs, Port C pinsthat are externally pulled low will

    sourcecurrent if the pull-up resistors are activated. The Port C pins are tri-stated when a reset

    condition becomes active, even if the clock is not running.

    Port D (PD7..PD0): Port D is an 8-bit bi-directional I/O port with internal pull-up resistors

    (selected for eachbit). The Port D output buffers have symmetrical drive characteristics with both

    high sink and sourcecapability. As inputs, Port D pins that are externallypulled low will source

    current if the pull-up resistors are activated. The Port D pins are tri-stated when a

    reset condition becomes active, even if the clock is not running.

    RESET: Reset input. A low level on this pin for longer than the minimum pulse length will

    generate a reset, even if the clock is not running.

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    XTAL1: Input to the inverting Oscillator amplifier and input tothe internal clock operating

    circuit.

    XTAL2: Output from the inverting Oscillator amplifier.

    2.5 Block Diagram

    The ATmega8515 is a low-power CMOS 8-bit microcontroller based on the AVR

    enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the

    ATmega8515 achieves throughputs approaching 1 MIPS per MHz allowing the system designer

    to optimize power consumption versus processing speed.

    Figure: 2.5.1 Block Diagram of ATmegaA8515

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    The AVR core combines a rich instruction set with32general purpose working registers.

    All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two

    independent registers to be accessed in one single instruction executed in one clock cycle. The

    resulting architecture is more code efficient while achieving throughputs up to ten times faster

    than conventional CISC microcontrollers.

    The ATmega8515 provides the following features: 8K bytes of In-System Programmable

    Flash with Read-While-Write capabilities, 512 bytes EEPROM, 512 bytes SRAM, an External

    memory interface, 35 general purpose I/O lines, 32 general purpose working registers, two

    flexible Timer/Counters with compare modes, Internal and External interrupts, a Serial

    Programmable USART, a programmable Watchdog Timer with internal Oscillator, a SPI

    serial port, and three software selectable power saving modes.

    The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and

    Interrupt system to continue functioning. The Power-down mode saves the Register contents but

    freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware reset.

    In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is

    sleeping. This allows very fast start-up combined with low-power consumption.

    The ATmega8515 is supported with a full suite of program and system development

    tools including: C Compilers, Macro assemblers, Program debugger/simulators, In-circuit

    emulators and evaluation kits.

    AVR ATmega 8515 Memories:

    This section describes the different memories in the ATmega8515. The AVR architecture

    has two main memory spaces, the Data Memory and the Program memory space. In addition, the

    ATmega8515 features an EEPROM Memory for data storage. All three memory spaces are

    linear and regular.

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    In-System Reprogrammable Flash Program memory:

    The ATmega8515 contains 8K bytes of On-chip In-System Reprogrammable Flash

    memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is

    organized as 4K x 16. For software security, the Flash Program memory space is divided into

    two sections, Boot Program section and Application Program section.

    The Flash memory has an endurance of at least 10,000 write/erase cycles.

    TheATmega8515 Program Counter (PC) is 12 bits wide, thus addressing the 4K Program

    memory locations. The operation of Boot Program section and associated Boot Lock bits for

    software protection.

    Figure: 2.5.2 Flash Program Memory of ATmega8515

    SRAM Data Memory:

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    The lower 608 Data Memory locations address theRegister File, the I/O Memory, and

    the internal data SRAM. The first 96 locations address the Register File and I/O Memory, and

    the next 512 locations address the internal data SRAM.

    An optional external data SRAMcan be used with the ATmega8515. This SRAM will

    occupy an area in the remaining address locations in the 64Kaddress space. This area starts at

    the address following the internal SRAM. The Register File, I/O, Extended I/O and Internal

    SRAM occupies the lowest 608 bytes in normal mode, so when using 64KB (65536 bytes) of

    External Memory, 64928 Bytes of External Memory are available.

    When the addresses accessing the SRAM memory space exceeds the internal

    Datamemory locations, the external data SRAM is accessed using the same instructions as for

    the internal Data memory access. When the internal data memories are accessed, the read and

    write strobe pins (PD7 and PD6) are inactive during the whole access cycle. External SRAM

    operation is enabled by setting the SRE bit in theMCUCR Register.

    Accessing external SRAM takes one additional clock cycle per byte compared to access

    of the internal SRAM. This means that the commands LD, ST, LDS, STS,LDD, STD, PUSH,

    andPOP take one additional clock cycle. If the Stack is placed in external SRAM, interrupts,

    subroutine calls and returns take three clock cycles extra because the two-byte Program Counter

    is pushed and popped, and external memory access does not take advantage of the internal pipe-

    line memory access. When external SRAM interface is used with wait-state, one-byte external

    access takes two, three, or four additional clock cycles for one, two, and three wait-states

    respectively. Interrupts, subroutine calls and returns will need five, seven, or nine clock cycles

    more than specified in the instruction set manual for one, two, and three wait-states.

    The five different addressing modes for the Data memory cover: Direct, Indirect with

    Displacement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the

    Register File, registers R26 to R31 feature the indirect addressing pointer registers.

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    The direct addressing reaches the entire data space. The Indirect with Displacement mode

    reaches 63 address locations from the base address given by the Y- or Z-register. When using

    register indirect addressing modes with automatic pre-decrement and post increment, the address

    registers X, Y, and Z are decremented or incremented.

    The 32 general purpose working registers, 64 I/O Registers, and the 512 bytes

    ofinternal data SRAMin the ATmega8515 are all accessible through all these addressing modes.

    Figure: 2.5.3 RAM Organization of ATmega8515

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    I/O PORTS:

    Introduction:

    All AVR ports have true Read-Modify-Writefunctionality when used as general digital

    I/O ports. This means that the direction of one port pin can be changed without unintentionally

    changing the direction of any other pin with the SBI and CBI instructions. The same applies

    when changing drive value (if configured as output) or enabling/disabling of pull-up resistors (if

    configured as input). Each output buffer has symmetrical drive characteristics with both high

    sink and source capability. The pin driver is strong enough to drive LED displays directly. All

    port pins have individually selectable pull-up resistors with a supply-voltage invariant resistance.

    All I/O pins have protection diodes to both VCC and Ground.

    Configuring the Pin:

    Each port pin consists of three register bits: DDxn, PORTxn, and PINxn. The DDxn

    bits are accessed at the DDRx I/O address, the PORTxn bits at the PORTx I/O address, and the

    PINxn bits at the PINx I/O address.

    The DDxn bit in the DDRx Register selects the direction of this pin. If DDxn is written

    logic one, Pxn is configured as an output pin. If DDxn is written logic zero, Pxn is configured as

    an input pin. If PORTxn is written a logic one when the pin is configured as an input pin, the

    pull-up resistor is activated. To switch the pull-up resistor off, PORTxn has to be written a logic

    zero or the pin has to be configured as an output pin. The port pins are tri-stated when a reset

    condition becomes active, even if no clocks are running. If PORTxn is written a logic one when

    the pin is configured as an output pin, the port pin is driven high (one). If PORTxn is written a

    logic zero when the pin is configured as an output pin, the port pin is driven low (zero). When

    switching between tri-state ({DDxn, PORTxn} = 0b00) and output high ({DDxn, PORTxn} =

    0b11), an intermediate state with either pull-up enabled ({DDxn, PORTxn} = 0b01) or output

    low ({DDxn, PORTxn} = 0b10) must occur. Normally, the pull-up enabled state is fully

    acceptable, as a high-impedant environment will not notice the difference between a strong high

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    driver and a pull-up. If this is not the case, the PUD bit in the SFIORRegister can be set to

    disable all pull-ups in all ports.

    Switching between input with pull-up and output low generates the same problem. The

    user must use either the tri-state ({DDXN, PORTXN} = 0b00) or the output high state ({DDXN,

    PORTXN} = 0b11) as an intermediate step.

    Table summarizes the control signals for the pin value.

    Table: 2.5.1 Control Signal and pin value of ATmega8515

    How to use ports?

    Configuring ports:

    Before we can use the port lines we need to tell the micro, which lines we want as inputs

    and which as output. To do this, each port has a Data Direction Register, which will allow

    configuring the lines of the port as input or output.

    7bit

    DDRX

    0 bit

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    Inputs Outputs

    By putting a 1 in a particular bit position of the DDR register of a port you areconfiguring the port line corresponding to that bit asoutpu.t

    By putting a 0 in a particular bit position of the DDR register of a port you are

    configuring the port line corresponding to that bit as input.

    It is not necessary that all the lines of a port have to be made either input or output. You

    can have any combination of inputs/outputs as per your requirement in a single port. For

    example, in the figure above, the lower nibble lines are outputs while the lines in the upper

    nibble are inputs.

    Writing to ports:

    After configuring the ports, we can write a 0 or a 1 to the port lines we have configured

    as outputs. Each port has a separate register called PORTX which will enable you to make

    individual lines in the port high or low.

    111

    7bit

    PORTX

    HighLow

    0 bit

    Reading from ports:

    After configuring the ports, we can read the status of the lines connected to the ports. To

    do this we read the registerPINXassociated with each port.

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    1

    0 bit7bit

    1 1 1 1PINX

    If the above register is for PORTB, the following piece of code will read the PORTB

    pins:

    Unsigned char status;

    Status = PINB;

    The value of status will be 0xD5

    When switches are connected to port lines, their status can be read using the PINX

    register.When the switch is not pressed, the status of port line will be 1 and when the switch is

    pressed, the status of the port line will be 0.

    A typical snippet of code to declare switches as inputs and read their status will be:

    DDRC = 0x00 ;// make port C lines as input

    PORTC = 0xFF;// enable pull-ups on all the PORTC lines

    data = PINC; // read the status of PORTC

    USART:

    The Universal Synchronous and Asynchronous serial Receiver and Transmitter

    (USART) is a highly flexible serial communication device.

    The main features are:

    Full Duplex Operation (Independent Serial Receive and Transmit Registers).

    Asynchronous or Synchronous Operation. Master or Slave Clocked Synchronous Operation.

    High Resolution Baud Rate Generator.

    Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits.

    Odd or Even Parity Generation and Parity Check Supported by Hardware.

    Data Overrun Detection.

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    Framing Error Detection.

    Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter.

    Three Separate Interrupts on TX Complete, TX Data Register Empty, and RX

    Complete.

    Multi-processor Communication Mode.

    Double Speed Asynchronous Communication Mode.

    AVR USART vs. AVR UART Compatibility:

    The USART is fully compatible with the AVR UART regarding:

    Bit locations inside all USART Registers

    Baud Rate Generation Transmitter Operation

    Transmit Buffer Functionality

    Receiver Operation

    However, the receive buffering has two improvements that will affect the compatibility in

    some special cases like

    A second Buffer Register has been added. The two Buffer Registers operate as acircularFIFO

    buffer. Therefore the UDR must only be read once for eachincoming data. More important is the

    fact that the Error Flags (FE and DOR) and the ninth data bit (RXB8) are buffered with the data

    in the receive buffer. Therefore the status bits must always be read before the UDR Register is

    read. Otherwise the error status will be lost since the buffer state is lost.

    The Receiver Shift Register can now act as a third buffer level. This is done byallowing the

    received data to remain in the serial Shift Register (see Figure 64) if the Buffer Registers are full,

    until a new start bit is detected. The USART is therefore more resistant toData Overrun (DOR)

    error conditions.

    The following control bits have changed name, but have same functionality and register location:

    CHR9 is changed to UCSZ2

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    OR is changed to DOR

    Internal Clock Generation The Baud Rate Generator:

    Internal clock generation is used for the asynchronous and the synchronous master modes

    of operation. The USART Baud Rate Register (UBRR) and the down-counter connected to it

    function as a programmable presale or baud rate generator. The down-counter, running at system

    clock (FOSC), is loaded with the UBRR value each time the counter has counted down to zero or

    when the UBRRL Register is written. A clock is generated each time the counter reaches zero.

    This clock is the baud rate generator clock output (= FOSC/(UBRR+1)). The Transmitter divides

    the baud rate generator clock output by 2, 8, or 16 depending on mode. The baud rate generator

    output is used directly by the Receivers clock and data recovery units. However, the recovery

    units use a state machine that uses 2, 8, or 16 states depending on mode set by the state of the

    UMSEL, U2X, andDDR_XCKbits.

    Table: 2.5.2 Calculation of baud rate and UBRR value as per Operating modes

    Note: 1. The baud rate is defined to be the transfer rate in bit per second (bps).

    BAUD Baud rate (in bits per second, bps)

    fOSC System Oscillator clock frequencyUBRR Contents of the UBRRH and UBRRL Registers, (0-4095)

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    Figure: 2.5.3 The ATmega8515 board

    2.6 Instruction Set Summary

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    Chapter 3

    MOTOR DRIVER

    3.1 Introduction

    Motor Drivers are the ICs used to drive motors when interfaced with Microcontrollers.

    These ICs give a higher voltage output ranging from 4.5V to 36V for logic 1 input. The motor

    driver ICs generally used L293D, ULN2003 series, etc.

    These ICs are used to drive both DC motors and stepper motors.

    3.2 L293D IC

    The L293 and L293D are quadruple high-current half-H drivers. The L293 is designed to

    provide bidirectional drive currents of up to 1 A at voltages from 4.5 V to 36 V. The L293D is

    designed to provide bidirectional drive currents of up to 600-mA at voltages from 4.5 V to 36 V.

    Both devices are designed to drive inductive loads such as relays, solenoids, dc and bipolar

    stepping motors, as well as other high-current/high-voltage loads in positive-supply applications.

    All inputs are TTL compatible. Each output is a complete totem-pole drive circuit, with a

    Darlington transistor sink and a pseudo-Darlington source. Drivers are enabled in pairs, with

    drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4 enabled by 3,4EN. When an enable input is

    high, the associated drivers are enabled and their outputs are active and in phase with their

    inputs. When the enable input is low, those drivers are disabled and their outputs are off and in

    the high-impedance state. With the proper data inputs, each pair of drivers forms a full-H (or

    bridge) reversible drive suitable for solenoid or motor applications. On the L293, external high-

    speed output clamp diodes should be used for inductive transient suppression. A VCC1 terminal,

    separate from VCC2, is provided for the logic inputs to minimize device power dissipation. The

    L293 and L293D are characterized for operation from 0C to 70C.

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    3.3 Pin Diagram

    Figure: 3.3.1 Pin Configuration of L293D

    3.4 Block Diagram

    Figure: 3.4.1 Block Diagram of a Motor Controller

    3.5 Circuit Diagram

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    Figure: 3.5.1 Circuit Diagram for Motor Controller (L293D

    NOTE:

    Here the input pins 2, 7 and their respective output pins 3, 6 are enabled by enabling EN1 i.e.giving vcc to pin 1

    Similarly, the input pins 10, 5 and their respective pins 11, 4 are enabled by enabling EN2 i.e.

    giving vcc to pin 9.

    Chapter 4

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    THE 8515 MICRO CONTROLLER BOARD

    4.1 Introduction

    The board is designed in such a way that all the required peripherals can be interfaced.It

    should have the facility of on board programming.Importantly it should have the scope for future

    expansion. This is done by providing flexibility of interfacing multiple sensors and other

    Peripheral devices like the RF control and LCD in this case.

    4.2 Board Diagram

    Figure: 6.2.1 Block Diagram of 8515 Microcontroller Board

    4.3 Introduction to Eagle 4.11

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    Eagle is CAD tool or Platform that enables us to design PCBs as per our requirement.We

    design the circuit of the requirement by adding and connecting the required components on a

    sheet called schematic.It provides flexibility of designing or creating library of the components

    which are not available in the default list of components.Its a very user friendly CAD processing

    tool.

    4.4 Schematic Diagram

    Figure: 4.4.1 Schematic Diagram of Power Supply Unit

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    Figure: 4.4.2 Schematic Diagram of RF module interfaced with 8515

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    Figure: 4.4.3 Schematic Diagram of Motor control and sensor ports interfaced with8515

    Figure: 4.4.4 Schematic Diagram of MAX232 IC for Serial Communication and on-boardProgramming

    4.5 Board Diagram

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    Figure: 4.5.1 Board Diagram of the designed 8515 Microcontroller board

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    Chapter 5

    PROGRAMMING THE MICROCONTROLLER

    5.1 Introduction to AVR

    AVR studio is an Integrated Development Environment (IDE) for writing and debugging

    AVR applications. Currently as a code writing environment, it supports the included AVR

    Assembler and any external AVR GCC compiler in a complete IDE environment. AVR Studio

    supports the complete range of ATMEL AVR tools and each release will always contain the

    latest updates for both the tools and support of new AVR devices. AVR Studio 4 has a modular

    architecture which allows even more interaction with 3rd party software vendors.

    ATMEL, the company that makes the AVR microcontrollers also provides a utility

    calledAVR Studiowhich will help you to do all these tasks.

    Using AVR Studio as an IDE gives you 2 main advantages:

    1. Edit and debug in the same application windows. Faster error tracking.

    2. Breakpoints are saved and restored between sessions, even if code are edited

    Save and Open Projects

    All projects are saved with your selected name with the ending APS. When the user wants

    to reopen a project, this can be done under the file menu and the recently used file list, or under

    the project menu, open project.

    Project output view

    After building, assembling or compiling the project, the build output window prompts

    with messages. If any errors occur, the user can double-click on the message, and the marker will

    show correct position in the source window.

    Startup wizard

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    The startup wizard is displayed every time you start AVR Studio 4. From within this

    dialog you can quickly reopen the latest used projects, change debug platform/device setup or

    create a new project. Just double-click on the wanted project and it will automatically open and

    restore to its last settings.

    New project

    Double-click on the AVR Studio icon on your Desktop

    AVR Studio 4.lnk

    The following screen opens up:

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    Click onNew Projecttab in the pop-up window and the following screen opens up.

    Click onAVR GCCinProject.

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    The following screen opens up. Type in the name of your project myrobot. Check the

    boxes Create file and Create Folder. Creating separate folders for different projects will help

    you maintain them properly. Since the folder does not exist, AVR Studio will prompt you saying,

    the folder does not exist and it will create a new folder. Say yes to this prompt.

    Click onFinish.

    Device selection

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    We have to select which device we are going to use , in this project we use AVR

    Simulator as debug platform and AT mega 8515 as device.

    AVR Studio creates a folder called myrobot in the path specified by you and a project

    namedmyleds.apsand a source file namedmyrobot.c

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    Key in the blinking.cprogram. Click on the File Save icon. Now you have written C

    code, you need to compile the program. For this, you need to select the microcontroller and the

    speed at which it works. The microcontroller we are using is ATmega8515 and the speed at

    which it is working is 8MHz.These two parameters are set as follows in the Project Options in

    Device and Frequency options.

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    The Project Options screen opens up by clicking on the Edit Current

    ConfigurationOptionsicon.

    Now, that we have set the Project Options, we will compile it. This can be done by clicking on

    theBuild Active Configurationicon.

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    Or you can go theBuild optionunder the Build tab.

    When the Build is successful, you are intimated that the Build has gone through with 0 warnings.

    This display will be in the Build Window.

    If there are errors, you will need to correct those and do a Build again. The Build will create

    many files, but the one we are interested in will be the.hexfile. This is a file whichcan be

    downloaded to the GRIET trainer kitand executed.

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    RECEIVER PROGRAM

    #include

    #include

    Void uart_init ( );

    Unsigned char start, address, data, checksum;

    int main (void)

    {

    DDRB= oxff; // port B motor I/P

    Port B=oxff; //write to port B

    Uart_init( );

    Port B = oxAA;

    _delay_ms (3000);

    Port B = oxff;

    _delay_ms(1000);

    Port B=ox55;

    _delay_ms (3000);

    PortB = oxff;

    _delay_ms (1000) ;

    PortB = ox22;

    _delay_ms (3000);

    While(1)

    {

    While (!(USRA & ox80));

    Start=UDR; //start byte

    if (start==oxaa)

    {

    While (!(UCSRA & ox80);

    address=UDR ; //address byte

    While (!(UCSRA & ox80));

    data= UDR; //data byte

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    While (!(UCSRA & ox80));

    check sum=UDR; //check sum

    if (address==0x8e)

    {

    check sum=address+data;

    if (check sum==address+data)

    {

    if (data==f)

    PortB=0xAA;

    if (data==l)

    PortB=0x11;

    if (data==r)PortB=0X22;

    if (data==b)

    PortB=0x55;

    if (data==s)

    PortB=0xff;

    } //if check

    } //if addr} //if start

    }//end while

    } //end main

    Void uart_init()

    {

    UBRRL=0x9f; //baud rate 1200UBRRH=0x01;

    UCSRB=0x10; //enabling receiver

    UCSRC=0x86;}

    TRANSMITTER PROGRAM:

    #include

    #include

    Void uart_init ( );

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    Void txchar (unsigned char);

    int main (void)

    {

    Unsigned char start, nodeid, data, checksum;

    DDRB= ox00;

    Port B=oxff; //enable internal pull-ups

    Start=0xaa;

    Nodeid=0x8e;

    Checksum=0;

    Uart init();

    While(1)

    {

    Switch(PINB)

    {

    Case 0XFE:data=b; //backwards

    Case 0XFD:data=r; //right

    Case 0XFB:data=l; //left

    Case 0XF7:data=f; //forward

    default:data=s; //stop

    }

    txchar(start);

    txchar(nodeid);

    txchar(data);

    txchar(nodeid+data);

    _delay_ms(800);

    }

    }

    Void uart_init()

    {

    UBRRL=51; //for 1200 baud rate of 1mHzUBRRH=0;

    UCSRB=0x18;

    UCSRC=0x86;

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    }

    Void txchar(unsigned chartx){

    While(!(UCSRA&0x20));

    UDR=tx;

    }