Progress and remaining challenges of EUV lithography for memory IC...
Transcript of Progress and remaining challenges of EUV lithography for memory IC...
![Page 1: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/1.jpg)
Progress and remaining challenges of EUV lithography
for memory IC manufacturing
Changmoon Lim
SK hynix
![Page 2: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/2.jpg)
EUVL symposium, 2012
Contents
Lithography for memory IC
• Patterning of memory IC
• Cost and Productivity of EUV
Progress and challenges
• Source and throughput
• Resolution and CDU
• Overlay
• Mask related issues
Closing
![Page 3: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/3.jpg)
EUVL symposium, 2012
Extremely fine and dense patterns,
while simple and repeating!
Lines and spaces Contact holes or together
LELE, Spacer …
Patterning of memory IC
![Page 4: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/4.jpg)
EUVL symposium, 2012
Hole pattern by crossing lines
sub-resolution contacts formed by multiple crossing lines
![Page 5: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/5.jpg)
EUVL symposium, 2012 5 5
for Complex layout in DRAM periphery
1st litho 2nd litho
Transferred
Combined
ArF immersion capable of memory patterning whatsoever with increased process complexity
Traditional LELE DPT
![Page 6: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/6.jpg)
EUVL symposium, 2012
PPB= Price per byte
- 30%/year
2X Bit growth every 2 years
=Bit price -50% every 2 years
Very cost sensitive business!
Moore’s law in Economics
![Page 7: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/7.jpg)
EUVL symposium, 2012
Productivity! Productivity! Productivity!
and
Resolution (CD uniformity)+
Corresponding overlay control (~20% of D.R. or less)
Defect control
Virtue of lithography for memory
![Page 8: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/8.jpg)
EUVL symposium, 2012
※ Rudy Peeters(ASML) EUVL Symposium 2011
Complexity of DPT and cost
![Page 9: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/9.jpg)
EUVL symposium, 2012
0.8
0.9
1
1.1
1.2
1.3
1.4
0 2 4 6 8
# of SPT
incre
ase o
f $
_
input
output
If • Cost increased by 1 DPT/SPT ~ 2% • Steps increased by 1 DPT/SPT, 10~15 steps (Capa. loss~3%) • Net die increase by shrink ~ 35%
Shrink will not help if too many D(S)PT layers are used
+ Yield-loss, TAT loss,
Layout design complexity,
Clean Room consumption
Nr. Of DPT/SPT
Incr
ease
/Decr
ease
Simple economics of double patterning
![Page 10: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/10.jpg)
EUVL symposium, 2012
Cost of Various DPT/SPT
ArF-i single
First overcome D(S)PT, then get close to the level of ArF-I single
Scanner throughput is key for cost
Patterning Cost vs. scanner throughput
![Page 11: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/11.jpg)
EUVL symposium, 2012
Economic
User-friendly
Versatile
Lithography Expensive
Under-powered
Vague
Lithography
EUV
Unanswered question
Continuous slip of source
Nobody knows
High k1
Resolution
overlay
![Page 12: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/12.jpg)
EUVL symposium, 2012
*Throughput : based on ASML ATP
1
5
25
125
625
0.2
1
5
25
125
2011 2012 2013 2014 2015 2016
Throughput(wph)
Power(W) Thro
ughput
(WPH
)
Pow
er
(W)
After NXE3100 install, observed real progress, though not sufficient for HVM
Real source improvement
![Page 13: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/13.jpg)
EUVL symposium, 2012
10X power up for 9 years in 248nm, for 2.6 years in 193nm How long for 25X gap in 13.5nm?
※ Hueber et. al. (Cymer) SPIE 2000
History of 248nm & 193nm
![Page 14: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/14.jpg)
EUVL symposium, 2012
Improvement in next year very crucial, will decide the future
Source prediction
1
5
25
125
625
0.2
1
5
25
125
2011 2012 2013 2014 2015 2016
Throughput(wph)
Power(W) Thro
ughput
(WPH
)
Pow
er
(W)
10X/2Y
10X/2.5Y
10X/3Y
250W
![Page 15: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/15.jpg)
EUVL symposium, 2012
32nm 40nm 28nm 25nm
2007 2008 2009 2010
22nm 20nm
2011 2012
※ T. Wallow(GF) SPIE 2012
conventional dipole
Strong dipole @IMEC
Yearly progress of EUV resolution performance
Progress continues in resolution
![Page 16: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/16.jpg)
EUVL symposium, 2012
Hole X
Hole Y
After Develop
After Etch
Hole
CD
Uniform
ity (
nm
)
A B C D E F G H I I
Process Condition
EUVL CD uniformity has improved significantly through various process optimization of resist, mask, and illumination modes
Improvement in CDU of contact hole
total CDU progress
![Page 17: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/17.jpg)
EUVL symposium, 2012
ArFi DPT EUV single patterning
N-LCDU : 7.4% N-LCDU : 7.1%
Regarding C/H CD uniformity, EUV lithography is comparable with ArFi DPT
※ K. Ban(SK hynix) SPIE 2012
N-LCDU : 10.2%
after develop after Etch
Comparison ArFi Hole DPT vs. EUV
Normalized Local CDU, 193nm DP vs. EUV
![Page 18: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/18.jpg)
EUVL symposium, 2012
8.0%
10.0%
12.0%
14.0%
16.0%
18.0%
20.0%
12 14 16 18 20 22 24
BCD
U(%
)
Dose-to-Size (mj/㎠)
Champion
Overall best
Initial
N-L
CD
U(%
)
Dose-to-size (mj/㎠)
※ K. Ban(SK hynix) SPIE 2012
Dose sensitivity of resist more and more important as EUV source reveals difficulty in increasing power level
Resist Screening: Local CD variation
High sensitive with better performed resist is essential
![Page 19: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/19.jpg)
EUVL symposium, 2012
0
4
8
12
1 2 3 4 5 6 7 8 9 10
Overl
ay (
nm
)
Wafer #
Overlay X (nm)
Overlay Y (nm)
※ B. Lee(SK hynix) EUVL Symposium 2011
NXE3100 Matching overlay to NXT1950i
Correction per exposure applied with linear alignment
On product overlay to ArF-i
![Page 20: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/20.jpg)
EUVL symposium, 2012
2.46(X)/1.9(Y)
1.49(X)/2.15(Y)
17.5(X)/14.9(Y)
3.8(X)/6.1(Y)
※ B. Lee(SK hynix) EUVL Symposium 2011
Early result promising, considering mask flatness effect of EUV
Mask A @ ADT
Mask B @ PPT
Field position dependent Mask position dependent
Intra-field overlay error
measured with fully rotatable mask
![Page 21: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/21.jpg)
EUVL symposium, 2012
4.74(X)/5.29(Y) 3.76(X)/4.18(Y)
Pre RegC® Post RegC®
Intra-field term improvement 20%
RegC applied to 193i mask only because of backside opacity of EUV mask
Carl Zeiss’ RegC®
Intra-field overlay after RegC®
![Page 22: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/22.jpg)
EUVL symposium, 2012
CrN openings for laser transmission
Transparent Conductive Material
Conductive film for Electro- static chucking
EUV backside change required for RegC®
Backside of EUV mask blank need to be changed for RegC application
![Page 23: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/23.jpg)
EUVL symposium, 2012
Mask ID
Nr
of defe
cts
A~F: contact hole / a~c: lines & spaces
Blank
Mask PI
Wafer PI
No strong correlation between blank/ mask pattern/ wafer pattern defects
Mask defect statistics
Defect counts with different inspection tools
![Page 24: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/24.jpg)
EUVL symposium, 2012
SEM based on wafer
Total defect
15% 28% 41% 31%
Un-captured (?)
Mask PI Wafer PI
among 100% defects captured by Mask PI
Make wafer PI capture all defects recognized by SEM!
Mask defect status quo
Defect capture-ability of different inspection methods
Not printed
on wafer
Not detected
By wafer PI
Detected
By wafer PI
![Page 25: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/25.jpg)
EUVL symposium, 2012
Inner POD(EIP)
EUV DUV
Dual PODs, pods exchanger
Shipping box
Particle adder Thermal deformation(?) haze
Particle growth (haze)
With pellicle
Proc. SPIE 83220S-2 Particle adder
Mask operation; EUV vs. DUV
![Page 26: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/26.jpg)
EUVL symposium, 2012
Inner POD(EIP)
EUV
Dual PODs, pods exchanger
Particle adder Thermal deformation(?) haze
Requirements
• No adder during exposure
• Inspection of mask defect on wafer
• Mask cleaning at proper time
• Mask Transportation within dual pods
• Pellicle if possible
• Keep Inner pods clean
(inner pods inspection method)
Mask operation; EUV vs. DUV
![Page 27: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/27.jpg)
EUVL symposium, 2012
※ Y. Hyun(SK hynix) et. al. Poster session EUVL 2012
3 adders during 7 batches for 10 days confirmed
Particle adder by wafer inspection
i-PRP results
![Page 28: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/28.jpg)
EUVL symposium, 2012
※ Hans Meiling(ASML) SPIE 2012
At least, added particles should be zero during exposure
Particle adder per pass on mask
![Page 29: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/29.jpg)
EUVL symposium, 2012
Ground transportation of 80km distance in 5 cycles of round trip
Pre inspection Final inspection
No adder found on mask! Test done on Gudeng, Entegris pods test will follow
Mask transport within dual pods
![Page 30: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/30.jpg)
EUVL symposium, 2012 30
B0
B1CELL ARRAY
REGION
CORE REGION
PERIPHERAL
REGION
1. 10~20 dies within a mask (chip size small)
2. Redundancy included 3. Defect in Cell/Core area can
be repaired (not always) 4. Killer defect in peripheral
circuit area with relatively low printability because of relaxed design rule
Mask defects on memory
memory IC truth
![Page 31: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/31.jpg)
EUVL symposium, 2012
0
0.1
0.2
0.3
0 5 10 15 20 25 30
Pro
bab
ilit
y o
f g
ett
ing
part
icle
s
Reticle load cycle
If 2% rework rate assumed as a guide-line, mask cleaning should be after every 2 batches @0.01 PRP Particle adder can be more than a increasing rework rate?
0.001 particles/path
0.01 particles/path 0.1 particles/path
2%
How many particles? probability of particle on mask
![Page 32: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/32.jpg)
EUVL symposium, 2012
OPC: Flare/ shadowing Mask patterning
Wafer pattern inspection
Mask pattern inspection
Wafer Patterning
AIMS & Repair
Resist/ Under-layer
Out gassing qualification
Blank
Pellicle-less Mask handling
Layout
Mask cleaning
Blank Inspection
Etch
32
EUV readiness in overall flow
![Page 33: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/33.jpg)
EUVL symposium, 2012
Mountain looks very steep and un-challengeable at far sight, but there always passages to climb over as we get close
※ Sun Jung, Korean landscape painting master(1676~1759)
Closing; distant and close view
![Page 34: Progress and remaining challenges of EUV lithography for memory IC manufacturingeuvlsymposium.lbl.gov/pdf/2012/pres/C. Lim.pdf · 2015-11-24 · Progress and remaining challenges](https://reader033.fdocuments.us/reader033/viewer/2022060222/5f079f047e708231d41de614/html5/thumbnails/34.jpg)
Thank You…