Progettazione di circuiti e sistemi VLSI
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Transcript of Progettazione di circuiti e sistemi VLSI
Dispositivi e modelli 1
Progettazione di circuiti e sistemi VLSI
Anno Accademico 2010-2011
Lezione 3
16.3.2012
Dispositivi e modelli
Dispositivi e modelli 2
Goal of this chapter• Presents intuitive understanding of device
operation• Introduction of basic device equations• Introduction of models for manual
analysis• Introduction of models for SPICE
simulation• Analysis of secondary and deep-sub-
micron effects• Future trends
Dispositivi e modelli 3
The Diode
n
p
p
n
B A SiO2Al
A
B
Al
A
B
Cross-section of pn-junction in an IC process
One-dimensionalrepresentation diode symbol
Mostly occurring as parasitic element in Digital ICs
Dispositivi e modelli 4
Depletion Regionhole diffusion
electron diffusion
p n
hole driftelectron drift
ChargeDensity
Distancex+
-
ElectricalxField
x
PotentialV
W2-W1
(a) Current flow.
(b) Charge density.
(c) Electric field.
(d) Electrostaticpotential.
Dispositivi e modelli 5
Forward Bias
x
pn0
np0
-W1 W20
p n(W
2)
n-regionp-region
Lp
diffusion
Typically avoided in Digital ICs
Dispositivi e modelli 6
Reverse Bias
x
pn0
np0
-W1 W20n-regionp-region
diffusion
The Dominant Operation Mode
Dispositivi e modelli 7
Diode Current
Dispositivi e modelli 8
Models for Manual Analysis
VD
ID = IS(eVD/T – 1)+
–
VD
+
–
+
–VDon
ID
(a) Ideal diode model (b) First-order diode model
Dispositivi e modelli 9
Junction Capacitance
Dispositivi e modelli 10
Diode Model
ID
RS
CD
+
-
VD
Dispositivi e modelli 11
SPICE Parameters
Dispositivi e modelli 12
What is a Transistor?
VGS VT
RonS D
A Switch!
|VGS|
An MOS Transistor
Dispositivi e modelli 13
The MOS Transistor
Dispositivi e modelli 14
MOS Transistors -Types and Symbols
D
S
G
D
S
G
G
S
D D
S
G
NMOS Enhancement NMOS
PMOS
Depletion
Enhancement
B
NMOS withBulk Contact
Dispositivi e modelli 15
Threshold Voltage: Concept
n+n+
p-substrate
DSG
B
VGS
+
-
DepletionRegion
n-channel
Dispositivi e modelli 16
The Threshold Voltage
Dispositivi e modelli 17
The Body Effect
-2.5 -2 -1.5 -1 -0.5 00.4
0.45
0.5
0.55
0.6
0.65
0.7
0.75
0.8
0.85
0.9
VBS (V)
VT (V
)
Dispositivi e modelli 18
Current-Voltage RelationsA good ol’ transistor
0 0.5 1 1.5 2 2.50
1
2
3
4
5
6x 10
-4
VDS (V)
I D (A
)VGS= 2.5 V
VGS= 2.0 V
VGS= 1.5 V
VGS= 1.0 V
Resistive Saturation
VDS = VGS - VT
Dispositivi e modelli 19
Transistor in Linear
n+n+
p-substrate
D
SG
B
VGS
xL
V(x) +–
VDS
ID
MOS transistor and its bias conditions
Dispositivi e modelli 20
Transistor in Saturation
n+n+
S
G
VGS
D
VDS > VGS - VT
VGS - VT+-
Pinch-off
Dispositivi e modelli 21
Current-Voltage RelationsLong-Channel Device
Dispositivi e modelli 22
A model for manual analysis
Dispositivi e modelli 23
Current-Voltage RelationsThe Deep-Submicron Era
LinearRelationship
-4
VDS (V)0 0.5 1 1.5 2 2.5
0
0.5
1
1.5
2
2.5x 10
I D (A
)
VGS= 2.5 V
VGS= 2.0 V
VGS= 1.5 V
VGS= 1.0 V
Early Saturation
Dispositivi e modelli 24
Velocity Saturation
(V/µm)c = 1.5
un
(m/s
)
usat = 105
Constant mobility (slope = µ)
Constant velocity
Dispositivi e modelli 25
Perspective
IDLong-channel device
Short-channel device
VDSVDSAT VGS - VT
VGS = VDD
Dispositivi e modelli 26
ID versus VGS
0 0.5 1 1.5 2 2.50
1
2
3
4
5
6x 10
-4
VGS (V)
I D (A
)
0 0.5 1 1.5 2 2.50
0.5
1
1.5
2
2.5x 10
-4
VGS (V)
I D (A
)
quadratic
quadratic
linear
Long Channel Short Channel
Dispositivi e modelli 27
ID versus VDS
-4
VDS (V)0 0.5 1 1.5 2 2.5
0
0.5
1
1.5
2
2.5x 10
I D (A
)
VGS= 2.5 V
VGS= 2.0 V
VGS= 1.5 V
VGS= 1.0 V
0 0.5 1 1.5 2 2.50
1
2
3
4
5
6x 10-4
VDS (V)
I D (A
)
VGS= 2.5 V
VGS= 2.0 V
VGS= 1.5 V
VGS= 1.0 V
ResistiveSaturation
VDS = VGS - VT
Long Channel Short Channel
Dispositivi e modelli 28
A unified modelfor manual analysis
S D
G
B
Dispositivi e modelli 29
Simple Model versus SPICE
0 0.5 1 1.5 2 2.50
0.5
1
1.5
2
2.5x 10
-4
VDS (V)
I D (A
)
VelocitySaturated
Linear
Saturated
VDSAT=VGT
VDS=VDSAT
VDS=VGT
Dispositivi e modelli 30
A PMOS Transistor
-2.5 -2 -1.5 -1 -0.5 0-1
-0.8
-0.6
-0.4
-0.2
0x 10
-4
VDS (V)
I D (A
)
Assume all variablesnegative!
VGS = -1.0V
VGS = -1.5V
VGS = -2.0V
VGS = -2.5V
Dispositivi e modelli 31
Transistor Model for Manual Analysis
Dispositivi e modelli 32
The Transistor as a Switch
VGS VT
RonS D
ID
VDS
VGS = VD D
VDD/2 VDD
R0
Rmid
Dispositivi e modelli 33
The Transistor as a Switch
0.5 1 1.5 2 2.50
1
2
3
4
5
6
7x 10
5
VDD (V)
Req
(Ohm
)
Dispositivi e modelli 34
The Transistor as a Switch
Dispositivi e modelli 35
MOS CapacitancesDynamic Behavior
Dispositivi e modelli 36
Dynamic Behavior of MOS Transistor
DS
G
B
CGDCGS
CSB CDBCGB
Dispositivi e modelli 37
The Gate Capacitance
tox
n+ n+
Cross section
L
Gate oxide
xd xd
L d
Polysilicon gate
Top view
Gate-bulkoverlap
Source
n+
Drain
n+W
Dispositivi e modelli 38
Gate Capacitance
S D
G
CGC
S D
G
CGCS D
G
CGC
Cut-off Resistive Saturation
Most important regions in digital design: saturation and cut-off
Dispositivi e modelli 39
Diffusion Capacitance
Bottom
Side wall
Side wallChannel
SourceND
Channel-stop implant NA1
SubstrateNA
W
xj
LS