Presentation on Flip Flop
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Transcript of Presentation on Flip Flop
![Page 1: Presentation on Flip Flop](https://reader035.fdocuments.us/reader035/viewer/2022070513/58895ac51a28abef658b5847/html5/thumbnails/1.jpg)
PRESENTATION ONFlip Flop
Group Name : Bug Free.
Group Members:1.Sajibul Hasan 151-15-49862.Abdullah Al Noman 151-15-48533.Mehedi Hassan Khan 151-15-51544.Nahian Ahmed 151-15-5137
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What is Flip flop
>>In digital circuits, the flip-flop, is a kind of bi-stable multivibrator.
>>It is a Sequential Circuits / an electronic circuit which has two stable states and thereby is capable of serving as one bit of memory , bit 1 or bit 0
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Introduction : Types Of Flip Flop
1. SR Flip Flop a.SR Flip Flop Active Low = NAND gates b. SR Flip Flop Active High = NOR gates
2. Clocked SR Flip Flop 3. JK Flip Flop4. T Flip Flop5. D Flip Flop6. Master-Slave Edge-Triggered Flip-Flop
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The Used of Flip Flop
• For Memory circuits • For Logic Control Devices • For Counter Devices• For Register Devices
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SR Flip Flop - NOR GATE LATCH
R
S
Q
Q
S R Q0 0 Q0
0 1 01 0 11 1 Q=Q’=0
No changeResetSetInvalid
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SR Flip Flop - NAND GATE LATCH
S
R
Q
Q
S R Q
0 0 Q=Q’=10 1 11 0 01 1 Q0
InvalidSetResetNo change
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Clocked SR Flip Flop
S
RQ
QS
R
C
S
R
Q
Q
S
R
C
C S R Q0 x x Q0
1 0 0 Q0
1 0 1 01 1 0 11 1 1 Q=Q’
No changeNo changeResetSetInvalid
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JK Flip Flop
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T Flip Flop
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T Flip Flop
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D Flip FlopS
R
Q
Q
D
C
C D Q0 x Q0
1 0 01 1 1
No changeResetSet
Also Known as Data Flip flop Can be constructed from RS Flip Flop or JK Flip flop by addition of an inverter
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Master-Slave Edge-Triggered Flip-Flop
D Latch (Master)
D
C
Q D Latch (Slave)
D
C
Q QD
CLK
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Thank you for your Attention