Preliminary results on LGAD - CERN

E. G. Villani STFC Rutherford Appleton Laboratory

Preliminary results on LGAD

E.G.Villani, 37th RD50 Workshop, Zagreb (online)

Overview

• LGAD project description and goals

• design simulations

• preliminary results

• next steps

1E.G.Villani, 37th RD50 Workshop, Zagreb (online)

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A RAL, University of Oxford, University of Birmingham and Open University project in collaboration

with Teledyne e2v foundry for LGAD production

• Three types of cathode size of single cells (4,2 & 1mm) and one of 2 x 2 array of 1mm cells. Up to four

different cell layout flavors (A,B,C,D) are implemented with different distances of guard ring to the

cathode

• LGAD and PiN diodes share the same layouts , only difference being the presence or not of the gain

layer

LGAD Project description and goals


PiNLGAD

4mm

2mm A 2mm B

1mm - A 1mm - B 1mm - C 1mm - D 1mm - D 1mm - C 1mm - B 1mm - A

2mm B 2mm A

4mm

2x2mm A 2x2mm B 2x2mm B 2x2mm A

Field 1

4

• Additional devices are available on each wafer, which has 3 fields, to investigate various effects,

including separate biasing of P-stop, retraction of gain layer from JTE contact, further extension or

reduction of metal cathode over JTE

• Capacitors, diodes and resistors available too



Field 2

Field 3

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• Eight 6’’ wafers of 50m thick HR P- epi layer

• Different gain layer implant doses and energy to sample gain region according to

TCAD simulations



Wafer # GL dose GL energy GL type

1 1 1 Boron

2 1.07 1 Boron

3 0.92 1.05 Boron

4 1 1.05 Boron

5 1.07 1.05 Boron

6 1.15 1.05 Boron

7 1 1.11 Boron

8 1.07 1.11 Boron

Table 1: devices variants TCAD summary – Gain vs. Dose (E)

LGAD only

JTE P31 IMPLANT

(7,27)

EPITAX growth

50 um

SUBS

6

DRIVE IN [GL implant]

SPROCESS

2D process flowchart

Oxidation Resist depo

JTE etch

Strip resist

JTE drive in Resist depo

Pstop implant

Strip resist

Resist depo

ACTIVE etch

Strip resist

Oxidation Resist depo

GL implant

Strip resist

Resist depo

SHN implant (A&JTE)

Strip resist

LTO deposit ACTIVATION

LTO DENSIFICATION

Resist depo

CONTACTS ETCHING

Strip resist

METAL DEPOSITION

Electrodes with Al WF

in SDEVICE

REMESHING FOR

DEVICE

SIMULATION

IV plots Charge collection SDEVICE

SPROCESS

• Full process simulation implemented for LGAD and PiN

TCAD simulations


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GR P-stop CathodeFL#1A

• Extension of GL changes by around 0.5 um in going from

LOW DOSE to MAX DOSE

*

*

*

P-stop

Electrical simulation setup, common to PiN and LGAD, with RC

network

• IV plots

• Bulk radiation damage not included in this iteration, but

SiO2-Si interface traps implemented

• CCE for vertical MIP hit (80 e/h /um) through centre

* with no SRH Qcoll Qinj 0.1%

GRMIP

* Qcollected [LGAD]/Qcollected [PiN]

where Qcollected = Irin [0…150 ns]

Irin [A]

GR

LGAD – 50 um HR epi

TCAD simulations


Vbias [V]

LGAD

PiN

Gl Dose: HIGH

Gain

Gl Dose:

NOMINAL

1.7fC

8.8fC

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4.7fC

• Gain is defined as ratio of LGAD/PIN collected charge for a 50 ns transient and normalized to 0.3,0.6,0.9 BV

• Each LGAD gain curve is normalized w.r.t. PIN that uses the same Impact Ionization model ( 3 models used: Unibo,

Okuto, Lackner)

• A gain of > 10 is predicted for 2/3 I2 models used for the MIDDLE dose

• Design based on Impact ionization models predicting lowest gain (UniBo)

Gl Dose: LOW

TCAD simulations

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T = 300K

GR floating


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• Fabrication completed November 2020

• First wafer currently being tested at OPMD, Oxford and Birmingham



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• IV plots of 5 LGAD-4A and 5 PiN-4A devices

on WF 21 (E=1,D=1)

• GR floating, T = 21C

LGAD/PiN IV tests - 4mm

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LGAD-4A and PiN-4A


5-LGAD

5-PiN

GR

Wafer 21

I [A]

Vbias [V]

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• CV plots of 5 LGAD-4A and 5 PiN-4A devices

on WF 21 (E=1,D=1)

• F = 100kHz, AC = 35 mV

• GR floating, T=21C

• GL depletion voltage 20V, Vfd 32V

LGAD/PiN CV test - 4mm

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LGAD-4A and PiN-4A


5-LGAD

5-PiN

Vbias [V]

1/C2 [F-2]

Wafer 21

GR

VGL

VFD

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Summary and next steps

• A RAL, University of Oxford, University of Birmingham and Open University project in collaboration with Teledyne e2v foundry has produced the first batch of LGAD devices

• First fabricated samples available November 2020• Eight 6’’ 50um thick p-epi wafers processed with different

levels of dose and energy of implanted GL• First wafer currently being IV-CV tested at Oxford and

Birmingham. Laser dicing on it to be performed next

THANK YOU


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Acknowledgments

• Two years project supported by STFC, grant ref.nr ST/T002298/1

• STFC, Teledyne e2v, University of Birmingham University of Oxford, Open University


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LGAD 1A

MC gain min

MC gain MAX

MC gain fluctuations -5 runs

Preliminary results on LGAD - CERN

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