Preliminary Design Review February 11, 2008 ECE 492 – Spring 2008 LART-CS08(Train Spotting)

Preliminary Design Review

February 11, 2008

ECE 492 – Spring 2008

LART-CS08(Train Spotting)

System Block Diagram

• MasterPC communicates to each station via RS-232

• This communication is done in parallel via the Octopus.

• PICs at each station will then process this information and send necessary commands to Rails & Switches

• Whenever a sensor is triggered, an interrupt will be created that sends information back to the MasterPC

System Block Diagram

• Test to meet the integrated system requirements for:– Powering and switching– Operation at 16 speed levels– The correct sensor operation– RoHS compliance, EMI/EMC and hazmat

requirements– Documenting expandability and adaptability

• Test plan will be divided into individual test plans for GUI, networking and the power system

Acceptance Test Plan

System Requirements

Requirement Short Description UI Control Networking Low Level

R001 rail switch control

R002 engine power control

R003 train proximity monitoring

R004 expandability and adaptability

R005 control and monitoring speed

R006 applications programming interface

R007 maintenance user interface

R008 demonstration application

R009 modifications of the CFE layout

R010 power input

System Requirements


GPR001 documentation

GPR002 environmental

GPR003 EMI/EMC

GPR004 hazmats

GPR005 safety and good practice

GPR006 reliability

GPR007 maintainability

GPR008 sourcing sustainability

GPR009 global sustainability

GPR010 ethics report

GPR011 project demonstration

GPR012 final disposal of projects

System Requirements


ER001 trains will not crash

ER002 train acceleration

• High risk subsystems– RS-232 communication (PC to PIC)– Digital to PWM on PIC– API

• Lower risk subsystems– GUI– Automatic control software– Hardware that resides on the end of the system

• Low level hardware to power circuits/rails

• Switch control hardware

• Sensor hardware

Risk Assessment

• Direct Costs: Octopus-550, PICs, PCBs, logic chips, serial cables, surge protector. – Total direct costs: $348.70

• Indirect Costs: Labor (2250 Hours), computers, wires, resistors, capacitors. – Total indirect costs: $34,505.00

• Total Costs for project: $34,853.70

Cost Analysis

Work Breakdown Structure

User Interface

Serial Bus

Packet Builder Packet Decoder

SensorsPower Signals

Front End

Back End

Em

erg

ency

Sto

p S

igna

l

Em

erge

ncy

Sto

p S

igna

l

Em

erge

ncy

Sto

p S

igna

l

Em

erg

ency

Sto

p S

igna

l

Automatic Control

Manual Control

Block Diagram: UI Control

ControlLogic

Emergency Stop

To Packet Builder To Serial Bus

From User Interface

Automatic ControlBlock


Control Logic

IgnoramusCheck

EmergencyControl

From User Interface

To Packet Builder To Serial Bus

Manual Control


Block Diagram: Networking

• Sensors generate interrupts that send data automatically to PC

• Rails are powered via PWM.

• PWM is generated via secondary PIC

• PIC keeps a timer for direction control to supply enough energy to coils. Implements watch-dog to keep voltage < 50ms


DestinationAddress

DestinationAddress

SourceAddressSource

AddressR

15R

15

4-bit Rail SpeedR

14R

14R

13R

13R

12R

12R3R3

R2R2

R1R1

R0R0

1-bit Switch Info1-byte Addresses

1byte1byte 8bytes8bytes1byte1byte 11bytes11bytes1byte1byte

S7S7

S6S6

S5S5

S4S4

S3S3

S2S2

S1S1

S0S0


• RS-232 Standards

• Destination and Source Addresses

• 4-bit Data/Rail

• 1-bit Data/Direction

• Speed of RS-232 shall be chosen to optimize speed & error


DestinationAddress

DestinationAddress

SourceAddressSource

AddressS7S7

S6S6

S5S5

S4S4

S3S3

S2S2

S1S1

S0S0

1-byte Addresses 1-bit Sensor Info

1byte1byte 1byte1byte 3bytes3bytes1byte1byte


• RS-232 Standards

• Destination and Source Addresses

• 1-bit Data/Sensor

• Speed of RS-232 shall be chosen to optimize speed & error


Block Diagram: Low Level

Mains 120V AC

Su

rge

p

rote

cto

r/re

gu

lato

r

ComputerUI/Controller

A/C D/C Converter

Computer Microchip/Router

railssensors switches

Station Microchip Amplifiers

Station Microchip

rails sensors switches

Amplifier

Block Diagram: Low Level

• Political Concerns– Environmental

• RoHS compliant• avoiding pollution

– Funding

Ethics Analysis

• Social Concerns– Safety

• Signs, doors, platforms

– Cost• Transportation

– Disturbances• Construction, use of land

– Opportunities• Jobs

Ethics Analysis

QUESTIONS?

Train Spotting

• There will be testing on the following:– Packet Builder– Packet Decoder– Manual Control– Automatic Control

Test Plans: UI

• There will be testing on the following:– RS-232 Communication– Sensor Interrupts– Rail Control– Switch Control

Test Plans: Networking

• The low level hardware’s three main parts will each be tested individually– The reed switches / proximity sensors– The switching mechanism – Train Speed

Test Plans: Low Level

Requirements

UI / Manual Control

Automatic Control / Failsafe

Packet Builder

Packet Decoder

R001Rail Switch Control

R002Engine Power Control

R003Train Proximity Monitoring

R004Expandability and Adaptability

R005Control and Monitoring Speed

R006

Applications Programming Interface

R007Maintenance User Interface

R008Demonstration Application

R009Modifications of the CFE Layout

R010 Power Input

Requirements Analysis: UI

• Functional Description– The function of the software is to control the system. It includes a

user interface, an auto/manual control and failsafe module, a packet builder module, and a packet decoder module.

• As a whole the software has a fairly high risk

• The user interface is at low risk

• The auto/manual control and failsafe is at high risk

• The packet builder is at high risk

• The packet decoder is at high risk

Risk Assessment: UI

• Direct Costs: Octopus-550. Total direct costs: $115.00

• Indirect Costs: Labor (750 Hours), computers (8). Total indirect costs: $19,500.00


Cost Analysis: UI

Requirements Analysis: Networking

Requirement Short Description Networking Group

SS1 SS2 SS3 SS4

RS-232 Communication Sensor Interrupts Rail Control Switch Control










R010 power input

Risk Assessment: Networking

RS-232 CommunicationThis is the communication from the computer to the 5 stations. We have devised a crude packet structure for

the data. This subsystem is the structure of the packet and the retrieval of these packets by the PIC controller.

If the RS-232 does not work we need to find a different method of data transmission. This would mean redesigning logic inside the PIC and possibly needing completely different hardware. It would delay the low level hardware progress as well as the software development.Risk Factor: P+C – (P*C) = 0.2167 + .4 – (0.2167 * 0.4) = 0.53 high risk

Sensor InterruptsThis subsystem will monitor the sensors and send a packet of information back to the PC when a sensor has

been tripped. We will generate an interrupt in the PIC when this event occurs to make sure the data is sent and sensor information is not missed. This subsystem will be software written in the PIC.

Risk Factor: P+C – (P*C) = 0.6 + .4333 – (0.6 * 0.4333) = 0.7733 high risk

Rail ControlThe 4 bit data per rail will be converted into usable analog values for lower level hardware. The 4 bit data is a

16 value range from 0 (rail off) to F (full speed). A second PIC will convert this digital data to a PWM signal for use on the rails.


Switch ControlSignals will be sent out on parallel lines to appropriate low level hardware that will send power to the

individual coils. There will be checks to make sure they coils are not over powered or oppositely powered. This subsystem will be software written for the PIC chip.


• Direct Costs: PICs (5), serial cables.

Total direct costs: $69.70

• Indirect Costs: Labor (750 Hours).

Total indirect costs: $7,500.00


Cost Analysis: Networking

Requirements Analysis: Low Level

Tasks

Requirement Short Description Power Conversion Direction/ Speed Rail Switching Sensors/ Proximity










R010 power input

-Four Tasks: Overall Power, Rail Power, Rail Switching, Sensors

-Overall Power: Risk factor of 0.400 (Medium Risk)

-Rail Power: Risk Factor of 0.578 (High Risk)

-Rail Switching: Risk Factor of 0.337 (Medium Risk)

-Sensors: Risk Factor of 0.490 (Medium Risk)

Most of the risk in each item is attributed to the high cost of failure. If any item fails, the entire system will not meet the requirements. The additional risk associated with rail power is due to the added complexity of using the DAC chip

Risk Analysis: Low Level

• Direct Costs: PCBs (7), logic chips (28), surge protector.

Total direct costs: $164.00

• Indirect Costs: Labor (750 Hours), wires, resistors, capacitors.

Total indirect costs: $7,505.00


Cost Analysis: Low Level

Preliminary Design Review February 11, 2008 ECE 492 – Spring 2008 LART-CS08(Train Spotting)

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Transcript of Preliminary Design Review February 11, 2008 ECE 492 – Spring 2008 LART-CS08(Train Spotting)