PREETHAM KASHYAP APT 112, 26440 WESTPHAL ST DEARBORN HEIGHTS, MI-48127

E-mail:vpreetham1990@gmail.com, Phone: (302)766-0904 LinkedIn Profile: www.linkedin.com/in/vpreethamkashyap

Seeking a position as a Design/Verification engineer allowing me to utilize my knowledge and

expertise in areas of ASIC/FPGA design, Digital VLSI Circuit design, Hardware/Software

Interface Signal processing, Embedded systems and Power electronics. Education Masters in Electrical and Computer Engineering Graduating: Dec 2014 Western Michigan University, USA Current GPA: 3.77/4 Course Work: Advanced Microprocessor Applications, ASIC Design, Digital Electronics, Embedded systems, Advanced MEMS Design, Digital signal Processing, Digital image processing, Mechatronics-Real time designs. Bachelor’s in Electrical and Electronics Engineering Graduated: 2012 Visvesvaraya Technological University, India GPA: 3.8/4 Course Work: Analog Circuits, Network analysis, Field Theory, Control systems, Power Electronics, Power system analysis, Electrical Machine design, Transmission and Distribution, Computer Technique in Power system analysis. Professional Experience Embedded Systems Engineer at Ford Motor Company (Feb2015 – Present)

Use of Software planning tools to develop and deliver the supplier Low Level Driver (LLD) software release plans.

Use Software build tools to integrate and deliver Low Level Driver/High level Driver Subsystem plans.

Review and Track software change requests for LLD/HLD SW with suppliers and Ford SW engineers. Work closely with ECM/TCM modules HLD/LLD, Kernel, RTOS written using Embedded C programming.

Use of Software Configuration management tools like Linux Clear case. Flexibility using UNIX based server Operating systems like OpenVMS, HP UX and Exceed Hummingbird.

Good Knowledge in Embedded System development using “Infineon” Microprocessors.

Worked closely with dSPACE module, Mat lab & Simulink and CAN and LIN protocols. Lab Tutor at Western Michigan University (Aug2013 – Dec2014)

Assist and guide juniors in clarifying their doubts and help them debug program and software errors.

Maintain and manage software’s like Mat-lab and Mathematica.

Formulated Techniques to solve some major financial problems using current day math software’s. Teaching Assistant at Western Michigan University (Jan2014 – May 2014)

Collaborated with Course students and helped them develop real time microcontroller projects. Studied and applied precise skills required for programming microcontrollers using embedded C.

Provided techniques to program various microcontrollers like ARM, Atmel, PIC and Freescale. Support Engineer at Small Slate Industries (Jun2012- Dec 2012)

Analyzed and engineered various problem solving techniques related with Linux Operating systems.

Remodeled various interface programs for wide range of microprocessors using standard compilers.

Worked closely with projects involving Engine Control unit (ECU) and CAN protocol network.

Successfully implemented “Integrated project design and development” approach for various projects.

Helped company to grow globally by introducing company products to venders like MAZDA in Malaysia.

Effectively communicating with clients from different technical backgrounds. Internship at Robogenesis Incorporation (Aug2011-Nov 2011)

Exposure towards Allen and Bradley PLC used for automation projects.

Specialized and Certified for Microsoft Robotics Developer studio.

Combined with technical group for design and development of Low cost Automated Projects. Earned a Certificate upon successful completion of a Design project with in a given time frame.

Technical Skill Set

Programming Languages: C, OOP C++, Embedded C, Mat-lab & Simulink, Assembly 8051, VHDL, Verilog, System Verilog, Python (intermediate), Java (intermediate).

Technical Software’s: Mat-lab, Xilinx ISE, Or-CAD & PSPICE, Keil, Modelsim, Mentor graphic Tools, Dec C++, gcc linux, GNU, Labview (intermediate), Coventerware, Eclipse, Mathematica, Microsoft office, Latex, Clear-Case.

Operating systems: Windows XP/7/8, Linux, Solaris, OpenVMS, HP UX, Exceed Hummingbird.

Real Time OS: eCOS, Micro C/II OS, FreeRTOS.

Hardware Verification: OVM, UVM, Assertions, Clock Tree Synthesis, Crosstalk. Communication Protocol modules: SPI, I2C, UART, CAN, RS-232, JTAG (Intermediate). Certification: Robotics Development, Program & Testing (P&T), PST, RDBMS, OOC using Java.

Software Configuration Tools: IBM Clear Case, git.

Scripting: Shell Scripting, Python (intermediate). Selected Technical Projects

1. Design and Implementation of Inertial Navigation system. (Sep2013-Dec2013) Implementation of Low power 32-Bit processor called ZPU and RTOS on the FPGA core.

Open source Wishbone 16-Bit Interface Bus was designed for the Address and Data Accessing

inside the processor.

Gcc tool chain was used to compile C program and resultant memory code was used in VHDL program for the synthesis of the program on FPGA.

Gyroscope and Accelerometer was interfaced with the FPGA for the x and y axis data and the

simultaneous data from the sensors were loaded to FPGA for further processing. Post route simulation were done using Modelsim simulator.

GUI was developed using OOP C++ for the display unit of the module.

2. Design of Three address 4-Bit RISC processor using MIT 0.25 micron CMOS technology.

(Sep2014-Dec2014)

Constructed a Dual bank register model using Mentor graphics tools for schematic and layout design.

CMOS Pass transistor and Transmission gate technology is been incorporated in to the design.

4 bit ALU model performing certain Logical and Algorithmic functions is interfaced with the register bank to build a 4 bit RISC architecture processor overall and the simulations were checked using Eldo and Xelga simulators.

Layout was designed having a special care towards space utilization factor.

The DRC and LVS were successfully seen without any errors and warnings.

The Tphl and Tplh values were reduced as much as possible with variations in the transistor channel width and length sizes which overall decreased the propagation delay of the design.

Single bank Peripheral circuits like pre-charge, SRAM, Read write control, Sense amplifier and

row decoder were all designed for maximum Pull up operation for continued output. The Schematic and Layout were successfully designed for maximum efficiency as required.

Design and Verification of 2x2 Ethernet Switch (Feb2015-Apr2015)

RTL implementation of 2x2 Ethernet switch (Design Under Test and Test bench modules).

Design of Verification model around the DUT consisting of Driver, Monitors and Checkers.

Implementation of Constrained Random inputs to DUT.

RTL design and verification model was implemented using Verilog and System Verilog model.

Xilinx design suit EDA was used to process the design and Modelsim simulator was used for

checking the simulation result of both test bench and the design under test modules.

4. Design & Verification of RTL interface for PSRAM and 10/100 Ethernet

(Jan2014- May2014) Applied and programmed Behavioral and Structural VHDL design technique for the synthesis of

the design on the Xilinx Spartan 6 FPGA.

Determined the design module for high speed data loading and unloading from Ethernet to PSRAM and vice versa using mealy and Moore Finite state machine model’s.

Developed a UART and SPI module for communication between FPGA and Host computer.

Created .do files to simulate the working model of the design using Modelsim simulator.

Application of this project was for peripheral interfaces with Powertrain Control module (PCM) or Engine control module (ECU) in automotive industries.

5. Design, Implementation and Verification of Single precision Floating point arithmetic unit. (May2014- June2014)

Adapted IEE Single Precision Format for the design and synthesis of the FPU RTL model on the Xilinx FPGA.

Finite state machine and Component techniques were adapted while programming using VHDL

hardware descriptive language and post route simulation using Modelism simulator.

Seven segment display, External circuitry using buffers, amplifiers, logic gates and switches were interfaced to the FPGA to test the logical operation of the hardware module.

6. Automotive Embedded Health Rate monitoring system.

(Jan2014 – May2014) Design was based on ECG algorithm adapted from an IEEE paper journal.

Module was interfaced with custom built ECU through CAN protocol technique.

ARM cortex M4 processor was used to interface the sensor, GSM and GPS using embedded C.

System implemented in a Car and health conditions were monitored successfully.

7. Design of Recursive and Non-recursive FIR filters. (May2013 –June2013)

Algorithm to design a digital recursive and non-recursive FIR filter was adapted. Verified the operation of the Algorithm for different band pass frequencies.

Designed a Graphical user interface module for a successful demonstration of the design.

8. Design of a PATH-FOLLOWER Robotic system. (Jan2013- May2013)

Designed FSM model and wrote user defined directives to interface Sensors and DC motors.

Keil compiler was used for the design and debug of the embedded c program in to controller.

Interfaced the controller with LCD, various switches and LED’s on TI Tiva board.

9. Embedded Monitor and Control of High Voltage distribution Transformer system

(Jan2012- May2012) SU/SD Transformer were controlled and monitored using GPS and GSM technology.

SPI and UART were designed for the Transformer and PIC Microcontroller interface.

The interface was designed with a proper insulation between transformer and controller.

10. PID controllers for control of Industrial Electrical machineries (Aug2011 –Nov2011)

Mat-lab and Simulink were used for the design of this feedback control system model.

Transfer function algorithm were written in mat-lab and then extracted to Simulink design. The design was successfully implemented on the Allen and Bradley PLC.

Technical Activities: IEEE member, Eta Kappa Nu, Raspberry Pi club, Sports and cultural coordinator.