PLECS Basics

Síxifo FalconesASU

Spring 2011

Topics• Simulation Tools• PLECS Installation Process

– Simulink Blockset (Viewer)– Standalone

• Graphical User Interface• Features

– AC analysis, thermal simulation, scope, Fourier spectrum, THD, demos, m-files (Blockset)

• Guidelines– Drawing schematic– Showing simulation results

• Simulation Examples– Buck converter (open loop, closed loop, average model)– Single-phase DC-AC converter

Simulation Tools• Allows for a better understanding of a

topology• Verify controls performance• Circuit simulator vs system simulator• Detailed models vs ideal models• Switching model vs average model• Device level simulation vs system level

simulation• Variable step vs fixed step

PLECS Model & Sub-circuits

PLECS Scope Outputs

Average Model

Single-phase DC-AC Converter

Control and PWM Stages

Simulation Results

1-Ф DC-AC ConverterSimulink Model

Scope

PLECSProbe

Probe

G

Ii

Vconv

Idc

PLECSCircuit

Power Stage

m G

PWM

In Mean

In Mean

[Idc]

[IL_ref]

[Vconv]

[Idc_cca]

[Vdc_ref]

[Vdc]

[Vconv_cca]

[IL][Ii]

[Vgrid]

[Vdc_ref]

[Vconv]

[Vconv_cca]

[Vdc]

[IL]

[Vgrid]

[IL_ref][Vgrid]

[Ii]

[Idc]

[Idc_cca]

[Vdc]

[IL]

Vdc_ref

Vdc

IL

Vgrid

IL_ref

m

Controller

Vdc_ref

Vconv(V), Vconv_cca(V), Vgrid(V)

IL(A), IL_ref(A)

Vdc(V), Vdc_ref(V)

Idc(A) ,Idc_cca(A), Ii(A)

Simulink Sub-systems

2

m

1

IL_ref

Gcv

Voltage Controller

Vgrid Sin

PLL

u2

u2

[Vdc] [Sin]

[Vgrid]

[Vdc_ref]

C/2

C/2

[Vdc_ref]

[Vdc]

[Sin]

[Vgrid]

[Vdc]

[Vdc_ref]

[Vgrid]

Gci

Current Controller

4

Vgrid

3

IL

2

Vdc

1

Vdc_ref

m_0

e(J)E_ref

E

IL_pk_ref

1

G

>=

>=

NOT

NOT

-1

1

m

Matlab M-file% Data for Single_Phase_Inverter_Closed_Loop.mdl clear allclc RL=0.01; % Inductor resistance in ohmL=10e-3; % Inductance in HC=1000e-6; % Capacitance in F Ron=1e-3; % Switch ON resistance in ohmRsnubber=10e6; % Switch snubber resistance in ohm fs=10e3; % Switching freq in HzTs=1/fs; % Switching period in s f0=60; % Line frequency in Hzw0=2*pi*f0; % Line frequency in rad/sXL=w0*L; % Inductive reactance in ohm Vdc_ref=200; % DC link reference voltage in VVgrid=170; % Grid peak voltage in VVdc_0=Vdc_ref; % DC link initial voltage in V Gpi=tf(Vdc_ref,[L 0]); % Plant Gain for current loopGpv=-tf(Vgrid,[2 0]); % Plant Gain for voltage loop PMi=60; % Phase Margin in degrees for current loopBWi=1000; % Bandwidth in Hz for current loop PMv=60; % Phase Margin in degrees for voltage loopBWv=12; % Bandwidth in Hz for voltage loop

Gci=K_Factor(Gpi,BWi,PMi); % Current Controller gain from K-Factor techniqueGcv=-K_Factor(-Gpv,BWv,PMv); % Voltage Controller gain from K-Factor technique Goli=Gpi*Gci; % Loop gainGolv=Gpv*Gcv;Gcli=feedback(Goli,1); % Closed-loop gainGclv=feedback(Golv,1);pole(Gcli) % Determines Closed-loop polespole(Gclv) figure(1) % Opens a figure windowbode(Goli) % Generates the Bode plot of the Loop Gaingrid % Adds grid to the figurefigure(2) % Opens a figure windowbode(Golv) % Generates the Bode plot of the Loop Gaingrid % Adds grid to the figure figure(3) % Opens a figure windowrlocus(Goli) % Generates the Root-locus plot of the Closed-loop Gaingrid % Adds grid to the figurefigure(4) % Opens a figure windowrlocus(Golv) % Generates the Root-locus plot of the Closed-loop Gaingrid % Adds grid to the figure figure(5) % Opens a figure windowstep(Gcli) % Generates the Step-response plot of the Closed-loop Gaingrid % Adds grid to the figurefigure(6) % Opens a figure windowstep(Gclv) % Generates the Step-response plot of the Closed-loop Gaingrid % Adds grid to the figure

Matlab Analysis Tools

-100

-50

0

50

100

Mag

nitu

de (d

B)

101

102

103

104

105

-180

-150

-120

-90

Phas

e (d

eg)

Bode Diagram

Frequency (Hz)

-300 -250 -200 -150 -100 -50 0 50-80

-60

-40

-20

0

20

40

60

800.350.620.780.880.930.965

0.986

0.997

0.350.620.780.880.930.965

0.986

0.997

10203040

Root Locus

Real Axis

Imag

inar

y Ax

is

PLECS Demos (Simulink Blockset)

PLECS Demos (Standalone)

Fourier Spectrum

Total Harmonic Distortion (THD)

AC Sweep (Standalone)

AC Sweep (Simulink Blockset)

Useful Tips• Press Shift key to arrange PLECS subsystem ports

• Define PLECS Tags as Schematic (local) type to avoid conflict with other subsystems

• Right-click on a block/“show name” to hide unnecessary text• Right-click on a block/“format” to flip, rotate block• Refer to PLECS Users Manual for more information