Persistent Memory for Artificial...

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Persistent Memory for Artificial Intelligence Bill Gervasi Principal Systems Architect [email protected] Santa Clara, CA August 2018 1

Transcript of Persistent Memory for Artificial...

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Persistent Memory forArtificial Intelligence

Bill GervasiPrincipal Systems Architect

[email protected] Clara, CAAugust 2018 1

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Demand Outpacing Capacity

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In-Memory Computing

Artificial Intelligence

Deep Learning

Machine Learning

Memory Demand

DRAM Capacity

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Driving New Capacity Models

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Memory Demand

DRAM Capacity

Non-volatile memories

Industry successfully snugglinglarge memories to the processors…

…but we can do oh! so much more

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My Three Talks at FMS

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NVDIMM AnalysisMemory Class Storage

Artificial Intelligence

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History of Architectures

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Let’s go back in time…

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Historical Trends in Computing

EdgeComputing

Co-Processing

Power FailureData Loss

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Some Moments in History

CentralProcessing

DistributedProcessing

Processor per userShared ProcessorDumb terminals

Peer-to-peer networks

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Some Moments in History

CentralProcessing

DistributedProcessing

Hercules graphicsSound Blaster audio

Rockwell modemEthernet DSP

“Native Signal Processing”Main CPU driversCheap analog I/O

Tightly-coupledcoprocessing

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The Lone Survivor…

Graphics add-in cards

Integrated graphics

…survived the NSP war

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Some Moments in History

CentralProcessing

DistributedProcessing

Phone apps providelocal services

Phone providerscontrolled all

data processing

Edge computingreduces latency

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When the Playing Field Changes

The speed of networkingdirectly impacts the

pendulum swing fromcentralized to distributed

A faster network favorsdistributed computing

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Winners and Losers

Often, the maturity of the softwaredevelopment environment

determined who won and who lost

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Maintaining an Edge

Coprocessor

CPU Time

See how greatit is???

Oops!!!

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The Tail Wagging the Dog

I won’t say “It’s the Software, Stupid”because I know you’re not stupid

however

To succeed, AI needs GREATsoftware infrastructure

Driving some companies to designhardware to the software

instead of software to the hardware

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Wild Array of Programmer Options

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AI on Traditional Server

No magic

AI applications are likeany other

Data processing doneon main CPU

CPU

Disk

Downside is main CPU isoverkill in floating point,and weak in parallelism

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AI Evolution

CPU

Disk

Addition of AI Accelerator

Offloads main CPU forAI tasks

AIAccelerator

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AI Evolution

AI Accelerator Characteristics

Wide array of simple processing elements

Reduced floating point precision

Tuned for matrix operations

GoesoutaGoesinta

Proc

Proc

Proc

Proc

Proc

Proc

Dis

tribu

te

Rec

ombi

ne

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In-Memory Computing

CPU

Disk

In-memory computinglets the AI acceleratorcontrol the memory

directly

Also great forencryption

AI Accelerator

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Data Processing Paradigms

Traditional database

Data mining

Inferencing

Fuzzy logic

Recognition

DataAccessData

Reliability

etc

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The Actualization Gap

Research projects Deployments

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The “Research” ProjectsMany interconnects between

storage elements andprocessing elements

Weighted calculationsproduce parallelpossible results

R R R R

R R R R

R R R R

Focus for a number ofstartup companies

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What Most People Mostly Building

Dense matrix memoryfor highest storage

capacity

Shared memorycontroller for many

execution units

Pipes fornetworking

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Practical I/O Connection LimitsAny-to-any would

be awesomeToroid is a more

practicable solution

Limits how quickly data can flow in and out

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Network UtilizationRESET

PowerFail

Fill processorswith code

Fill caches withmodel seed data

Send newInput data

Process input datathrough model Retrieve results

Consumes I/O

Time to Checkpoint

Model?

Retrieve updatedmodel data

xxx

Yes

No

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Lossless Versus Lossy

Persistent data: reload needed

Transient data: reload, restart calculations

Time to reload is always an issue

Accumulated data: modified models are expensive to rebuild

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Recovering From Power Fail

CPU

Data pulled frommain memory

…or worse…

Backing store

Data requiresmultiple hopsthrough the

interconnects

Not uncommon fordata reload to take3 minutes or more

Before recalculationcan begin!

Disk

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Distributed Memory Complications

This may help explain the gapbetween research projects and

actual deployments

Distributed cells complicatedownload time into the arrays

R R R R

R R R R

R R R R

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Persistent Main Memory

CPU

NVDIMMs are movingdata persistence to the

main memory bus

and in some casesincreasing memory

capacity

See my other talklater this week

Disk

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Cost of Power Failure

Statistics vary but all agree…downtime costs a LOT

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Persistent Memory

DRAMLoses data

Must be refreshedCan’t lose power

Persistent MemoryHolds data

forever, evenon power fail

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Nantero NRAM™

Nantero NRAM is a persistent memoryusing carbon nanotubes to build

resistive arrays which can bearranged in a DRAM compatible device

……………..……………..……………..

DDR4DDR5

HBM

See my other talkslater this week

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Classes of Persistent Memory

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Non-volatility

Endurance

Read Time

Write Time

No

No limit

10 ns

10 ns

DRAM

Yes

Limited

X

X

MRAM

Yes

Limited

X

X

ReRAM

Yes

Limited

X

X

PCM /3DXpoint

Yes

No limit

X

X

FeRAM

Yes

103

50M ns

25M ns

Flash

Memory &Memory Class Storage Storage Class Memory Storage

Yes

No limit

10 ns

10 ns

NRAM

See my other talkslater this week

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Applying Persistent Memory

Replace DRAM withPersistent Memory

Completely eliminates theneed to reload on

Power fail

Next generationpersistent

memory willtarget SRAM,

too

Persistentshadow registersaren’t such a bad

idea, either

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NRAM for Main Memory

CPU

NRAM replaces DDR4,DDR5 for main memory

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Enables the New Architectures

NRAM cells in the array

Permanent storagethrough power fail

Programmed once duringmanufacturing, no reload

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NRAM Everywhere

Soon we will look back and say

“Remember when data was lostwhen power went out?”

and laugh

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Full Disclosure

My first home computerhad an 8” floppy disk

I earned my gray hair

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Summary

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Centralized versus distributed computing is a long term cycle

Quality of software infrastructure typically determines the winner

Artificial intelligence accelerators are a recent co-processing addition

Data loss on power failure is worsened by AI architectures

Persistent memory in AI device solves major problems

Nantero NRAM addresses many usages of PM in AI systems

If you remember 8” floppies, you probably can’t read this screen

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Questions?

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Bill GervasiPrincipal Systems Architect

[email protected]