1258 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 46, NO. 6, JUNE 1999

Pentacene Organic Thin-Film Transistorsfor Circuit and Display ApplicationsHagen Klauk,Student Member, IEEE, David J. Gundlach,Student Member, IEEE,

Jonathan A. Nichols, and Thomas N. Jackson,Member, IEEE

Abstract—We have fabricated organic thin-film transistors(TFT’s) using the small-molecule polycyclic aromatic hydrocar-bon pentacene as the active material. Devices were fabricated onglass substrates using low-temperature ion-beam deposited silicondioxide as the gate dielectric, ion-beam deposited palladium forthe source and drain contacts, and vacuum-evaporated pentaceneto form the active layer. Excellent electrical characteristics wereobtained, including carrier mobility as large as 0.6 cm2/V-s, on/offcurrent ratio as large as 108, and subthreshold slope as low as0.7 V/dec, all record values for organic transistors fabricated onnonsingle-crystal substrates.

I. INTRODUCTION

T HIN film transistors (TFT’s) using organic semiconduc-tors as the active material are of interest for a number

of applications. Used as pixel-access devices in active-matrixdisplays, organic TFT’s could complement liquid-crystal lightvalves or organic light emitting diodes [1] to allow inexpensivedisplay fabrication on flexible, rugged, light-weight polymericsubstrates. Used as switching devices for logic gates andmemory arrays, organic transistors could permit the fabricationof very low cost integrated circuits on flexible, large-areasubstrates for applications like smart cards, smart price andinventory tags, and large-area sensor arrays [2], [3].

The performance of organic thin-film transistors (TFT’s) hasimproved dramatically over the last twelve years [4]–[8], andoptimized organic TFT’s now show electrical characteristicssimilar to those obtained with hydrogenated amorphous silicon(a-Si:H) devices. For example, carrier field-effect mobilitieslarger than 1 cm/V-s have been obtained in pentacene organicTFT’s [9]. In addition to a large carrier mobility, a largeon/off current ratio is required for TFT’s to be useful aspixel-addressing devices in active-matrix displays. Small TFTsubthreshold slope and near-zero threshold voltage are alsoimportant to reduce the power consumption of an integratedcircuit or display. Finally, to address organic light emittersin all-organic emissive displays, TFT’s must be able to drivefairly large drain currents.

We have fabricated organic TFT’s using the small-moleculepolycyclic aromatic hydrocarbon pentacene as the active ma-terial. Pentacene TFT’s have been fabricated previously in our

Manuscript received November 4, 1998; revised February 12, 1999. Thereview of this paper was arranged by Editor J. N. Hollenhorst. This work wassupported by Opticom ASA and the Defense Advanced Research ProjectsAgency (DARPA).

The authors are with the Center for Thin Film Devices, and ElectronicMaterials and Processing Research Laboratory, The Pennsylvania State Uni-versity, University Park, PA 16802 USA.

Publisher Item Identifier S 0018-9383(99)04608-0.

Fig. 1. Schematic cross section of a pentacene thin-film transistor on a glasssubstrate.

laboratory and have shown excellent electrical characteristics,including field-effect mobility as large as 1.5 cm/V-s, on/offcurrent ratio larger than 10, and subthreshold slope as low as1.6 V/dec [9]. For simplicity, these early devices used a single-crystal silicon wafer as the substrate and gate electrode, withthermally grown silicon dioxide serving as the gate insulator.To allow TFT integration into circuits or displays, selectivegate electrodes and a gate insulator that can be deposited attemperatures compatible with the substrate are required. Lowdeposition temperatures are of particular concern if devices areto be fabricated on light-weight, flexible polymeric substrates.In this work, silicon dioxide deposited by reactive ion-beamsputtering at a substrate temperature of 80C was used as thegate dielectric, and pentacene TFT’s with excellent electricalcharacteristics were obtained.

II. DEVICE FABRICATION

All transistors were fabricated on borosilicate glass (Corning7059) using the device structure shown in Fig. 1. Nickelwas used for the gate electrodes since it shows excellentadhesion to the substrate and to the gate dielectric layer.Silicon dioxide was deposited to form the gate dielectric layer.Palladium was used for the source and drain contacts, sinceits large work function leads to improved carrier injectioninto the organic material. To form the active TFT layer,pentacene was thermally evaporated in vacuum at a pressurenear 10 Pa with a deposition rate near 1A/s. During thepentacene deposition, the substrate was held at 60C toimprove molecular ordering in the pentacene film, which leadsto larger carrier mobility and better device characteristics [10].

Molecular ordering also benefits from a smooth substrate.This is illustrated in Fig. 2(a) which shows an atomic forcemicroscopy (AFM) image of a pentacene film deposited ontothe smooth surface of an oxidized silicon wafer. The thermallygrown silicon dioxide has a peak-to-valley roughness of 8Aand an RMS roughness of 1A, and the deposited pentacene

0018–9383/99$10.00 1999 IEEE

KLAUK et al.: PENTACENE ORGANIC THIN-FILM TRANSISTORS 1259

(a) (b)

(c) (d)

Fig. 2. Atomic force microscopy (AFM) images of pentacene films deposited onto (a) thermally grown silicon dioxide, (b) thermally evaporated palladium,(c) ion-beam sputtered palladium, and (d) ion-beam sputtered silicon dioxide. The pentacene layer has an average thickness of 400A.

film shows good molecular ordering with large, micron-sizedgrains. For comparison, Fig. 2(b) shows an AFM image of apentacene film deposited onto the significantly rougher surfaceof evaporated palladium. The evaporated palladium film hasa peak-to-valley roughness of 48A and an RMS roughnessof 5.4 A, and the deposited pentacene film shows very littleordering.

To obtain a smooth gate dielectric and smooth source/draincontacts for our pentacene TFT’s, the nickel gate electrodes,the silicon dioxide gate dielectric layer, and the palladiumsource/drain contacts were all prepared by ion-beam sput-tering. We have found that ion-beam sputtered palladiumand silicon dioxide films have exceptionally smooth surfaces,leading to improved molecular ordering in the depositedpentacene layer. Fig. 2(c) shows an AFM image of pentacene

deposited onto ion-beam sputtered palladium. The ion-beamsputtered palladium has a peak-to-valley roughness of 11Aand an RMS roughness of 1.3A, and the deposited pentacenefilm appears well ordered, with terraced, micron-sized grains.Ion-beam deposited SiOfilms are quite smooth as well, witha peak-to-valley roughness of 20A and an RMS roughness of2 A. Fig. 2(d) shows that when pentacene is deposited onto thesmooth surface of our ion-beam sputtered SiOgate dielectriclayer, an active TFT layer with excellent molecular orderingis obtained.

Silicon dioxide gate dielectric layers were prepared in anOxford ion-beam deposition system by sputtering from asingle-crystal silicon target in a partial pressure of oxygen.Prior to each deposition, the vacuum chamber was evacuatedto a background pressure below 10Pa. The process pressure

1260 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 46, NO. 6, JUNE 1999

Fig. 3. High-frequencyC�V characteristics of a 630A thick ion-beamdeposited SiO2 film before and after thermally assisted gate bias stress.

was 0.1 Pa, with an oxygen partial pressure of 0.075 Pa and anargon partial pressure of 0.025 Pa. To reduce the mechanicalfilm stress often observed in sputtered dielectric films, sub-strates were held at a temperature of 80C during deposition.The properties of the deposited oxide films were evaluatedby ellipsometry, atomic force microscopy, capacitance–voltage( ) measurements, current–voltage ( ) measurements,and thermally assisted gate bias stress.

Using ellipsometry, a refractive index near 1.4 was mea-sured for ion-beam deposited SiOfilms, similar to the refrac-tive index of thermally grown silicon dioxide. To evaluatethe electrical properties of our ion-beam deposited silicondioxide films, MOS capacitors were fabricated by sputteringSiO onto lightly-doped single-crystal silicon substrates andevaporating aluminum contacts through a shadow mask. Priorto the dielectric deposition, the silicon substrates underwenta standard cleaning procedure using NHOH : H O : H O,HCl : H O : H O, and HF : HO solutions.

Fig. 3 shows the high-frequency (100 kHz) char-acteristics of an MOS capacitor fabricated using a 630Athick ion-beam deposited SiOfilm on single-crystal silicon.The graph indicates that the flatband voltage shifts by about6 V upon thermal treatment at 150C without gate biasstress. When the capacitor is stressed at 5 MV/cm and 150Cfor several hours, the flatband voltage shifts by about 6 Vwith a positive gate potential, and by about 2 V with anegative gate potential. Thus, the total flatband voltage shiftduring thermally assisted gate bias stress is 8 V, indicatingan oxide charge density of cm . Although this istwo or three orders of magnitude larger compared with high-quality thermally grown silicon dioxide, the charge densityis sufficiently low for the purpose of fabricating organicTFT’s. The properties of the deposited oxide films can befurther improved by annealing at elevated temperature. Fig. 4shows how the inversion characteristics measured at lowfrequency (10 kHz) under strong illumination improve aftera 30 min/500 C anneal in forming gas.

Ion-beam deposited SiOfilms also have large electricalresistivity near -cm. Dielectric breakdown occurs

Fig. 4. Low-frequencyC�V characteristics of a 630A thick ion-beamdeposited SiO2 film before and after thermal anneal.

when the electric field exceeds 8 MV/cm, somewhat lowerthan the breakdown field of thermally grown silicon dioxidefilms.

Among the challenges in fabricating organic TFT’s basedon small-molecule materials like pentacene is patterning ofthe organic active layer. Even though these materials are oftennot attacked in a bulk sense when exposed to the solventscommonly used in photolithographic processes, their electricalcharacteristics tend to degrade significantly. If the active TFTlayer cannot be patterned, current leakage between circuitor display elements can be a significant problem, unless thethreshold voltage can be controlled so that the active layer isnormally nonconducting.

Although pentacene is an excellent insulator, with resistivityaround 10 -cm, evaporated pentacene films have a ten-dency to form a carrier accumulation channel at the substrateinterface, and a positive gate voltage is often necessary todeplete the channel. As a result, current leakage through anunpatterned active layer can be significant [11]. To reducethe leakage between individual TFT’s, we have employed aCorbino transistor layout where the source electrode forms aclosed ring around the active TFT area, with the drain electrodelocated in the center. For a discrete device this allows apatterned gate to control the entire current path from source todrain electrode. Fig. 5 shows a photograph and the schematiclayout of a Corbino-type pentacene TFT with a gate length of5 m and a gate width of 500m.

III. D EVICE CHARACTERISTICS

Figs. 6 and 7 show the electrical characteristics of aCorbino-type pentacene TFT with a gate length of 60m,a gate width of 600 m, and a gate dielectric thickness of1600 A. The saturation field-effect mobility of this device is0.6 cm /V-s, to our knowledge the largest carrier mobilityreported for organic transistors fabricated on a substrate otherthan single-crystal silicon. The on/off current ratio for thisdevice is 10, and the off-current is near the noise levelof the test setup used, indicating low leakage due to theCorbino layout of the device. Devices with an open electrode

KLAUK et al.: PENTACENE ORGANIC THIN-FILM TRANSISTORS 1261

Fig. 5. Photograph and schematic layout of a Corbino-type pentacene TFT with a gate length of 5�m and a gate width of 500�m.

Fig. 6. Electrical output characteristics of a Corbino-type pentacene TFTwith a gate length of 60�m, a gate width of 600�m, and a gate dielectricthickness of 1600A.

Fig. 7. Electrical transfer characteristics of a Corbino-type pentacene TFTwith a gate length of 60�m, a gate width of 600�m, and a gate dielectricthickness of 1600A.

Fig. 8. Electrical transfer characteristics of a Corbino-type pentacene TFTwith a gate length of 10�m, a gate width of 1000�m, and a gate dielectricthickness of 1600A.

configuration fabricated on the same die had off-currents inthe nanoamp range.

Low power consumption is an essential prerequisite formany potential organic TFT applications, and devices withnear-zero threshold voltage and low subthreshold slope aredesirable. The device shown in Figs. 6 and 7 shows excellentturn-on characteristics with a threshold voltage of4 V anda subthreshold slope of 1.0 volt/dec. Unfortunately, we arethus far unable to reliably control these characteristics. Forexample, Fig. 8 shows the electrical transfer characteristicsof a pentacene TFT fabricated under similar conditions asthe device in Figs. 6 and 7, but using a different pentacenedeposition run. The device in Fig. 8 has a gate length of10 m, a gate width of 1000 m, and a gate dielectricthickness of 1600A. The subthreshold slope is 0.7 V/dec,to our knowledge the lowest subthreshold slope for organicTFT’s fabricated on a nonsingle-crystal substrate, and close tothe lowest subthreshold slope reported for any organic TFT[12], [13]. In addition, the device has an on/off current ratio

1262 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 46, NO. 6, JUNE 1999

Fig. 9. Electrical output characteristics of a Corbino-type pentacene TFTwith a gate length of 10�m, a gate width of 1000�m, and a gate dielectricthickness of 1600A.

near 10. However, the threshold voltage is40 V, and thecarrier field-effect mobility is only 0.2 cm/V-s.

For organic TFT’s to be useful for all-organic, active-matrixemissive flat panel displays, they must be able to drive fairlylarge currents in order to produce bright emission from organiclight emitting diodes (LED’s). Fig. 9 shows that even modest-sized pentacene TFT’s can drive several milliamps of draincurrent. This device has a gate length of 10m, a gate widthof 1000 m, and a gate dielectric thickness of 1600A (not thesame device as the one shown in Fig. 8). The transistor has afootprint area of about 10 cm and produces a drain currentof 50 A (0.05 A/ m) at about 20 V, 1 mA (1 A/ m) atabout 50 V, and close to 3 mA (3A/ m) at 100 V. Thesecurrents are substantially larger than those required to drivean organic LED pixel. For a typical organic LED with a pixelarea of about 10 cm , a brightness of about 10cd/m , andan external efficiency near 1%, the expected drive current ison the order of 10 A [14], [15]. Even using the large layoutrules of the transistor in Fig. 9 this would require only about10 cm footprint area (0.1% of the pixel area) for an organicTFT operated at 50 V, or about 10 cm footprint area (10%of the pixel area) for an organic TFT operated at 20 V.

IV. CONCLUSION

We have demonstrated organic TFT’s on glass substratesusing the small-molecule hydrocarbon pentacene as the ac-tive material and low-temperature ion-beam deposited silicondioxide as the gate dielectric. TFT’s with excellent electricalcharacteristics were obtained, including carrier field-effectmobility of 0.6 cm /V-s, on/off current ratio near 10, sub-threshold slope as low as 0.7 V/dec, and drain currents ofseveral microamps per micron. These results increase thelikelihood that organic TFT’s will find application in low-cost,large-area electronic and optoelectronic applications.

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[8] J. G. Laquindanum, H. E. Katz, A. J. Lovinger, and A. Dodabal-apur, “Morphological origin of high mobility in pentacene thin-filmtransistors,”Chem. Mater., vol. 8, no. 11, pp. 2542–2544, 1996.

[9] Y. Y. Lin, D. J. Gundlach, S. F. Nelson, and T. N. Jackson, “Stackedpentacene layer organic thin film transistors with improved characteris-tics,” IEEE Electron Device Lett., vol. 18, pp. 606–608, Dec. 1997.

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[11] H. Klauk, Y. Y. Lin, D. J. Gundlach, and T. N. Jackson, “Pentacenethin film transistors and inverter circuits,” inIEDM Tech. Dig., 1997,pp. 539–542.

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[13] X. C. Li, H. Sirringhaus, F. Garnier, A. B. Holmes, S. C. Moratti,N. Feeder, W. Clegg, S. J. Teat, and R. H. Friend, “A highly�-stacked organic semiconductor for thin film transistors based on fusedthiophenes,”J. Amer. Chem. Soc., vol. 120, p. 2207, 1998.

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Hagen Klauk (S’97) received the M.S. degree inelectrical engineering from The Pennsylvania StateUniversity, University Park, in 1994, the Diplomin-genieur degree in electrical engineering from Tech-nical University Chemnitz-Zwickau, Germany, in1995, and the Ph.D. degree in electrical engineeringfrom The Pennsylvania State University in 1999. Heis currently a Post-doctoral Researcher at the Centerfor Thin Film Devices, The Pennsylvania StateUniversity. His research interests include organicthin-film devices for electronic and optoelectronic

applications, flat panel display technology, and silicon device processing.

David J. Gundlach (S’97) received the B.S. degreein physics in 1992 and the M.S. degree in electricalengineering in 1997, both from The Pennsylva-nia State University, University Park, where he iscurrently pursuing the Ph.D. degree in electricalengineering at the Center for Thin Film Devices.His research focuses on the materials, fabricationprocesses, and carrier transport mechanisms of or-ganic thin-film transistors and organic light-emittingdiodes.

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Jonathan A. Nichols received the B.A. degreein physics from Edinboro University, Edinboro,PA, and the B.S. degree in materials science andengineering from the Pennsylvania State University,University Park, in 1998, where he is currently pur-suing the M.S. degree in materials engineering at theCenter for Thin Film Devices. His research focuseson the processing and material characterization oforganic thin-film transistors.

Thomas N. Jackson (S’75–M’80) received theB.S., M.S., and Ph.D. degrees in electricalengineering from the University of Michigan, AnnArbor, in 1975, 1976, and 1980, respectively.

In 1980, he joined the IBM Thomas J.Watson Research Center, Yorktown Heights,NY, where he worked on ultrashort gate-lengthself-aligned GaAs MESFET’s, germanium MOS-FET’s, superconductor-semiconductor devices,GaInAs/GaAlAs SISFET’s, and flat panel displaytechnology. In 1992, he joined the faculty of The

Pennsylvania State University, University Park, as a Professor of ElectricalEngineering. His research interests center on exploratory electronic devices,electronic materials, and device technology. Current areas of particularinterest include organic electronic devices, display technology, wide bandgapsemiconductors (especially SiC and GaN), power devices, high-speed III–Vdevices, ultra-small devices and quantum devices, optoelectronic integration,superconductor-semiconductor interactions, and microfabrication.