PDACS Final Presentation Michelle Berger John Curtin Trey Griffin Aaron King Michael Nordfelt...
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Transcript of PDACS Final Presentation Michelle Berger John Curtin Trey Griffin Aaron King Michael Nordfelt...
PDACSPDACS
Final Presentation
Michelle Berger
John Curtin
Trey Griffin
Aaron King
Michael Nordfelt
Jeffrey Whitted
PDACSPDACS
Portable
Digital
Audio
Codec
System
PDACS is...
PDACSPDACS
Overview
PDACS is a portable device designed for capturing, compressing, storing, playback, and retrieval of digital audio data. It samples speech, performs compression, and stores it in non-volatile memory. The data can then later be played back directly from the device or transferred to a PC by means of the serial port interface.
PDACSPDACS
PDACSPDACS
Divide-and-Conquer Methodology
• Audio Subsystem
• Memory Subsystem
• Compression Subsystem
• Serial Port Subsystem
• GUI Application
PDACSPDACS
Mic JackMic
Amp
Analog/DigitalConverter
Digital/AnalogConverter
FilterClock
Spkr
Input Filter(buffered output,
3 kHz LP)
Output Filter(3kHz LP)
InverterOutput Amp
8-bit bus
Bus Interface to Xilinx (8kHz sampling)
Chip
Select
8-bit bus
DC Offset
AUDIO IN
AUDIO OUT
8-bit, 8kHz, Mono
PDACSPDACS
Problems in Building Audio Subsystem
• D/A would not work• A/D quit working (NO pin)• Input and output signals not amplified• Input and output signals not filtered• Microphone output needed DC offset
• Number one problem: General lack of knowledge about analog signal
PDACSPDACS
Memory Subsystem
• Atmel 16-Megabit 5-volt Serial DataFlash Memory
SignalAbbreviation
Signal Name Signal Description
SO Serial Output Data Output pin from the memory chipSCK Serial Clock Control signal from Xilinx to the memory chip
SI Serial Input Input pin to the memory chip(used for commands and data)
CS* Chip Select An active low signal that enables the memory to beread from or written to
RESET* Chip Reset An active low signal that will terminate theoperation in progress and reset the internal statemachine to an idle state
WP* Hardware PageWrite Protect Pin
An active low signal that forbids the first 256 pagesof main memory to be reprogrammed when asserted
PDACSPDACS
Memory Subsystem• Atmel 16-Megabit 5-volt Serial DataFlash
Memory
PDACSPDACS
• Read command(opcode = 52H)
• Buffer write command(opcode = 84H[buffer1], 87H [buffer2])
• Main memory program command(opcode = 83H[buffer1], 86H[buffer2])
Memory Subsystem
Opcode Page address Byte address Don’t Care [X](10 bits) (12 bits) (10 bits) (32 bits)
Opcode Don’t Care [X] Buffer address (10 bits) (12 bits) (10 bits)
Opcode Page address Don’t Care [X](10 bits) (12 bits) (10 bits)
PDACSPDACS
Memory SubsystemVerilog module flow:• Determine read, buffer write, or main memory
program and set matching opcode• Clock in the necessary bits one at a time• Update control variables and test the edge
conditions
PDACSPDACS
Compression Algorithms
Algorithms Studied• Run Length Encoding RLE• DCT• Companding• Vector Encoding
PDACSPDACS
Compression Algorithms
DCT
• Performs Discrete Cosine Transforms on a series of data.
• Divides the result by a quantitization matrix
• The results usually contain long runs of zeroes, ideal for run length encoding
PDACSPDACS
Compression Algorithms
IDCT
16,17,18,19,20,21,22,23 55, -6, 0, 0, 0, 0, 0, 0 QuantitizationMatrix
55, -6, 0, 0, 0, 0, 0, 0
DCT
QuantitizationMatrix
16,16,17,18,20,21,21,22
PDACSPDACS
Compression Algorithms
Companding/Vector Encoding
• Companding is a lossy compression– Reduces the number of bits for each sample
• Vector encoding– encodes the differences between the
companded values
PDACSPDACS
Serial Subsystem
Specs:• Consists of two chips (16550 UART and Max232)
and a 9-pin serial jack• Pin count to the Xilinx stands at 17• Have robust serial module that is capable of
reading and writing to memory based on control characters from PC
PDACSPDACS
Serial SubsystemDownload
Memory XILINX 16550 ApplicationMaster Reset
DSR
DSR Active
Notify GetData
Data
Last Block
DataData
DataData
Set DTR
DTR
DTR (Data finished) DSR
Max232(Computer Ready)
‘aa’‘aa’
PDACSPDACS
Serial SubsystemUpload
Memory XILINX 16550 ApplicationMaster Reset
DSR
DSR Active
Write Data
Data
Data
DTR
Max232(Computer Ready)
‘bb’‘bb’
Data
DataWrite Data
ResetDTR
(End of File)DSR
PDACSPDACS
GUI
• Allows user to access the serial port and download the data from the device.
• Also allows user to upload file to device.• The GUI was developed in Visual Basic (to allow
rapid development)• Visual Basic allows read/writing to all control
lines for serial communication.
PDACSPDACS
GUI
• Decompresses sound files through software, output to a .wav file
• Allows user to play
a audio file
through the Windows
multimedia player.
PDACSPDACS
System Integration
•Memory to Serial Integration•Audio to Memory•Audio to Codec•Codec to Memory•Serial to GUI
PDACSPDACS
PDACSPDACS
What We Wanted to Have
• Real-time compression of 8-bit 8KHz speech• Storage & retrieval of sound files• Real-time decompression of stored audio • Serial interface with PC for storage and archiving• GUI application that facilitates easy retrieval• Built in controls for recording, playback &
deletion
PDACSPDACS
What We Have• Real Time Capture and Storage of 8-bit 8 kHz
speech• Storage & retrieval of sound files• Serial Interface with the PC for storage and
archiving• GUI application that facilitates easy retrieval• Controls for recording playback and deletion• Pass through playback of 8-bit 8KHz audio
PDACSPDACS
What We Dropped
• Portability• Power Subsystem• Completely Integrated Finished Product• Real-time compression & decompression of audio
PDACSPDACS
And Remember…
Xilinx is cool, but it’s occasionally bogus.
-Scott