PCB STACK UP TW7- DESIGN 1 -...

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A A

B B

C C

D D

PG 31

PG 38

PG 3,4

SATA - HDD

PG 40CPU VR

PG 32

PG 30

SATA0ICH8-M

DC/DC3VSUS5VSUS

USB2.0 (P5)

Internal ODD

PG 31

PG 36

Merom

DDRII-SODIMM1

DDRII-SODIMM2

KeyMatrix

X-Bus

PG

RUN POWER SW

PG 37

Panel Connector

PG 43

CLOCKS

CD-ROM

Azalia

PG 24

AC/BATTCONNECTOR

PG 16,17

Bluetooth

1299 FCBGA 35X35

USB2.0 I/OPorts PG 26

PG 23

BATTCHARGER

TouchPad

TI PC7402

PATA 100

PG 33

USB2.0 (P0~P1,P4)

PG 16,17

PG 35

PG 2

Crestline (G)MCHLVDS(2 Channel)

S-Video

VGA,DVI

Internal Speaker

PG43

Realtek

DMI X4

AudioJacks

FSB 667/800

PG 24

LPC

PG 33

PG 40

PCI Bus 33MHz

PG 36

TVOUT

KBC

TW7- DESIGN

VGA

PG 12,13,14,15

PG 30

USB2.0(P0~P7)

LAYER 8 : BOT

LAYER 7 : SGND2

LAYER 2 : SGND1

LAYER 6 : IN3

LAYER 1 : TOP

LAYER 5 : VCC

PCB STACK UP

LAYER 4 : IN2

LAYER 3 : IN1

ALC268

PCI-E, 1X

PCI-E, 1X

DDRII 533/667

DDRII 533/667

PCI-Express X16

LAN

LPT PORT

COM PORT

VGA

Power Input

35W

PG 35

Express Card x1

PCI-E, 1X

USB

ReplicatorDaughter Board

PG 37

RQ6

IEEE1394 Card readerCONN

ICS9LPRS365BGLFT

PG 29,30

Headphone

1394

USB X 2

NEW CARD

1

(478 Micro-FCPGA)

5,6,7,8,9,10,11

965GM/PMDDRII VR

PG 39

PG 40

TPM1.2

DC/DCVGA CORE

PG42

DC/DC+1.05V+1.5V

PG37

DC/DC3VPCU5VPCU

PG38

31TW7MB00XX

Power On

652 BGA 31X31

PG 38

SPIROM

152D

0763SSID

SVID

PG 29

TPA0312Audio Amplifier HP Amplifier

PG 33MAX4411

MDC DAA

PG 34

DaughterMic

PG 32Jacksin

PG 33

LineBoard

RJ11+USB

Function Board

Conn

PG 28PCI Express Mini CardMini PCI-E Card *2

PG 35

LAN

PG 26 PG 27Magnetics

MarvellRJ45PG 27

Camera PG 23USB2.0 (P3)

8055,8038

ENE KB3926 A01

Green Blue Pink

64 Bit Bandwidth

10~13W

PG 18~22

nVIDIA

16M*16(128MB)

(Bank*4)32M*16(256MB)

NB8M-GS533 BGA23X23

DDRII

1.15V

Block Diagram 3A1 54Friday, April 13, 2007

Size Document Number Rev

Date: Sheet of

Quanta Computer Inc.PROJECT : TW7

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A A

B B

C C

D D

1 = ExternalVGA SRCT0 SRCC0 27Mout-NSS 27Mout-SS

120 ohms@100Mhz

120 ohms@100Mhz

14.318MHz

100

DOT96T

FSA CPU SRC PCI

1

10

1

1

GCLK_SEL = FCTSEL1

FCTSEL1(PIN13)

1K to NB only whenXDP is implement.NoXDP can use 0 ohm

CPU Clock select

1

1 100

0 33

133

RSVD

100100100100

3333

1

0=UMA

PIN24

SRCT1/LCDT_100DOT96C

PIN20FSC FSB

1

1 = External VGAPIN25

1

1

0=UMA PIN21

100100100

33333333

0

166200266333400

DisableITP

1

00

1 330

0

0000 0

02

SRCT1/LCDT_100

for EMI

0=overclockingof CPU andSRC Allowed

1 = overclockingof CPU and SRCnot Allowed

CRB-->2.2KBSEL0,BSEL2

遠離螺絲孔

5 * 3.2

30PPM,CL=20PF

B2A-->Add L89,R278

RTM875T-606-LFT(AL000875K06)

CLOCK GENERATOR 2A2 54Friday, April 13, 2007


Date: Sheet of


NEW-CARD_CLK_REQ#

PCI_PCCARDR_PCLK_KB3926

FSC

PCI_MINIPCI

CLK_3GPLLREQ#

CLK_XTAL_OUT

CPU_MCH_BSEL0

FCTSEL1

FCTSEL1

+CK_VDD_MAIN2

CPU_MCH_BSEL1

+CK_VDD_MAIN2

CLK_3GPLLREQ#

CLK_XTAL_IN

DOT96_SSC

+CK_VDD_MAIN

DOT96_SSC#

FSB

NEW-CARD_CLK_REQ#

DOT96#

CLK_XTAL_IN

DOT96

CLK_XTAL_OUT

CPU_MCH_BSEL2

ITP_EN

PCIE_VGA#PCIE_VGA

CLK_PCI_KB3926

CLK_PCI_PCCARD

CLK_PCI_ICH

PCLK_LPC_DEBUG

CLK_ICH_14MFSA

+CK_VDD_MAIN

VDDCPU

NEW-CARD_CLK_REQ#_RCLK_3GPLLREQ#_R

PCI_MINIPCI

CGDAT_SMB

CGCLK_SMBCGDAT_SMBCGCLK_SMB

PCLK_TPM

CLK_ICH_48M

CK_PWG

VDDCPU

CLK_7402_48M

PCICLK3

ITP_EN

FSLA_BSEL0

FSLA_BSEL0

MCH_BCLKMCH_BCLK#

CPU_BCLK#CPU_BCLK

+3V

+1.05V

+1.05V

+1.05V

+3V

+3V

+3V

+3V

R275 1K/F

R278 0_4

C8350.1U/10V_4

12

C8470.1U/10V_4

12

R279 4.7K_4

C533 10P/50V_4

R566 33

C8240.1U/10V_4

12

RP62 4P2R-S-024

13

C81322P/50V_4

12

R300

10K_4

12

R282 22_4

C818 10P/50V_4

R601 475/F

C814

4.7U/6.3V_6

C537

0.1U/10V_4

12

R273 4.7K_4

R563 33

Q272N7002E

3

2

1

C513 10P/50V_4

C547

4.7U/6.3V_6

R287 0_4

RP68 *4P2R-S-024

13

CK505

U35

ICS9LPRS365BGLFT

16

1817

4612

1314

5051

3955

6129

20

5354

47

264536

4948

6059

5657

6463

151911528

58232942

2122

2425

2728

3837

4140

4443

3031

3435

3332

13456

7

10

62

VDDPLL3

27Mhz_ss/SRCCLC1/SE227MHz_Nonss/SRCCLK1/SE1

CPUT2_ITP/SRCC8VDD96I/O

DOTT_96/SRCT0DOTC_96/SRCC0

CPUCLKC1CPUCLKT1

VDDSRCVDDCPU

VDDREFVDDPCIVDD48

VDDPLL3I/O

CPUCLKC0CPUCLKT0

CPUT2_ITP/SRCT8

VDDSRCI/OVDDSRCI/OVDDSRCI/O

VDDCPU_IONC

X1X2

CK_PWRGD/PD#FSLB/TEST_MODE

SCLKSDATA

GNDGNDGND48GNDCPUGNDPCIGNDREFGNDSRCGNDSRCGNDSRC

SRCCLKT2/SATACLSRCCLKC2/SATACL

SRCCLKT3/CR#_CSRCCLKC3/CR#_D

SRCCLKT4SRCCLKC4

PCI_STOP#CPU_STOP#

SRCCLKT6SRCCLKC6

SRCCLKT7/CR#_FSRCCLKC7/CR#_E

SRCCLKT9SRCCLKC9

SRCCLKT10SRCCLKC10

SRCCLKT11/CR#_HSRCCLKC11/CR#_G

PCICLK0/CR#_APCICLK1/CR#_B

PCICLK2/TMEPCICLK3

PCICLK4/27_SELECT

PCI_F5/ITP_EN

USB_48MHZ/FSLA

FSLC/TST_SL/REF

C8150.1U/10V_4

12

C817 10P/50V_4

C550

4.7U/6.3V_6

C522 10P/50V_4

C8214.7P/50V_4

C541

4.7U/6.3V_6

C8560.1U/10V_4

12

R567 33

R270 1K/F

R277 22_4

C534

4.7U/6.3V_6

L46

BLM18PG121SN1D

1 2

R284 1K/F

R301 33

C5520.1U/10V_4

12

R26510K_4

12

C526 10P/50V_4

R266

*4.7K_4

C518 10P/50V_4

C8060.1U/10V_4

12

R272 0_4

L45

BLM18PG121SN1D

1 2

R570 0_4

R269 *0_4

L89BLM18AG601SN1D

1 2

L44

BLM18PG121SN1D

1 2

C5270.1U/10V_4

12

R268 0_4

R290 *0_4

R271 33

C810 10P/50V_4

C81222P/50V_4

12

C8270.1U/10V_4

12

R267 *10K_4

R571 4.7K_4

RP604P2R-S-2.2K

2 41 3

Q282N7002E

3

2

1

C8080.1U/10V_4

12

RP63 4P2R-S-024

13

Y5

14.318MHZBG614318F33

1 2

RP61 4P2R-S-024

13

R568 0_4

R28910K_4

12

C8300.1U/10V_4

12

C8500.1U/10V_4

12

RP64 4P2R-S-024

13

C8160.1U/10V_4

12

C8340.1U/10V_4

12

R610 10K_412C542

4.7U/6.3V_6

R285 33

R602 10K_412

R605 475/F NEW-CARD_CLK_REQ# [36]

CLK_PCIE_SATA [12]

CLK_PCIE_ICH# [13]CLK_PCIE_ICH [13]

CLK_PCIE_SATA# [12]

MCH_BSEL0 [6]

CPU_MCH_BSEL1[3] MCH_BSEL1 [6]

CPU_MCH_BSEL0[3]

CPU_MCH_BSEL2[3] MCH_BSEL2 [6]

DREF_SSCLK [6]DREF_SSCLK# [6]

MCH_DREFCLK# [6]MCH_DREFCLK [6]

CLK_PCIE_EXPCARD# [36]CLK_PCIE_EXPCARD [36]

CLK_3GPLLREQ# [6]

CLK_MCH_3GPLL [6]CLK_MCH_3GPLL# [6]

CK_PWG[14]

CLK_PCIE_MINI1# [35]CLK_PCIE_MINI1 [35]

CLK_PCIE_LAN [26]CLK_PCIE_LAN# [26]

PM_STPCPU# [14]PM_STPPCI# [14]

CLK_PCI_PCCARD [29]CLK_PCI_KB3926 [39]

CLK_ICH_48M [14]

CLK_ICH_14M [14]

CLK_7402_48M [30]

CGCLK_SMB[16,35]CGDAT_SMB[16,35]PCLK_SMB[14,36]

PDAT_SMB[14,36]

CLK_PCIE_VGA# [18]CLK_PCIE_VGA [18]

PCLK_TPM [41]

CLK_PCI_ICH [13]

PCLK_LPC_DEBUG [35]

CLK_PCIE_MINI2# [35]CLK_PCIE_MINI2 [35]

CLK_CPU_BCLK# [3]

CLK_MCH_BCLK# [5]CLK_MCH_BCLK [5]

CLK_CPU_BCLK [3]

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A A

B B

C C

D D

Layout Note:Place R4,R361,R346 & R7 close to CPU.

Note: Populate R5, R8, C372 & R430 when ITP connector is populated.

ITP disable guidelines

Signal Resistor Value Connect To Resistor Placement

Within 2.0" of the ITPVTT

VTT

VTT

GND

GND

150 ohm +/- 5%

39 ohm +/- 1%

500-680ohm +/- 5%

27 ohm +/- 1%

TDI

TMS

TRST#

TCK

TDO

Within 2.0" of the ITP




Comp0,2 connect with Zo=27.4ohm,Comp1,3connect with Zo=55ohm, make those traceslength shorter than 0.5".Trace should beat least 25 mils away from any othertoggling signal.

Place C close to theCPU_TEST4 pin. Make sureCPU_TEST4 routing isreference to GND and awayfrom other noisy signal.

Layout Note:Place voltagedivider within0.5" of GTLREFpin

BSEL2 BSEL1 BSEL0

667

FSB

800

Layout Note:Place R8 close ITP.

0

00

1

1

1

BCLK

166

200

533 0 0 1133

For the purpose of testability, route these signalsthrough a ground referenced Z0 = 55ohm trace thatends in a via that is near a GND via and isaccessible through an oscilloscope connection.

Note:H_DPRTSTP need to daisy chainfrom ICH8 to IMVP6 to CPU.

Populate ITP700Flex for bringup

150 ohm +/- 5%

Reserved for EMI.

ITP debug signals

For Throttle Function

Add for ESDNear to CPU

03

遠離螺絲孔

遠離螺絲孔

Merom CPU Socket PN:FOX: DGT^000021TYC: DGT^000012MLX: DGT^000004MLX: DGT^000000

Merom (HOST BUS) 2B3 54Friday, April 13, 2007


Date: Sheet of


ITP_TCK

H_RST#

H_REQ#[0..4]

H_A#11

H_A#8

H_REQ#4

H_A#6

H_A#9

H_A#5

H_REQ#1

H_A#14

H_A#16

H_REQ#0

H_A#13

H_A#[3..16]

H_A#15

H_A#7

H_REQ#3

H_A#10

H_A#12

H_REQ#2

H_A#[17..35]

H_A#28

H_A#23

H_A#17

H_A#22

H_A#20

H_A#25H_A#26

H_A#29

H_A#18

H_A#21

H_A#30

H_A#19

H_A#27

H_A#24

H_A#31H_A#32H_A#33H_A#34H_A#35

H_ADSTB#1

H_IGNNE#

H_SMI#H_NMI

H_FERR#

H_INTR

H_A20M#

H_STPCLK#

CLK_CPU_BCLKCLK_CPU_BCLK#

PM_THRMTRIP#

H_THERMDAH_THERMDC

ITP_TDO

ITP_BPM#2

ITP_BPM#4

ITP_TRST#

ITP_TDI

ITP_BPM#3

ITP_TMS

ITP_BPM#0

ITP_TCKITP_BPM#5

ITP_BPM#1

H_ADS#

H_LOCK#

H_BPRI#H_BNR#

H_HIT#

H_DEFER#

H_HITM#

H_TRDY#

H_RS#1H_RS#2

H_RS#0

H_DBSY#H_DRDY#

H_INIT#H_IERR#

H_D#13

H_D#3

H_D#8

H_D#10

H_D#0

H_D#5

H_D#12

H_D#7H_D#6

H_D#11

H_D#4

H_D#14

H_D#2H_D#1

H_D#15

H_D#9

H_D#[0..63]

H_D#[0..63]

H_D#22

H_D#26H_D#25

H_D#16

H_D#19

H_D#23

H_D#29

H_D#20H_D#21

H_D#17

H_D#28

H_D#18

H_D#30

H_D#27

H_D#24

H_D#31

H_D#[0..63]

H_D#35

H_D#37

H_D#43H_D#44

H_D#38

H_D#33

H_D#39

H_D#42

H_D#34

H_D#32

H_D#47H_D#46

H_D#40

H_D#36

H_D#41

H_D#45

H_D#58

H_D#56

H_D#50

H_D#61

H_D#57

H_D#59

H_D#53

H_D#51H_D#52

H_D#48

H_D#55

H_D#63

H_D#54

H_D#62

H_D#60

H_D#49

H_D#[0..63]

COMP3COMP2COMP1COMP0

COMP3COMP2COMP1COMP0

CPU_TEST2

CPU_MCH_BSEL2

V_CPU_GTLREFCPU_TEST1

CPU_MCH_BSEL0CPU_MCH_BSEL1

CPU_TEST3CPU_TEST4CPU_TEST5CPU_TEST6

CPU_TEST4

CPU_TEST6

CPU_TEST1

CPU_TEST2

H_BR0#

ITP_TRST#

CPU_TEST3CPU_TEST5

ITP_TDO

ITP_BPM#0

ITP_BPM#5

ITP_BPM#1

ITP_TMSITP_BPM#3ITP_BPM#2

ITP_BPM#4

ITP_TRST#

ITP_TCK

ITP_TDI

CPU_PROCHOT#CPU_PROCHOT#

H_A#4H_A#3

CPU_PROCHOT#

THERM_CPUDIE_L#PM_THRMTRIP#

SYS_RST#

H_RST#

CPU_PROCHOT#

+1.05V

+1.05V

+1.05V

+1.05V

+1.5V

+5V

3VPCU

+1.05V

+1.05V+1.05V

Q4*2N7002E

3

2

1

T10

R8 *0_41 2T6

C6510.1U/10V_4

12

R21*1K/F

R39668_4

12

R332K/F

12

R28 56.2_4

R26 *1K/F1 2

R395100K_4

T12

T15

Q252N7002E

3

2

1

R321K/F

12

R27 *1K/F1 2

T13T5

R1 *22.6/F_61 2

R554.9/F

12

R394*330_6

T2

R3027.4/F

12

T39

R627.4/F

12

R2 0_4

T7

T11

R739/F

12

RV3

*VZ0603M260APT

1 2

RV1*VZ0603M260APT

12

T8

R4150_4

12

R1127.4/F

12

RV2*VZ0603M260APT

12

C93 *0.1U/10V_412

T4

R9*51_4

12

R23 *0_41 2

R20 *0_4

R19*10K_4

Q24*MMBT3904

2

1 3

R10649/F

12

Q3DTC144EUA

13

2

ADDR GRO

UP0

ADDR GRO

UP1

CONT

ROL

XDP/

ITP

SIG

NALS

H CLK

THERMAL

RESE

RVED

ICH

U19A

Merom Ball-out Rev 1a

N3P5P2L2P4P1R1

Y2U5R3W6U4Y5U1R4T5T3

W2W5Y4

J4

U2V4

M4N5T2V3B2C3D2

D22

L5L4K5M3N2J1

A6

H1

M1

V1

D3

A22A21

E2

AD4AD3AD1AC4

G5

F1

C20

E1

H5F21

A5

G6E4

D20

C4

B3

C6B4

H4

AC2AC1

D21

K3H2K2J3L1

C1F3F4G3

A3

D5

AC5AA6AB3

C7

A24B25

AB5

G2

AB6

W3AA4AB2AA3

F6

A[10]#A[11]#A[12]#A[13]#A[14]#A[15]#A[16]#

A[17]#A[18]#A[19]#A[20]#A[21]#A[22]#A[23]#A[24]#A[25]#A[26]#A[27]#A[28]#A[29]#

A[3]#

A[30]#A[31]#

RSVD[01]RSVD[02]RSVD[03]RSVD[04]RSVD[05]RSVD[06]RSVD[07]RSVD[08]

A[4]#A[5]#A[6]#A[7]#A[8]#A[9]#

A20M#

ADS#

ADSTB[0]#

ADSTB[1]#

RSVD[09]

BCLK[0]BCLK[1]

BNR#

BPM[0]#BPM[1]#BPM[2]#BPM[3]#

BPRI#

BR0#

DBR#

DBSY#

DEFER#DRDY#

FERR#

HIT#HITM#

IERR#

IGNNE#

INIT#

LINT0LINT1

LOCK#

PRDY#PREQ#

PROCHOT#

REQ[0]#REQ[1]#REQ[2]#REQ[3]#REQ[4]#

RESET#RS[0]#RS[1]#RS[2]#

SMI#

STPCLK#

TCKTDI

TDO

THERMTRIP#

THERMDATHERMDC

TMS

TRDY#

TRST#

A[32]#A[33]#A[34]#A[35]#

RSVD[10]

R3154.9/F

12

T1

Q2

*MMBT3904

2

1 3

DATA GRP 0

DATA GRP 1

DATA

GRP

2DA

TA G

RP 3

MISC

U19B

Merom Ball-out Rev 1a

R26U26AA1Y1

E22F24

J24J23H22F26K22H23

N22K25P26R23

E26

L23M24L22M23P25P23P22T24R24L25

G22

T25N25

Y22AB24V24V26V23T22U25U23

F23

Y25W22Y23W24W25AA23AA24AB25

AE24AD24

G25

AA21AB22AB21AC26AD20AE22AF23AC25AE21AD21

E25

AC22AD23AF22AC23

E23K24G24

AF1

H25

N24

U22

AC20

E5B5D24

J26

L26

Y26

AE25

H26

M26

AA26

AF24

AD26

AE6

D6D7

C24

B22B23C21

D25

AF26

A26

C23 COMP[0]COMP[1]COMP[2]COMP[3]

D[0]#D[1]#

D[10]#D[11]#D[12]#D[13]#D[14]#D[15]#

D[16]#D[17]#D[18]#D[19]#

D[2]#

D[20]#D[21]#D[22]#D[23]#D[24]#D[25]#D[26]#D[27]#D[28]#D[29]#

D[3]#

D[30]#D[31]#

D[32]#D[33]#D[34]#D[35]#D[36]#D[37]#D[38]#D[39]#

D[4]#

D[40]#D[41]#D[42]#D[43]#D[44]#D[45]#D[46]#D[47]#

D[48]#D[49]#

D[5]#

D[50]#D[51]#D[52]#D[53]#D[54]#D[55]#D[56]#D[57]#D[58]#D[59]#

D[6]#

D[60]#D[61]#D[62]#D[63]#

D[7]#D[8]#D[9]#

TEST5

DINV[0]#

DINV[1]#

DINV[2]#

DINV[3]#

DPRSTP#DPSLP#DPWR#

DSTBN[0]#

DSTBN[1]#

DSTBN[2]#

DSTBN[3]#

DSTBP[0]#

DSTBP[1]#

DSTBP[2]#

DSTBP[3]#

GTLREF

PSI#

PWRGOODSLP#

TEST3

BSEL[0]BSEL[1]BSEL[2]

TEST2

TEST4

TEST6

TEST1

R3*51/F

12

T3

H_A#[3..16][5]

H_REQ#[0..4][5]H_ADSTB#0[5]

H_A#[17..35][5]

H_ADSTB#1[5]

H_FERR#[12]

H_STPCLK#[12]H_INTR[12]H_NMI[12]H_SMI#[12]

H_IGNNE#[12]

H_A20M#[12]

CLK_CPU_BCLK [2]CLK_CPU_BCLK# [2]

PM_THRMTRIP# [6,12]

H_THERMDA [4]H_THERMDC [4]

H_LOCK# [5]

H_BPRI# [5]H_BNR# [5]

H_HIT# [5]

H_DEFER# [5]

H_RS#1 [5]H_RS#2 [5]

H_RS#0 [5]

H_BR0# [5]H_DBSY# [5]H_DRDY# [5]

H_INIT# [12]

H_DSTBP#0[5]

H_D#[0..63][5]

H_D#[0..63][5]

H_DSTBP#3 [5]H_DSTBN#3 [5]

H_DSTBP#2 [5]H_DSTBN#2 [5]

H_DINV#2 [5]

H_DINV#3 [5]

H_D#[0..63] [5]

H_D#[0..63] [5]

H_DPSLP# [12]

PM_PSI# [42]

H_DPRSTP# [6,12,42]

H_DPWR# [5]

H_PWRGD [12]

H_CPUSLP# [5]

H_DINV#0[5]

H_DSTBN#0[5]

H_DSTBP#1[5]H_DINV#1[5]

H_TRDY# [5]

H_HITM# [5]

H_ADS# [5]

H_DSTBN#1[5]

CPU_MCH_BSEL2[2]CPU_MCH_BSEL1[2]CPU_MCH_BSEL0[2]

SYS_RST# [14]

VGA_LESS# [19]

FANLESS#[39]

H_RESET# [5]

THERM_CPUDIE# [39]

VR_TT# [42]

THERM_CPUDIE_L# [19]

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A A

B B

C C

D D

6 inside cavity, north side, primary layer.

Layout out:Place these inside socket cavity on North side secondary.

Layout Note:Place C105 near PINB26.

8 inside cavity, north side, secondary layer.

8 inside cavity, south side, secondary layer.

6 inside cavity, south side, primary layer.

ICCA 130mA

ICCP:1before vccore stablepeak current is 4.5A2.after vccore stablecontinue current is2.5A

ICCODE:for Merom processorsrecommended designtarget is 44A

10U/4V_8 *32

add hardware protect

ADDRESS: 98H

25mils

10/10mils

04

D3A

E3B

G3D

Merom Processor (POWER) 3D4 54Friday, April 13, 2007


Date: Sheet of


TP_VSSSENSE

TP_VCCSENSE

LM86_SMDH_THERMDA

H_THERMDC

THERM_ALERT#

LM86_SMC

SYS_SHDN-1#

LM86_SMD

LM86_SMC

SYS_SHDN-1#

LM86VCC

VCC_CORE

VCC_CORE

VCC_CORE

VCC_CORE

VCC_CORE

VCC_CORE

+1.05V

VCC_CORE VCC_CORE

+1.05V

+1.5V

VCC_CORE

+3V

+3V

+3V

+3V

5V_AL+3V

C4210U/6.3V_8

12

U19C

Merom Ball-out Rev 1a .

A7A9

A10A12A13A15A17A18A20B7B9

B10B12B14B15B17B18B20C9

C10C12C13C15C17C18D9

D10D12D14D15D17D18

E7E9

E10E12E13E15E17E18E20

F7F9

F10F12F14F15F17F18F20AA7AA9

AA10AA12AA13AA15AA17AA18AA20AB9

AC10AB10AB12AB14AB15AB17AB18

AB20AB7AC7AC9AC12AC13AC15AC17AC18AD7AD9AD10AD12AD14AD15AD17AD18AE9AE10AE12AE13AE15AE17AE18AE20AF9AF10AF12AF14AF15AF17AF18AF20

B26

J6K6M6J21K21M21N21N6R21R6T21T6V21W21

AF7

AD6AF5AE5AF4AE3AF3AE2

AE7

C26

G21V6

VCC[001]VCC[002]VCC[003]VCC[004]VCC[005]VCC[006]VCC[007]VCC[008]VCC[009]VCC[010]VCC[011]VCC[012]VCC[013]VCC[014]VCC[015]VCC[016]VCC[017]VCC[018]VCC[019]VCC[020]VCC[021]VCC[022]VCC[023]VCC[024]VCC[025]VCC[026]VCC[027]VCC[028]VCC[029]VCC[030]VCC[031]VCC[032]VCC[033]VCC[034]VCC[035]VCC[036]VCC[037]VCC[038]VCC[039]VCC[040]VCC[041]VCC[042]VCC[043]VCC[044]VCC[045]VCC[046]VCC[047]VCC[048]VCC[049]VCC[050]VCC[051]VCC[052]VCC[053]VCC[054]VCC[055]VCC[056]VCC[057]VCC[058]VCC[059]VCC[060]VCC[061]VCC[062]VCC[063]VCC[064]VCC[065]VCC[066]VCC[067]

VCC[068]VCC[069]VCC[070]VCC[071]VCC[072]VCC[073]VCC[074]VCC[075]VCC[076]VCC[077]VCC[078]VCC[079]VCC[080]VCC[081]VCC[082]VCC[083]VCC[084]VCC[085]VCC[086]VCC[087]VCC[088]VCC[089]VCC[090]VCC[091]VCC[092]VCC[093]VCC[094]VCC[095]VCC[096]VCC[097]VCC[098]VCC[099]VCC[100]

VCCA[01]

VCCP[03]VCCP[04]VCCP[05]VCCP[06]VCCP[07]VCCP[08]VCCP[09]VCCP[10]VCCP[11]VCCP[12]VCCP[13]VCCP[14]VCCP[15]VCCP[16]

VCCSENSE

VID[0]VID[1]VID[2]VID[3]VID[4]VID[5]VID[6]

VSSSENSE

VCCA[02]

VCCP[01]VCCP[02]

C180.1U/10V_4

12

C5410U/6.3V_8

12

C2010U/6.3V_8

12

C5710U/6.3V_8

12

C70.1U/10V_4

12

C3910U/6.3V_8

12

C2310U/6.3V_8

12

C88*2200pF/50V

C5610U/6.3V_8

12

R5210K_4

U19D

Merom Ball-out Rev 1a .

P6

AE11

A8A11A14A16A19A23AF2

B6B8

B11B13B16B19B21B24C5C8

C11C14C16C19C2

C22C25D1D4D8

D11D13D16D19D23D26

E3E6E8

E11E14E16E19E21E24

F5F8

F11F13F16F19F2

F22F25G4G1

G23G26

H3H6

H21H24

J2J5

J22J25K1K4

K23K26

L3L6

L21L24M2M5

M22M25

N1N4

N23N26

P3 A25AF21AF19AF16AF13AF11AF8AF6A2AE26AE23AE19

P21P24R2R5R22R25T1T4T23T26U3U6U21U24V2V5V22V25W1W4W23W26Y3

Y21Y24AA2AA5AA8AA11AA14AA16AA19AA22AA25AB1AB4AB8AB11AB13AB16AB19AB23AB26AC3AC6AC8AC11AC14AC16AC19AC21AC24AD2AD5AD8AD11AD13AD16AD19AD22AD25AE1AE4

Y6

A4

AE14AE16

AE8

AF25

VSS[082]

VSS[148]

VSS[002]VSS[003]VSS[004]VSS[005]VSS[006]VSS[007]VSS[008]VSS[009]VSS[010]VSS[011]VSS[012]VSS[013]VSS[014]VSS[015]VSS[016]VSS[017]VSS[018]VSS[019]VSS[020]VSS[021]VSS[022]VSS[023]VSS[024]VSS[025]VSS[026]VSS[027]VSS[028]VSS[029]VSS[030]VSS[031]VSS[032]VSS[033]VSS[034]VSS[035]VSS[036]VSS[037]VSS[038]VSS[039]VSS[040]VSS[041]VSS[042]VSS[043]VSS[044]VSS[045]VSS[046]VSS[047]VSS[048]VSS[049]VSS[050]VSS[051]VSS[052]VSS[053]VSS[054]VSS[055]VSS[056]VSS[057]VSS[058]VSS[059]VSS[060]VSS[061]VSS[062]VSS[063]VSS[064]VSS[065]VSS[066]VSS[067]VSS[068]VSS[069]VSS[070]VSS[071]VSS[072]VSS[073]VSS[074]VSS[075]VSS[076]VSS[077]VSS[078]VSS[079]VSS[080]VSS[081] VSS[162]

VSS[161]VSS[160]VSS[159]VSS[158]VSS[157]VSS[156]VSS[155]VSS[154]VSS[153]VSS[152]VSS[151]

VSS[083]VSS[084]VSS[085]VSS[086]VSS[087]VSS[088]VSS[089]VSS[090]VSS[091]VSS[092]VSS[093]VSS[094]VSS[095]VSS[096]VSS[097]VSS[098]VSS[099]VSS[100]VSS[101]VSS[102]VSS[103]VSS[104]VSS[105]

VSS[107]VSS[108]VSS[109]VSS[110]VSS[111]VSS[112]VSS[113]VSS[114]VSS[115]VSS[116]VSS[117]VSS[118]VSS[119]VSS[120]VSS[121]VSS[122]VSS[123]VSS[124]VSS[125]VSS[126]VSS[127]VSS[128]VSS[129]VSS[130]VSS[131]VSS[132]VSS[133]VSS[134]VSS[135]VSS[136]VSS[137]VSS[138]VSS[139]VSS[140]VSS[141]VSS[142]VSS[143]VSS[144]VSS[145]VSS[146]

VSS[106]

VSS[001]

VSS[149]VSS[150]

VSS[147]

VSS[163]

C190.1U/10V_4

12

Q72N7002E

3

2

1

C4610U/6.3V_8

12

C600.1U/10V_4

12

R653100

C6550.01U/16V_4

12

C1610U/6.3V_8

12

C3010U/6.3V_8

12

C65610U/6.3V_8

12

C4010U/6.3V_8

12

C2410U/6.3V_8

12

R34*100

C4810U/6.3V_8

12

C4110U/6.3V_8

12

C3110U/6.3V_8

12

C590.1U/10V_4

12

C1710U/6.3V_8

12

C3810U/6.3V_8

12

C3710U/6.3V_8

12

C60.1U/10V_4

12

R591M_4

C3410U/6.3V_8

12

C890.1U/10V_4

U1

GMT-781

1

2

3

5

8

7

6

4

VCC

DXP

DXN

GND

SCLK

SDA

ALERT#

OVERT#

C2210U/6.3V_8

12

C5310U/6.3V_8

12

C5110U/6.3V_8

12

R22100/F

C5810U/6.3V_8

12

R18100/F

C5210U/6.3V_8

12

+C5330U/2V/ESR9

R3710K_4

C4910U/6.3V_8

12

C4410U/6.3V_8

12

Q92N7002E

32

1

C2110U/6.3V_8

12

C1550.1U/10V_4

12

C2810U/6.3V_8

12

C4310U/6.3V_8

12

C3310U/6.3V_8

12

R47 *0_4

C2710U/6.3V_8

12

R3810K_4

Q6

2N7002E3

2

1

C4710U/6.3V_8

12

Q5

2N7002E3

2

1

CPU_VID1 [42]CPU_VID2 [42]

CPU_VID6 [42]

CPU_VID3 [42]CPU_VID4 [42]CPU_VID5 [42]

CPU_VID0 [42]

TP_VCCSENSE [42]

TP_VSSSENSE [42]

H_THERMDA [3]

H_THERMDC [3]

THERM_OVER# [39,43]

THERM_ALERT#[14]

MBCLK[39,45]

MBDATA[39,45] LM86_SMD [19,20]

LM86_SMC [19,20]

SYS_SHDN-1#[19]

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A A

B B

C C

D D

Layout Note:H_RCOMP trace should be10-mil wide with 20-milspacing.

Layout Note:Place the 0.1 uFdecoupling capacitorwithin 100 mils fromGMCH pins.

impedance 55 ohm

Short Stub < 100milsextract from same point

Near NB

Add for ESD

05

Crestline (HOST) 1A5 54Friday, April 13, 2007


Date: Sheet of


H_D#[0..63]

H_D#13

H_D#3

H_D#8

H_D#10

H_D#0

H_D#5

H_D#12

H_D#7H_D#6

H_D#11

H_D#4

H_D#14

H_D#2H_D#1

H_D#15

H_D#9

H_D#22

H_D#26H_D#25

H_D#16

H_D#19

H_D#23

H_D#29

H_D#20H_D#21

H_D#17

H_D#28

H_D#18

H_D#30

H_D#27

H_D#24

H_D#31

H_D#35

H_D#37

H_D#43H_D#44

H_D#38

H_D#33

H_D#39

H_D#42

H_D#34

H_D#32

H_D#47H_D#46

H_D#40

H_D#36

H_D#41

H_D#45

H_D#58

H_D#56

H_D#50

H_D#61

H_D#57

H_D#59

H_D#53

H_D#51H_D#52

H_D#48

H_D#55

H_D#63

H_D#54

H_D#62

H_D#60

H_D#49

H_A#[3..35]

H_A#28

H_A#23

H_A#17

H_A#22

H_A#20

H_A#25H_A#26

H_A#29

H_A#18

H_A#21

H_A#30

H_A#19

H_A#27

H_A#24

H_A#31

H_A#11

H_A#8

H_A#6

H_A#9

H_A#5

H_A#3

H_A#14

H_A#16

H_A#13

H_A#15

H_A#4

H_A#7

H_A#10

H_A#12

H_A#32H_A#33H_A#34H_A#35

H_RCOMPH_SWING

H_CPUSLP#

H_DINV#1

H_DINV#3H_DINV#2

H_DINV#0

H_DSTBN#3H_DSTBN#2H_DSTBN#1H_DSTBN#0

H_DSTBP#3H_DSTBP#2H_DSTBP#1H_DSTBP#0

H_REQ#2H_REQ#1H_REQ#0

H_REQ#3H_REQ#4

H_RS#1H_RS#2

H_RS#0

H_SCOMP#H_SCOMP

H_REF

H_SCOMPH_SCOMP#

H_RCOMP

H_SWING

+1.05V

+1.05V

+1.05V

R4130_4

R56100/F

12

R5824.9_6

12

C1850.1U/10V_4

12

C1380.1U/10V_4

12

R57221/F

12

R691K/F

12

R41054.9/F

12

R41154.9/F

12

RV7*VZ0603M260APT

12

R732K/F

12

HOST

U24A

CRESTLINE_1p0

G17C14K16B13L16J17B14K19P15R17B16H20L19D17M17N16J19B18E19B17

J13

B15E17

B11C11M11C15F16L13

G12H17G20C8E8F12

AM7

B6

AM5

E2

A11H13

G2

M10

M3

W3

AB2

AJ14

AE5

N8H2

C10

N12N9H5

P13K9M2

W10Y8V4

G7

J1N5N3W6W9N2Y7Y9P4

M6

N1AD12

AE3AD9AC9AC7

AC14AD11AC11

H7

AD7AB1

Y3AC6AE2AC5AG3AJ9AH8

H3

AE9AE11AH12

AJ5AH5AJ6AE7AJ7AJ2

G4

AJ3AH2

AH13

F3

D6

K5L2AD13AE13

H8K7

M7K3AD2AH11

L7K2AC2AJ10

W1

B9A9

B7

E4C6G10

M14E13

B12

C18A19B19N19

B3

E5

C2

E12D7D8

W2

H_A#_10H_A#_11H_A#_12H_A#_13H_A#_14H_A#_15H_A#_16H_A#_17H_A#_18H_A#_19H_A#_20H_A#_21H_A#_22H_A#_23H_A#_24H_A#_25H_A#_26H_A#_27H_A#_28H_A#_29

H_A#_3

H_A#_30H_A#_31

H_A#_4H_A#_5H_A#_6H_A#_7H_A#_8H_A#_9

H_ADS#H_ADSTB#_0H_ADSTB#_1

H_BNR#H_BPRI#

H_BREQ#

HPLL_CLK#

H_CPURST#

HPLL_CLK

H_D#_0

H_REQ#_2H_REQ#_3

H_D#_1

H_D#_10

H_D#_20

H_D#_30

H_D#_40

H_D#_50

H_D#_60

H_D#_8H_D#_9

H_DBSY#

H_D#_11H_D#_12H_D#_13H_D#_14H_D#_15H_D#_16H_D#_17H_D#_18H_D#_19

H_D#_2


H_D#_3


H_D#_4


H_D#_5


H_D#_6

H_D#_61H_D#_62H_D#_63

H_D#_7

H_DEFER#

H_DINV#_0H_DINV#_1H_DINV#_2H_DINV#_3

H_DPWR#H_DRDY#

H_DSTBN#_0H_DSTBN#_1H_DSTBN#_2H_DSTBN#_3

H_DSTBP#_0H_DSTBP#_1H_DSTBP#_2H_DSTBP#_3

H_SCOMP

H_AVREFH_DVREF

H_TRDY#

H_HIT#H_HITM#H_LOCK#

H_REQ#_0H_REQ#_1

H_REQ#_4

H_A#_32H_A#_33H_A#_34H_A#_35

H_SWING

H_CPUSLP#

H_RCOMP

H_RS#_0H_RS#_1H_RS#_2

H_SCOMP#

H_D#[0..63][3]H_A#[3..35] [3]

H_ADS# [3]

H_DRDY# [3]

H_DBSY# [3]H_DEFER# [3]

H_BNR# [3]H_BPRI# [3]H_BR0# [3]

H_ADSTB#0 [3]H_ADSTB#1 [3]

CLK_MCH_BCLK [2]CLK_MCH_BCLK# [2]H_DPWR# [3]

H_HITM# [3]H_HIT# [3]

H_LOCK# [3]H_TRDY# [3]

H_CPUSLP#[3]

H_DINV#2 [3]H_DINV#1 [3]

H_DINV#3 [3]

H_DINV#0 [3]

H_DSTBN#3 [3]H_DSTBN#2 [3]H_DSTBN#1 [3]H_DSTBN#0 [3]

H_DSTBP#3 [3]H_DSTBP#2 [3]H_DSTBP#1 [3]H_DSTBP#0 [3]

H_REQ#0 [3]

H_REQ#4 [3]H_REQ#3 [3]H_REQ#2 [3]H_REQ#1 [3]

H_RS#0 [3]H_RS#1 [3]H_RS#2 [3]

H_RESET#[3]

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A A

B B

C C

D D

Layout Note:Location of all MCH_CFG strapresistors needs to be close tominmize stub.

IV&EV Dis/Enable setting

SDVO/PCIE/LVDS notimplement16 lanes NC

HSYNC/VSYNC serial Rplace close to NB

For EV@Connect to GNDCRT R/G/BTV A/B/CHSYNC/VSYNC

If no useDREFCLK PU andDREFCLK# PD

If no use DREFCLK PU andDREFCLK# PD

For IV@Connect to 150ohmCRT R/G/BTV A/B/CConnect to 39ohmHSYNC/VSYNC

WW22 update --- MA14 needsto be routed ifcustomers areplanning onusing 2Gbtechnology andwidth=8 (by 8)DIMMs

CRESTLINEnew pindefine

GMCH pwrok is 3.3vtolerant

For GM

06

遠離螺絲孔

Near to NB

-->150 ohm

For GM -->39 ohm

PM-->NC

For PM --> 0 ohm

96 Mhz

100 Mhz

Crestline (VGA,DMI) 2A6 54Friday, April 13, 2007


Date: Sheet of


MCH_BSEL1MCH_BSEL2

MCH_BSEL0

SMRCOMPPSMRCOMPN

MCH_CLVREF

SM_RCOMP_VOHSM_RCOMP_VOL

CFG19CFG20

CFG9

CFG13CFG12

MCH_CLVREF

DMI_TXP2

DMI_RXP1

DMI_RXN0

DMI_TXP1DMI_TXP0

DMI_RXN3

DMI_TXN1

DMI_TXN3

DMI_RXN2

DMI_RXP2

DMI_TXN0

DMI_TXN2

DMI_TXP3

DMI_RXP3

DMI_RXP0

DMI_RXN1

C_PEG_TXN14

C_PEG_TXP7

C_PEG_TXN4

C_PEG_TXP4

PEG_RXP3

PEG_RXN13

C_PEG_TXN1

C_PEG_TXN3

C_PEG_TXN13

PEG_RXN1

C_PEG_TXP5

PEG_RXP0

PEG_RXP5

PEG_RXP7

C_PEG_TXP14

PEG_RXN11

PEG_RXN15

PEG_RXN4

C_PEG_TXN10

C_PEG_TXP3

C_PEG_TXP6

PEG_RXP13

C_PEG_TXN0

C_PEG_TXP13

C_PEG_TXP9

C_PEG_TXN5

PEG_RXN5

C_PEG_TXN6

C_PEG_TXN9

PEG_RXN9

PEG_RXP11

PEG_RXP4

PEG_RXN2

PEG_RXP10

C_PEG_TXN15

PEG_RXP2

PEG_RXP12

C_PEG_TXP2

PEG_RXN0

C_PEG_TXP10

PEG_RXN7

C_PEG_TXN7

PEG_RXN12

C_PEG_TXP0

C_PEG_TXP15

PEG_RXP8

C_PEG_TXP11

PEG_RXP1

PEG_RXP9

PEG_RXP15

PEG_RXN8

PEG_RXN14

PEG_RXN10

PEG_RXP6

C_PEG_TXN2

C_PEG_TXP1

C_PEG_TXN12

C_PEG_TXN8

C_PEG_TXP12

PEG_RXN3

PEG_RXN6

PEG_RXP14

C_PEG_TXN11

C_PEG_TXP8

LVDS_IBG

NB_TV_C/RNB_TV_Y/GNB_TV_COMP

TV_DCONSEL_1TV_DCONSEL_0

VSYNC11

NB_DDCCLKNB_DDCDATHSYNC11

CFG5

PM_DPRSLPVR_GMCH

DELAY_VR_PWRGOOD

PM_BMBUSY#_RICH_DPRSTP#_RPM_EXTTS#0

PLTRST_MCH#PM_THRMTRIP#_GMCH

PM_EXTTS#1

SMDDR_VREF_MCH

SMRCOMPPSMRCOMPN

MCH_DREFCLK#

VSYNC11

NB_TV_COMP

DREF_SSCLK

NB_TV_C/R

NB_CRT_R_COM

DREF_SSCLK#

MCH_DREFCLKNB_TV_Y/G

NB_CRT_G_COM

HSYNC11

NB_CRT_B_COM

SM_RCOMP_VOH

SM_RCOMP_VOLPM_EXTTS#1

PM_EXTTS#0

CRTIREF

SA_MA14SB_MA14

CFG16

L_BKLT_EN

SMDDR_VREF_MCH

DELAY_VR_PWRGOOD

VCC3G_PCIE_R

+VCC_PEG

+3V

+3V

+1.25V 1.8VSUS

+1.25V

+1.25V

1.8VSUS

+3V

C722 *0.1U/10V_4

C443 *0.1U/10V_4

R106 150_4

C3002.2U/6.3V_6

12

C7460.1U/10V_4

12

R4850_4

12

R137 0_4

C3022.2U/6.3V_6

12

R1233.01K/F

12

R478 0_6

C778 *0.1U/10V_4

C786 *0.1U/10V_4

R121 *39_4

C781 *0.1U/10V_4

R7820/F

12

C115 0.1U/10V_4

C750 *0.1U/10V_4

R484 10K_4

C747 *0.1U/10V_4

C724 *0.1U/10V_4C744 *0.1U/10V_4

R141 10K_41 2

R146 0_4

C428 *0.1U/10V_4

C436 *0.1U/10V_4C776 *0.1U/10V_4

R130 10K_41 2

C755 *0.1U/10V_4

C762 *0.1U/10V_4

R88 100_4

T28 PAD

R44 0_4

C785 *0.1U/10V_4

R104 150_4

R148 0_6

C435 *0.1U/10V_4

R91 0_4

T29 PAD

R144 2.4K

C756 *0.1U/10V_4R131 2.2K

C439 *0.1U/10V_4

R111 150_4

C757 *0.1U/10V_4

R142 0_4

R5121K/F

12 R119 150_4

R151 *80.6_4

C775 *0.1U/10V_4

C2830.01U/16V_4

12

R124 39

R150 *80.6_4

R107 150_4

R136 10K_4

R139 0_6

C745 *0.1U/10V_4

C426 *0.1U/10V_4

C452 *0.1U/10V_4

RV4*VZ0603M260APT

12

C124 0.1U/10V_4

C748 *0.1U/10V_4

R153 *80.6_4

R129 *39_4

PM

MISC

NC

DDR MUXING

CLK

DMI

CFG

RSVD

GRAPHICS VID

ME

U24B

CRESTLINE_1p0

AV29BB23

BF23

BA25

AW30BA23

BG23

AW25

BE29AY32BD39BG37

BG20BK16BG16BE13

BH39

BH18BJ15BJ14BE16

BL15BK14

AR49AW4

L32N33

N24

P27N27

L35

C21C23F23N23G23J20C20R24L23J23E23E20K23M20M24

G41

L36J36

AW49AV20

B42C42H48H47

AN47AJ38AN42AN46

AM47AJ39AN41AN45

AJ46AJ41AM40AM44

AJ47AJ42AM39AM43

AR37

AL36AM36

AM37

BJ20BK22BF19BH20BK18

L39

AV23

AW23

BC23BD24

AW20BK20

AR12AR13AM12AN13

P36P37R35N35

E35A39C38B39E36

BJ18

BK31BL31

N20G36

J12

AM49AK50AT43AN49AM50

C48D47B44C44

BJ29BE24

B51

BJ51BK51BK50BL50BL49BL3BL2BK1BJ1E1A5

C51B50A50A49

H35K36G39

D20

G40

H10

A35B37B36B34C34

K45K44

A37BK2 R32

SM_CK_0SM_CK_1

RSVD28

SM_CK_3

SM_CK#_0SM_CK#_1

RSVD29

SM_CK#_3

SM_CKE_0SM_CKE_1SM_CKE_3SM_CKE_4

SM_CS#_0SM_CS#_1SM_CS#_2SM_CS#_3

RSVD34

SM_ODT_0SM_ODT_1SM_ODT_2SM_ODT_3

SM_RCOMPSM_RCOMP#

SM_VREF_0SM_VREF_1

CFG_18CFG_19

CFG_2

CFG_0CFG_1

CFG_20

CFG_3CFG_4CFG_5CFG_6CFG_7CFG_8CFG_9CFG_10CFG_11CFG_12CFG_13CFG_14CFG_15CFG_16CFG_17

PM_BM_BUSY#

PM_EXT_TS#_0PM_EXT_TS#_1PWROKRSTIN#

DPLL_REF_CLKDPLL_REF_CLK#

DPLL_REF_SSCLKDPLL_REF_SSCLK#

DMI_RXN_0DMI_RXN_1DMI_RXN_2DMI_RXN_3

DMI_RXP_0DMI_RXP_1DMI_RXP_2DMI_RXP_3

DMI_TXN_0DMI_TXN_1DMI_TXN_2DMI_TXN_3

DMI_TXP_0DMI_TXP_1DMI_TXP_2DMI_TXP_3

RSVD10

RSVD12RSVD11

RSVD13

RSVD22RSVD23RSVD24RSVD25RSVD26

PM_DPRSTP#

SM_CK_4

SM_CK#_4

RSVD30RSVD31

RSVD35RSVD36

RSVD5RSVD6RSVD7RSVD8

RSVD1RSVD2RSVD3RSVD4

GFX_VID_0GFX_VID_1GFX_VID_2GFX_VID_3

GFX_VR_EN

RSVD27

SM_RCOMP_VOHSM_RCOMP_VOL

THERMTRIP#DPRSLPVR

RSVD9

CL_CLKCL_DATA

CL_PWROKCL_RST#CL_VREF

LVDSA_DATA#_3LVDSA_DATA_3RSVD39RSVD40

SA-MA14SB_MA14

RSVD21

NC_1NC_2NC_3NC_4NC_5NC_6NC_7NC_8NC_9NC_10NC_11NC_12NC_13NC_14NC_15

SDVO_CTRL_CLKSDVO_CTRL_DATA

CLK_REQ#

RSVD14

ICH_SYNC#

RSVD20

RSVD41RSVD42RSVD43RSVD44RSVD45

PEG_CLK#PEG_CLK

TEST_1NC_16 TEST_2

LVDS

PCI-EXPRESS GRAPHICS

TVVGA

U24C

CRESTLINE_1p0

N43M43

J51L51N47T45T50U40Y44Y40AB51W49AD44AD40AG46AH49AG45AG41

J50L50M47U44T49T41W45W41AB50Y48AC45AC41AH47AG49AH45AG42

N45

AC46

N51R50T42Y43W46W38AD39

U39

AC49AC42AH39AE49AH44

U47

M45T38T46N50R51U43W42Y47Y39AC38AD47AC50AD43AG39AE50AH43

E39E40C37D35K40

L41L43N41N40D46C45

G51E51F49

E50F48

D44E42

G44B47B45

A47A45

H39

E27G27K27

F27J27L27

H32G32

K33G35

K29J29

F33C32

F29E29

E33

G50

E44

J40

M35P33

PEG_COMPIPEG_COMPO

PEG_RX#_0PEG_RX#_1PEG_RX#_2PEG_RX#_3PEG_RX#_4PEG_RX#_5PEG_RX#_6PEG_RX#_7PEG_RX#_8PEG_RX#_9

PEG_RX#_10PEG_RX#_11PEG_RX#_12PEG_RX#_13PEG_RX#_14PEG_RX#_15

PEG_RX_0PEG_RX_1PEG_RX_2PEG_RX_3PEG_RX_4PEG_RX_5PEG_RX_6PEG_RX_7PEG_RX_8PEG_RX_9

PEG_RX_10PEG_RX_11PEG_RX_12PEG_RX_13PEG_RX_14PEG_RX_15

PEG_TX#_0

PEG_TX#_10

PEG_TX#_3PEG_TX#_4PEG_TX#_5PEG_TX#_6PEG_TX#_7PEG_TX#_8PEG_TX#_9

PEG_TX#_1

PEG_TX#_11PEG_TX#_12PEG_TX#_13PEG_TX#_14PEG_TX#_15

PEG_TX#_2

PEG_TX_0PEG_TX_1PEG_TX_2PEG_TX_3PEG_TX_4PEG_TX_5PEG_TX_6PEG_TX_7PEG_TX_8PEG_TX_9

PEG_TX_10PEG_TX_11PEG_TX_12PEG_TX_13PEG_TX_14PEG_TX_15

L_CTRL_CLKL_CTRL_DATAL_DDC_CLKL_DDC_DATAL_VDD_EN

LVDS_IBGLVDS_VBGLVDS_VREFHLVDS_VREFLLVDSA_CLK#LVDSA_CLK

LVDSA_DATA#_0LVDSA_DATA#_1LVDSA_DATA#_2

LVDSA_DATA_1LVDSA_DATA_2

LVDSB_CLK#LVDSB_CLK

LVDSB_DATA#_0LVDSB_DATA#_1LVDSB_DATA#_2

LVDSB_DATA_1LVDSB_DATA_2

L_BKLT_EN

TVA_DACTVB_DACTVC_DAC

TVA_RTNTVB_RTNTVC_RTN

CRT_BLUECRT_BLUE#

CRT_DDC_CLKCRT_DDC_DATA

CRT_GREENCRT_GREEN#

CRT_HSYNCCRT_TVO_IREF

CRT_REDCRT_RED#

CRT_VSYNC

LVDSA_DATA_0

LVDSB_DATA_0

L_BKLT_CTRL

TV_DCONSEL_0TV_DCONSEL_1

R1251K/F

12

C730 *0.1U/10V_4

R140 0_6

R7720/F

12

C424 *0.1U/10V_4

R149 *80.6_4

R128 39

C427 *0.1U/10V_4

C784 *0.1U/10V_4

R112 1.3K_6

R1131K/F

12

C782 *0.1U/10V_4

C763 *0.1U/10V_4

C110 470P/50V/X7R/041 2

R133 2.2K

C3090.01U/16V_4

12

R110 150_4

R12220K

12

C456 *0.1U/10V_4

R480 0_6

R511392/F

12

C749 *0.1U/10V_4

R155 24.9_61 2

M_A_CLK0# [16]

M_B_CLK0# [16]

M_A_CLK0 [16]

M_B_CLK1# [16]

M_A_CS#1 [16,17]M_B_CS#0 [16,17]

M_A_CS#0 [16,17]

M_A_CKE0 [16,17]

M_B_CS#1 [16,17]

M_A_CKE1 [16,17]

M_B_ODT1 [16,17]

M_B_CKE0 [16,17]

M_A_ODT1 [16,17]

M_A_CLK1 [16]

M_B_ODT0 [16,17]

M_A_ODT0 [16,17]

M_B_CKE1 [16,17]

M_A_CLK1# [16]

M_B_CLK1 [16]M_B_CLK0 [16]

DMI_TXN[3:0] [13]

DMI_RXN[3:0] [13]

DMI_TXP[3:0] [13]

DMI_RXP[3:0] [13]

ECPWROK [14,39]CL_RST#0 [14]

CL_DATA0 [14]CL_CLK0 [14]

MCH_ICH_SYNC# [14]CLK_3GPLLREQ# [2]

PEG_TXN8 [18]

PEG_RXN2 [18]

PEG_TXP0 [18]

PEG_TXN2 [18]

PEG_RXP12 [18]

PEG_TXN12 [18]

PEG_TXP8 [18]

PEG_RXN6 [18]

PEG_TXP14 [18]

PEG_RXN14 [18]

PEG_RXN5 [18]

PEG_RXP6 [18]

PEG_TXP7 [18]

PEG_RXP8 [18]

PEG_TXP3 [18]

PEG_RXP7 [18]

PEG_RXN13 [18]

PEG_TXP1 [18]

PEG_TXN5 [18]

PEG_RXN1 [18]

PEG_TXP2 [18]

PEG_RXP1 [18]

PEG_RXP13 [18]

PEG_RXN0 [18]

PEG_TXN0 [18]

PEG_RXP11 [18]

PEG_TXN15 [18]

PEG_TXP10 [18]

PEG_TXN11 [18]

PEG_RXN12 [18]

PEG_RXP0 [18]

PEG_RXP10 [18]

PEG_TXN1 [18]

PEG_TXP11 [18]

PEG_RXN4 [18]PEG_RXN3 [18]

PEG_RXN8 [18]

PEG_RXN15 [18]

PEG_TXP6 [18]

PEG_TXN14 [18]

PEG_TXN4 [18]

PEG_RXN9 [18]

PEG_RXP2 [18]

PEG_TXN10 [18]

PEG_RXP5 [18]

PEG_RXN10 [18]

PEG_RXN7 [18]

PEG_TXN3 [18]

PEG_RXN11 [18]

PEG_TXP13 [18]

PEG_RXP9 [18]

PEG_RXP15 [18]

PEG_RXP3 [18]

PEG_TXN9 [18]

PEG_TXP5 [18]PEG_TXP4 [18]

PEG_TXN6 [18]

PEG_RXP4 [18]

PEG_TXP15 [18]

PEG_TXP9 [18]

PEG_TXP12 [18]

PEG_TXN13 [18]

PEG_RXP14 [18]

PEG_TXN7 [18]

EDIDDATA[19,23]EDIDCLK[19,23]

ENVDD[19,23]

NB_TV_Y/G[22]NB_TV_COMP[22]

NB_TV_C/R[22]

NB_VSYNC_COM[22]

NB_HSYNC_COM[22]NB_DDCDAT[25]NB_DDCCLK[25]

NB_CRT_G_COM[22]

MCH_CFG_5[11]

MCH_CFG_19[11]

MCH_CFG_9[11]

MCH_CFG_12[11]

MCH_CFG_20[11]

MCH_CFG_13[11]

MCH_BSEL1[2]MCH_BSEL0[2]

MCH_BSEL2[2]

PM_EXTTS#0[16]

DELAY_VR_PWRGOOD[14,42]

H_DPRSTP#[3,12,42]PM_BMBUSY#[14]

PM_THRMTRIP#[3,12]PLT_RST-R#[13]

PM_DPRSLPVR[14,42]

SMDDR_VREF [16,41,44]SA_MA14[16,17]SB_MA14[16,17]

MCH_CFG_16[11]

PEG_RXN[15:0][18]PEG_RXP[15:0][18]

PEG_TXN[15:0][18]PEG_TXP[15:0][18]

LCD_BKLTCTL[19,23]LCD_BLON_AND[19,23]

DREF_SSCLK# [2]DREF_SSCLK [2]MCH_DREFCLK# [2]MCH_DREFCLK [2]

CLK_MCH_3GPLL# [2]CLK_MCH_3GPLL [2]

NB_TXLOUT2-[22]NB_TXLOUT1-[22]NB_TXLOUT0-[22]

NB_TXUCLKOUT+[22]NB_TXUCLKOUT-[22]

NB_TXUOUT2+[22]

NB_TXUOUT2-[22]NB_TXUOUT1-[22]

NB_TXUOUT1+[22]NB_TXUOUT0+[22]

NB_TXUOUT0-[22]

NB_TXLCLKOUT-[22]NB_TXLCLKOUT+[22]

NB_TXLOUT2+[22]NB_TXLOUT1+[22]NB_TXLOUT0+[22]

NB_CRT_R_COM[22]

NB_CRT_B_COM[22]

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A A

B B

C C

D D

07

Crestline (DDR) 1A7 54Friday, April 13, 2007


Date: Sheet of


M_A_DQS0

M_A_A9

TP_SA_RCVEN#

M_A_BS#2

M_A_A5

M_A_DQS6

M_A_DQS#5

M_A_DQS#2

M_A_DQS1

M_A_A1

M_A_BS#1

M_A_A8

M_A_DQS#3

M_A_DQS2

M_A_DQS7

M_A_CAS#

M_A_DM7

M_A_A12

M_A_BS#0

M_A_A0

M_A_DM6

M_A_A7

M_A_DQS5

M_A_DM5

M_A_A11

M_A_DQS#6

M_A_DQS3

M_A_DM3

M_A_DQS#7

M_A_A13

M_A_A4M_A_A3

M_A_DM4

M_A_DM2

M_A_DQS4

M_A_RAS#

M_A_DQS#0

M_A_DM0

M_A_A10

M_A_WE#

M_A_A6

M_A_A2

M_A_DM1

M_A_DQS#4

M_A_DQS#1

M_A_DQ26

M_A_DQ11

M_A_DQ37

M_A_DQ14

M_A_DQ54

M_A_DQ41

M_A_DQ62

M_A_DQ5

M_A_DQ36

M_A_DQ20

M_A_DQ53

M_A_DQ19

M_A_DQ40

M_A_DQ10

M_A_DQ48

M_A_DQ51M_A_DQ52

M_A_DQ4

M_A_DQ39

M_A_DQ29

M_A_DQ31

M_A_DQ24

M_A_DQ47

M_A_DQ9

M_A_DQ63

M_A_DQ21

M_A_DQ30

M_A_DQ38

M_A_DQ3

M_A_DQ23

M_A_DQ12

M_A_DQ35

M_A_DQ8

M_A_DQ49

M_A_DQ25

M_A_DQ61

M_A_DQ2

M_A_DQ46

M_A_DQ58

M_A_DQ42

M_A_DQ34

M_A_DQ28M_A_DQ27

M_A_DQ33

M_A_DQ22

M_A_DQ43

M_A_DQ1

M_A_DQ7

M_A_DQ16

M_A_DQ13

M_A_DQ0

M_A_DQ18

M_A_DQ57M_A_DQ56

M_A_DQ60

M_A_DQ32

M_A_DQ44

M_A_DQ15

M_A_DQ50

M_A_DQ55

M_A_DQ6

M_A_DQ59

M_A_DQ45

M_A_DQ17

M_B_DQ30

M_B_DQ7

M_B_DQ28

M_B_DQ55

M_B_DQ10

M_B_DQ50

M_B_DQ33

M_B_DQ1

M_B_DQ8

M_B_DQ44

M_B_DQ22

M_B_DQ57

M_B_DQ54

M_B_DQ49

M_B_DQ26

M_B_DQ60

M_B_DQ12

M_B_DQ25

M_B_DQ4M_B_DQ3

M_B_DQ46

M_B_DQ17

M_B_DQ14

M_B_DQ48

M_B_DQ40

M_B_DQ27

M_B_DQ39

M_B_DQ31

M_B_DQ29

M_B_DQ32

M_B_DQ62

M_B_DQ56

M_B_DQ37

M_B_DQ34

M_B_DQ13

M_B_DQ16M_B_DQ15

M_B_DQ18

M_B_DQ20M_B_DQ19

M_B_DQ52

M_B_DQ36

M_B_DQ61

M_B_DQ35

M_B_DQ45

M_B_DQ51

M_B_DQ24

M_B_DQ9

M_B_DQ59

M_B_DQ5

M_B_DQ38

M_B_DQ58

M_B_DQ11

M_B_DQ23

M_B_DQ2

M_B_DQ0

M_B_DQ41M_B_DQ42

M_B_DQ6

M_B_DQ53

M_B_DQ63

M_B_DQ47

M_B_DQ43

M_B_DQ21

M_B_A10

M_B_DM5

M_B_DQS1

M_B_DQS#2

M_B_A1

M_B_BS#0

M_B_DM7

M_B_DM3

M_B_A5

M_B_DQS#6

M_B_DQS6

M_B_DQS#4

M_B_A0

M_B_A8

M_B_DQS2

M_B_CAS#

M_B_WE#

M_B_A9

M_B_DQS#3

M_B_DQS7

M_B_DQS0

M_B_A2

M_B_A11

M_B_DM6

M_B_DQS3

M_B_DQS5

M_B_RAS#

M_B_DM4

M_B_DM1

M_B_DQS#1

M_B_A7

M_B_DM0

TP_SB_RCVEN#

M_B_A12

M_B_A4M_B_A3

M_B_DM2

M_B_DQS4

M_B_A6

M_B_BS#2

M_B_DQS#5

M_B_A13

M_B_DQS#7

M_B_BS#1

M_B_DQS#0

T18DDR SYSTEM MEMORY A

U24D

CRESTLINE_1p0

AR43AW44

BG47BJ45BB47BG50BH49BE45

AW43BE44BG42BE40

BA45

BF44BH45BG40BF40AR40AW40AT39

AW36AW41AY41

AY46

AV38AT38AV13AT13

AW11AV11AU15AT11BA13BA11

AR41

BE10BD10BD8AY9

BG10AW9BD7BB9BB5AY7

AR45

AT5AT7AY6BB7AR5AR8AR9AN3AM8

AN10

AT42

AT9AN9AM9

AN11

AW47BB45BF48

BB19BK19BF29

BL17

AT45BD44BD42AW38AW13BG8AY5

AT46BE48BB43BC37BB16BH6BB2AP3

AN6

AT47BD47BC41BA37BA16BH7BC1AP2

BJ19BD20

BC19BE28BG30BJ16

BK27BH28BL24BK28BJ27BJ25BL28BA28

BE18AY20

BA19

SA_DQ_0SA_DQ_1

SA_DQ_10SA_DQ_11SA_DQ_12SA_DQ_13SA_DQ_14SA_DQ_15SA_DQ_16SA_DQ_17SA_DQ_18SA_DQ_19

SA_DQ_2


SA_DQ_3


SA_DQ_4


SA_DQ_5


SA_DQ_6

SA_DQ_60SA_DQ_61SA_DQ_62SA_DQ_63

SA_DQ_7SA_DQ_8SA_DQ_9

SA_BS_0SA_BS_1SA_BS_2

SA_CAS#

SA_DM_0SA_DM_1SA_DM_2SA_DM_3SA_DM_4SA_DM_5SA_DM_6

SA_DQS_0SA_DQS_1SA_DQS_2SA_DQS_3SA_DQS_4SA_DQS_5SA_DQS_6SA_DQS_7

SA_DM_7

SA_DQS#_0SA_DQS#_1SA_DQS#_2SA_DQS#_3SA_DQS#_4SA_DQS#_5SA_DQS#_6SA_DQS#_7

SA_MA_0SA_MA_1

SA_MA_10SA_MA_11SA_MA_12SA_MA_13

SA_MA_2SA_MA_3SA_MA_4SA_MA_5SA_MA_6SA_MA_7SA_MA_8SA_MA_9

SA_RAS#SA_RCVEN#

SA_WE#

DDR SYSTEM MEMORY B

U24E

CRESTLINE_1p0

AP49AR51

BA49BE50BA51AY49BF50BF49BJ50BJ44BJ43BL43

AW50

BK47BK49BK43BK42BJ41BL41BJ37BJ36BK41BJ40

AW51

BL35BK37BK13BE11BK11BC11BC13BE12BC12BG12

AN51

BJ10BL9BK5BL5BK9

BK10BJ8BJ6BF4BH5

AN50

BG1BC2BK3BE4BD3BJ2BA3BB3AR1AT3

AV50

AY2AY3AU2AT2

AV49BA50BB50

AY17BG18BG36

BE17

AR50BD49BK45BL39BH12BJ7BF3AW2

AT50BD50BK46BK39BJ12BL7BE2AV2AU50BC50BL45BK38BK12BK7BF2AV3

BC18BG28

BG17BE37BA39BG13

BG25AW17BF25BE25BA29BC28AY28BD37

AV16AY18

BC17

SB_DQ_0SB_DQ_1

SB_DQ_10SB_DQ_11SB_DQ_12SB_DQ_13SB_DQ_14SB_DQ_15SB_DQ_16SB_DQ_17SB_DQ_18SB_DQ_19

SB_DQ_2


SB_DQ_3


SB_DQ_4


SB_DQ_5


SB_DQ_6

SB_DQ_60SB_DQ_61SB_DQ_62SB_DQ_63

SB_DQ_7SB_DQ_8SB_DQ_9

SB_BS_0SB_BS_1SB_BS_2

SB_CAS#

SB_DM_0SB_DM_1SB_DM_2SB_DM_3SB_DM_4SB_DM_5SB_DM_6SB_DM_7

SB_DQS_0SB_DQS_1SB_DQS_2SB_DQS_3SB_DQS_4SB_DQS_5SB_DQS_6SB_DQS_7

SB_DQS#_0SB_DQS#_1SB_DQS#_2SB_DQS#_3SB_DQS#_4SB_DQS#_5SB_DQS#_6SB_DQS#_7

SB_MA_0SB_MA_1

SB_MA_10SB_MA_11SB_MA_12SB_MA_13

SB_MA_2SB_MA_3SB_MA_4SB_MA_5SB_MA_6SB_MA_7SB_MA_8SB_MA_9

SB_RAS#SB_RCVEN#

SB_WE#

T17 PAD

M_A_DQS#[7:0] [16]

M_A_RAS# [16,17]

M_A_WE# [16,17]

M_A_DM[0..7] [16]

M_A_BS#1 [16,17]

M_A_CAS# [16,17]

M_A_BS#0 [16,17]

M_A_BS#2 [16,17]

M_A_DQS[7:0] [16]

M_A_A[13:0] [16,17]

M_A_DQ[63:0][16] M_B_DQ[63:0][16]

M_B_BS#1 [16,17]

M_B_A[13:0] [16,17]

M_B_RAS# [16,17]

M_B_WE# [16,17]

M_B_DQS#[7:0] [16]

M_B_BS#0 [16,17]

M_B_DQS[7:0] [16]

M_B_CAS# [16,17]M_B_DM[0..7] [16]

M_B_BS#2 [16,17]

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Layout Note:Place C901 where LVDSand DDR2 taps.

Layout Note:Place on the edge.

Layout Note:Place close to GMCH edge.

Layout Note:Inside GMCH cavity for VCC_AXG.

Layout Note:370 mils from edge.

Layout Note:Inside GMCH cavity.

Layout Note:370 mils from edge.

Ivcc (External GFX 1.310 A,integrate 1.572 A)

Ivcc_AXG Graphics core supplycurrent 7.7A

Ivcc_AXMControllersupplycurrent540mA

IVCCSM supplycurrent 1channel1.615A 2channel3.318A

VCC_AXM

VCC_PEG

0.25

for IAMTfunction

VTT

VCCR_RX_DMI

VCC_AXD

VCC_AXG

0.54

FSB VCCP

VCC Core

1.2

0.85

Remark

for PCIEG

0.2

current(A)

DMI

7.7

GMCH 1.05V

for integratedGfx

( 1.3A forexternalGFX )

1.573

12.313SUM

for IAMT power if notsupport need toconnection to S0 power

A test checkwhen useexternal VGA canremove or not..andrew

30mA 08

C109 change to NC(PM)

Crestline (VCC, NCTF) 1A8 54Friday, April 13, 2007


Date: Sheet of


VCCSM_LF2VCCSM_LF1

VCCSM_LF3VCCSM_LF4VCCSM_LF5VCCSM_LF6VCCSM_LF7

+VCC_GMCH_L

1.8VSUS

+3V

+1.05V

1.8VSUS

+1.05V

+1.05V

+1.05V

+1.05V

+1.05V

C251

0.1U/10V_4

12

C1870.1U/10V_4

12

POWER

VCC NCTF

VSS NCTF

VSS SCB

VCC AXM

VCC AXM NCTF

U24F

CRESTLINE_1p0

AB33

AK37

AP35

U31

AF33AF36AH33AH35AH36AH37AJ33

AK33AK35AK36

AB36

AL33AL35

AB37

AP36AR35AR36

T30T34T35U29

AC33

U32U33U35U36

V33V36V37

AC35AC36AD35

T27T37U24U28V31V35

AB17AB35AD19

AD36

AA19

AD37AF17

AK17

AM24AP26

AR15AR19AR28

Y32

AK24AK23AJ26AJ23

AL24AL26AL28AM26AM28AM29AM31

AP29AP31

AR31

Y33Y35Y36Y37 A3

B2C1BL1BL51A51

AA33AA35AA36

AJ35

AD33

AF35

AJ36

AK29

AL29AL31AL32

AM17

AM32AM33

AM35

AP28

AP32AP33

AR32AR33

AT31AT33

V32

VCC_NCTF_1

VCC_NCTF_20

VCC_NCTF_29

VCC_NCTF_42

VCC_NCTF_9VCC_NCTF_10VCC_NCTF_11VCC_NCTF_12VCC_NCTF_13VCC_NCTF_14VCC_NCTF_15

VCC_NCTF_17VCC_NCTF_18VCC_NCTF_19

VCC_NCTF_2

VCC_NCTF_24VCC_NCTF_25

VCC_NCTF_3


VCC_NCTF_38VCC_NCTF_39VCC_NCTF_40VCC_NCTF_41

VCC_NCTF_4

VCC_NCTF_43VCC_NCTF_44VCC_NCTF_45VCC_NCTF_46



VSS_NCTF_1VSS_NCTF_2VSS_NCTF_3VSS_NCTF_4VSS_NCTF_5VSS_NCTF_6

VSS_NCTF_8VSS_NCTF_9

VSS_NCTF_10

VCC_NCTF_8

VSS_NCTF_7


VSS_NCTF_14


VSS_NCTF_19VSS_NCTF_20VSS_NCTF_21

VCC_NCTF_33

VCC_AXM_4VCC_AXM_5VCC_AXM_6VCC_AXM_7

VCC_AXM_NCTF_1VCC_AXM_NCTF_2VCC_AXM_NCTF_3VCC_AXM_NCTF_4VCC_AXM_NCTF_5VCC_AXM_NCTF_6VCC_AXM_NCTF_7

VCC_AXM_NCTF_10VCC_AXM_NCTF_11

VCC_AXM_NCTF_17

VCC_NCTF_34VCC_NCTF_35VCC_NCTF_36VCC_NCTF_37 VSS_SCB1

VSS_SCB2VSS_SCB3VSS_SCB4VSS_SCB5VSS_SCB6


VCC_NCTF_16

VCC_NCTF_21

VSS_NCTF_13

VCC_NCTF_22

VCC_AXM_3

VCC_AXM_NCTF_14VCC_AXM_NCTF_15VCC_AXM_NCTF_16

VSS_NCTF_15


VCC_NCTF_23

VSS_NCTF_18



VCC_AXM_2VCC_AXM_1

VCC_NCTF_47

+ C188

330U/2V/ESR9

+ C95

*330U/2V/ESR9

D9

CH501H-40PT L-F

21

C222

0.1U/10V_4

12

C2470.22U/16V_6

12

C275

0.22U/16V_6

12

C316

10U/6.3V_8

12

C3110.1U/10V_4

12

C147

10U/6.3V_8

C3341U/10V_4

12

C162

10U/6.3V_8

C2290.1U/10V_4

12

C210

0.47U/10V_6

12

C312

10U/6.3V_8

C131

10U/6.3V_8

POWER

VCC CORE

VCC SM

VCC GFX

VCC GFX NCTF

VCC SM LF

U24G

CRESTLINE_1p0

AC32

AK32AJ31AJ28AH32AH31AH29AF32

AT34

AC31

BA35

BF33

BJ34

AW35AY35BA32BA33

BB33BC32BC33BC35BD32BD35BE32BE33BE35

AU33

BF34BG32BG33BG35BH32BH34BH35BJ32BJ33

AU35

BK32BK33BK34BK35

U17U19U20U21U23U26V16V17V19V20

T18

V21V23V24Y15Y16Y17Y19Y20Y21Y23

T19

Y24Y26Y28Y29AA16AA17AB16AB19AC16AC17

T21

AC19AD15AD16AD17AF16AF19AH15AH16AH17AH19

T22

AJ16AJ17AJ19AK16AK19AL16AL17AL19AL20AL21

T23

AL23AM15AM16AM19

AM21AM23AP15AP16AP17

T25

AP19AP20AP21

U15U16

BL33

AV33AW33

T17AT35

AU32

R20T14

W13W14Y12

AA20AA23AA26AA28AB21AB24AB29AC20AC21AC23AC24AC26AC28AC29AD20AD23AD24AD28AF21AF26

AH20AH21AH23AH24

AP23AP24AR20AR21AR23AR24AR26

R30

AH26

AJ20AN14

AW45BC39BE39BD17BD4AW8AT6

AA31

AD31

AH28

AM20

AU30

V26V28V29Y31

VCC_5

VCC_6VCC_7VCC_8VCC_9VCC_10VCC_11VCC_12

VCC_2

VCC_4

VCC_SM_10

VCC_SM_20

VCC_SM_30

VCC_SM_6VCC_SM_7VCC_SM_8VCC_SM_9

VCC_SM_11VCC_SM_12VCC_SM_13VCC_SM_14VCC_SM_15VCC_SM_16VCC_SM_17VCC_SM_18VCC_SM_19

VCC_SM_2

VCC_SM_21VCC_SM_22VCC_SM_23VCC_SM_24VCC_SM_25VCC_SM_26VCC_SM_27VCC_SM_28VCC_SM_29

VCC_SM_3

VCC_SM_31VCC_SM_32VCC_SM_33VCC_SM_34

VCC_AXG_NCTF_10VCC_AXG_NCTF_11VCC_AXG_NCTF_12VCC_AXG_NCTF_13VCC_AXG_NCTF_14VCC_AXG_NCTF_15VCC_AXG_NCTF_16VCC_AXG_NCTF_17VCC_AXG_NCTF_18VCC_AXG_NCTF_19

VCC_AXG_NCTF_2


VCC_AXG_NCTF_3


VCC_AXG_NCTF_4


VCC_AXG_NCTF_5


VCC_AXG_NCTF_6

VCC_AXG_NCTF_60VCC_AXG_NCTF_61VCC_AXG_NCTF_62VCC_AXG_NCTF_63

VCC_AXG_NCTF_65VCC_AXG_NCTF_66VCC_AXG_NCTF_67VCC_AXG_NCTF_68VCC_AXG_NCTF_69

VCC_AXG_NCTF_7

VCC_AXG_NCTF_70VCC_AXG_NCTF_71VCC_AXG_NCTF_72

VCC_AXG_NCTF_8VCC_AXG_NCTF_9

VCC_SM_35

VCC_SM_4VCC_SM_5

VCC_AXG_NCTF_1VCC_1

VCC_SM_1

VCC_AXG_1VCC_AXG_2VCC_AXG_3VCC_AXG_4VCC_AXG_5VCC_AXG_6VCC_AXG_7VCC_AXG_8VCC_AXG_9VCC_AXG_10VCC_AXG_11VCC_AXG_12VCC_AXG_13VCC_AXG_14VCC_AXG_15VCC_AXG_16VCC_AXG_17VCC_AXG_18VCC_AXG_19VCC_AXG_20VCC_AXG_21VCC_AXG_22VCC_AXG_23VCC_AXG_24VCC_AXG_25

VCC_AXG_27VCC_AXG_28VCC_AXG_29VCC_AXG_30

VCC_AXG_NCTF_73VCC_AXG_NCTF_74VCC_AXG_NCTF_75VCC_AXG_NCTF_76VCC_AXG_NCTF_77VCC_AXG_NCTF_78VCC_AXG_NCTF_79

VCC_13

VCC_AXG_31

VCC_AXG_33VCC_AXG_34

VCC_SM_LF1VCC_SM_LF2VCC_SM_LF3VCC_SM_LF4VCC_SM_LF5VCC_SM_LF6VCC_SM_LF7

VCC_AXG_26

VCC_AXG_32

VCC_3

VCC_AXG_NCTF_64

VCC_SM_36

VCC_AXG_NCTF_80VCC_AXG_NCTF_81VCC_AXG_NCTF_82VCC_AXG_NCTF_83

C139

0.47U/10V_6

12

C213

0.47U/10V_6

12

C183

10U/6.3V_8

C328

10U/6.3V_8

C2740.22U/16V_6

12

C322

0.22U/16V_6

12

C123

10U/6.3V_8

C2460.1U/10V_4

12

C174

10U/6.3V_8

+ C109

330U/2V/ESR9

+ C660

330U/2V/ESR9

C201

10U/6.3V_8

C291

10U/6.3V_8

R446 101 2

C3571U/10V_4

12

C169

0.1U/10V_4

12

C318

1U/10V_4

12

C276

0.1U/10V_41

2

C173

0.1U/10V_4

12

C329

0.47U/10V_6

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Place caps closeto VCC_AXD.

1uH+-20%_300mA

1uH+-20%_300mA

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

IV&EV Dis/Enable setting

3.3VVCCD_QDAC

BallGND

3.3V

VCCD_CRT

Enable

VCC_TX_LVDS

3.3V

VCCA_CRT_DAC

VCCA_LVDS

GND

3.3V

VCCD_LVDS

GND

External VGA with EV@part,Internal VGA with IV@ part

1.5V

1.5V

CRT/TV Disable/Enable guideline

GND

Signal

GND

1.5V

LVDS Disable/Enable guideline

1.8V

If SDVO DisableLVDS Disable

External VGA with EV@part,Internal VGA with IV@ part

GND

3.3V

1.8V

GND VCCA_DAC_BG

If LVDSenable

GND

GND

VCCD_TVDAC

Ivcc_VTT FSBsupplycurrent0.85A

Ivcc_PEGsupply current1.2A

Ivcc_RX_DMIsupply current250mA

Ivcc_DMI supplycurrent 100mA

50mA

250mA

150mA

100mA

GND VCCA_TVC_DAC

100mA

200mA

150mA


VSS_DAC_BG

Ball

1.5V

VCCSYNC

GND

Disable

3.3VVCCA_TVB_DAC

Disable

GNDVCCA_TVA_DAC

EnableGND

22nF & 0.1uF forVCC_TVDACA:C_R shouldbe placed with in 250mils from Crestline.


FB_120ohm+-25%_100mHz_2A_0.2ohm DC

Place caps closeto VCC_AXF

Place on the edge.

Place on the edge.

+3V_VCC_HV

40 milwide

1.8V

09

0.1Caps should beplaced 200 milswith in its pins.

10uH+-20%_100mA

80mA

80mA

Close to NB

Ivcca_PEG_BGsupply current100mA

FB_220ohm+-25%_100MHz_2A_0.1ohm DC

100mA

H=1.9

PM-->Low

PM-->Low

PM-->Low

PM-->Low

PM-->Low

PM-->Low

PM-->Low

PM-->Low

PM-->Low

PM-->Low

60 mils or 80 mils

+VCC_RXR_DMI

VCC_PEG

For PM

C301

C319

C700

C752

C347

C299

C699

C697

C695

C354

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

1U/10V_4

For GM

0 ohm,0402

0 ohm,0402

0 ohm,0402

0 ohm,0402

0 ohm,0402

0 ohm,0402

0 ohm,0402

0 ohm,0402

0 ohm,0402

0 ohm,0402

L67

L24

L25

L68

R109

R637

L26

C203

L22 BLM18PG181SN1D

BLM18PG181SN1D

BLM18PG181SN1D

BLM18PG181SN1D

1UH_8

0_6

0_6

BLM18PG181SN1D No stuff

No stuff

No stuff

No stuff

No stuff

No stuff

No stuff

No stuff

For PMFor GM

0.1U/10V_5 0 ohm,0403

60 mA

60 mA

250 mA

Reserved R45 for Inductor

Separate DMI and PEG power -->B2A

CVA9115MN10 , IND 91NH+-20% 1.5A NLFC322522T-091M

CNF10R223S 22000pf,0.5A DCR:0.15 ohm

C2B

RESISTOR CHIP 100 1/10W +-5%(0603)EPCS11003J947-->C227

PM-->Low

Crestline (POWER) 3A9 54Friday, April 13, 2007


Date: Sheet of


+1.25V_VCCA_HPLL

+VTTLF1+VTTLF2

+1.8VSUS_VCC_TX_LVDS

+VCC_SM_CK_L

+VTTLF3

+1.8VSUS_VCC_SM_CK

+1.25V_VCC_AXF

+VTTLF2

+1.8VSUS_VCC_SM_CK

+3V_TV_DAC

+VTTLF1+1.25V_VCCD_PEG_PLL

+1.25V_AXD

+1.25V_VCC_AXF

+1.25V_VCCA_SM

+1.25V_VCCA_SM_CK

+VCC_TVBG

VCCD_HPLL

+1.25V_VCCA_DPLLB

+1.25V_VCCA_DPLLA

+1.25V_VCCA_MPLL

+VCC_AXD_R

+3V_VCCSYNC

+1.25V_VCCD_PEG_PLL

VCCD_LVDS

+VCC_RXR_DMI

+VCC_PEG

+3V_TV_DAC

+3V_TV_DAC

+VCCQ_TVDAC

+1.25V_VCC_DMI

+VTTLF3

+1.25V_VCCA_HPLL

+1.25V_VCCA_MPLL

+1.25V_VCCA_HPLL

+1.25V_VCCA_DPLLA

+1.25V_VCCA_DPLLB

+1.25V_VCCD_PEG_PLL+1.25V_VCCD_PEG_PLL

+1.5V_VCCD_CRT

+1.5V_VCCD_QDAC

+1.5V_VCCD_TVDAC

+VCCA_CRTDAC

1.8VSUS

+1.05V

+3V_VCC_HV

1.8VSUS

+3V

+1.25V

1.8VSUS

+3V_TV_DAC


+VCC_PEG


+1.5V_VCCD_TVDAC

+1.25V

+1.25V

+3V

+1.5V_VCCD_TVDAC

+3V

+1.25V

+3V_VCC_HV

+1.25V_VCC_DMI

+1.25V

+1.05V

+3V_VCCSYNC

+3V_TV_DAC

+1.25V

+1.05V

+1.25V

+3V

+1.5V

+1.25V

+3V

+1.25V

+1.05V

POWER

CRT

PLL

A PEG

A SM

TV

D TV/CRT

LVDS

VTTLF

PEG

SM CK

AXD

AXF

VTT

DMI

HV

A CK

A LVDS

U24H

CRESTLINE_1p0

T2R3R2R1

M32

K50

U51

A33B33

B49

H49

AL2

A41

AM2

C25B25C27B27B28A28

U48

T7T6T5T3

T11T10T9

J32

AN2

U13U12

U9U8U7U5U3U2U1T13

U11

BC29BB29

A30

L29

A7F2AH1

AH50AH51

BK24BK23BJ24BJ23

J41

N28

AU28AU24

AT25

B23B21A21

AW18AV19AU19AU18AU17

AT22AT21AT19

AJ50

A43

B32

B41

K49

C40B40

AD51

AT18AT17AR17AR16

H42

W50W51V49V50

AR29

AT29

AT30

AT23

VTT_19VTT_20VTT_21VTT_22

VCCD_CRT

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_CRT_DAC_1VCCA_CRT_DAC_2

VCCA_DPLLA

VCCA_DPLLB

VCCA_HPLL

VCCA_LVDS

VCCA_MPLL

VCCA_TVA_DAC_1VCCA_TVA_DAC_2VCCA_TVB_DAC_1VCCA_TVB_DAC_2VCCA_TVC_DAC_1VCCA_TVC_DAC_2

VCCD_PEG_PLL

VTT_15VTT_16VTT_17VTT_18

VTT_12VTT_13VTT_14

VCCSYNC

VCCD_HPLL

VTT_1VTT_2

VTT_4VTT_5VTT_6VTT_7VTT_8VTT_9

VTT_10VTT_11

VTT_3

VCCA_SM_CK_1VCCA_SM_CK_2

VCCA_DAC_BG

VCCD_TVDAC

VTTLF1VTTLF2VTTLF3

VCC_RXR_DMI_1VCC_RXR_DMI_2

VCC_SM_CK_1VCC_SM_CK_2VCC_SM_CK_3VCC_SM_CK_4

VCCD_LVDS_1

VCCD_QDAC

VCC_AXD_2VCC_AXD_3

VCC_AXD_5

VCC_AXF_1VCC_AXF_2VCC_AXF_3

VCCA_SM_1VCCA_SM_2VCCA_SM_3VCCA_SM_4VCCA_SM_5

VCCA_SM_7VCCA_SM_8VCCA_SM_9

VCC_DMI

VCC_TX_LVDS

VSSA_DAC_BG

VSSA_LVDS

VSSA_PEG_BG

VCC_HV_1VCC_HV_2

VCC_PEG_1

VCCA_SM_10VCCA_SM_11VCCA_SM_NCTF_1VCCA_SM_NCTF_2

VCCD_LVDS_2

VCC_PEG_2VCC_PEG_3VCC_PEG_4VCC_PEG_5

VCC_AXD_NCTF

VCC_AXD_4

VCC_AXD_6

VCC_AXD_1

C2030.1U/10V_4

12

C231

10U/6.3V_8

R408 BLM21PG221SN1D

C217

10U/6.3V_8

C301

0.1U/10V_4

C752 0.1U/10V_41 2

C6770.47U/10V_6

12

L141UH_8

12

C914

4.7uF/6.3V_6

12

C7180.1U/10V_4

12

+ C417

330U/2V/ESR9

C364

0.1U/10V_4

12

C161

10U/6.3V_8

+ C358

220U/2.5V_ESR35C9190.1U/10V_4

12

C263

10U/6.3V_8

R109 0_6

C2111U/10V_4

12

C207

10U/6.3V_8

L72

BLM21PG221SN1D

R98 BLM18PG181SN1D

C9200.1U/10V_4

12

R48 0_6

C3541000P/50V

12

C2821U/10V_4

12

R276 100_6

L31

BLM18PG181SN1D1 2

C2671U/10V_6

12

C1982.2U/6.3V_6

12

L32

10UH_812

L73

BLM21PG221SN1D

C191

10U/6.3V_8

R517 BLM21PG221SN1D

L29

10UH_812

L25

BLM18PG181SN1D1 2

L33

BLM21PG221SN1D1 2

C259

10U/6.3V_8

C299

1U/10V_4

R494 0_4

C3770.1U/10V_4

12

L22

BLM18PG181SN1D1 2

+ C902

220U/2.5V_ESR35

C3190.1U/10V_4

12

C262

10U/6.3V_8

C1574.7uF/6.3V_6

12

C659

10U/6.3V_8

C90110U/6.3V_8

12

C6620.47U/10V_6

12

C2660.1U/10V_4

12

C77910U/6.3V_8

12

+ C106

220U/2.5V_ESR35

C234

4.7uF/6.3V_6

12

R95 BLM18PG181SN1D

C7000.1U/10V_4

12

C3750.1U/10V_4

12

L26 1UH_812

C2800.1U/10V_4

12

C1500.47U/10V_6

12

C230

10U/6.3V_8

C6950.1U/10V_4

12

C190

10U/6.3V_8

C6640.1U/10V_4

12

L62

BLM18PG121SN1D

12

C2521U/10V_4

12

C3680.1U/10V_4

12

C347

1000pF/50V

C693

10U/6.3V_8

12

C6990.1U/10V_4

12

C6630.1U/10V_4

12

L67

BLM18PG181SN1D

1 2

R50 BLM21PG221SN1D

C21910U/6.3V_8

12

C391

0.1U/10V_4

12

L68

BLM18PG181SN1D1 2

C1560.47U/10V_6

12

C2601U/10V_6

12

R637 0_6

C228

10U/6.3V_8

R801_6

12

L64BLM18PG121SN1D

12

R45

BLM21PG221SN1D

D1CH501H-40PT L-F

21

+ C102

330U/2V/ESR9C658

10U/6.3V_8

+ C772

220U/2.5V_ESR35

R11410

12

C1480.1U/10V_4

12

C20410U/6.3V_8

12

L9

0_4

1 2

C6970.1U/10V_4

12

R94

0_8

C38910U/6.3V_8

12

C1584.7uF/6.3V_6

12

R1571_6

12

C7800.1U/10V_4

12

+ C380

330U/2V/ESR9

L24

BLM18PG181SN1D1 2

C2580.1U/10V_4

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

10

Crestline (VSS) 1A10 54Friday, April 13, 2007


Date: Sheet of


VSS

U24I

CRESTLINE_1p0

A13

C41

A15A17A24

AA21AA24AA29AB20AB23AB26AB28AB31AC10AC13AC3

AC39AC43

AD1AD21AD26AD29AD3

AD41AD45AD49AD5

AD50AD8

AE10AE14AE6

AF20AF23AF24AF31AG2

AG38AG43AG47AG50

AH3AH40AH41AH7AH9

AJ11AJ13AJ21AJ24AJ29AJ32AJ43AJ45AJ49AK20AK21AK26AK28AK31AK51

AL1AM11AM13AM3AM4

AM41AM45

AN1AN38AN39AN43AN5AN7AP4

AP48AP50AR11AR2

AR39AR44AR47AR7

AT10AT14AT41AT49

AW1

AW24AW29AW32AW5AW7AY10AY24AY37AY42AY43AY45AY47AY50B10B20B24B29B30B35B38B43B46B5B8BA1BA17BA18BA2BA24BB12BB25BB40BB44BB49BB8BC16BC24BC25BC36BC40BC51BD13BD2BD28BD45BD48BD5BE1BE19BE23BE30BE42BE51BE8BF12BF16BF36BG19BG2BG24BG29BG39BG48BG5BG51BH17BH30BH44BH46BH8BJ11BJ13BJ38BJ4BJ42BJ46BK15BK17BK25BK29

AU1AU23AU29AU3

AU36AU49AU51AV39AV48

AW16AW12

BK36

BK44

BK8

BL13

BL22

AC47

C12

C19

C29

C36

BK40

BK6

BL11

BL19

BL37BL47

C16

C28

C33

VSS_1

VSS_198

VSS_2VSS_3VSS_4VSS_5VSS_6VSS_7VSS_8VSS_9VSS_10VSS_11VSS_12VSS_13VSS_14VSS_15VSS_16VSS_17

VSS_19VSS_20VSS_21VSS_22VSS_23VSS_24VSS_25VSS_26VSS_27VSS_28VSS_29VSS_30VSS_31VSS_32VSS_33VSS_34VSS_35VSS_36VSS_37VSS_38VSS_39VSS_40VSS_41VSS_42VSS_43VSS_44VSS_45VSS_46VSS_47VSS_48VSS_49VSS_50VSS_51VSS_52VSS_53VSS_54VSS_55VSS_56VSS_57VSS_58VSS_59VSS_60VSS_61VSS_62VSS_63VSS_64VSS_65VSS_66VSS_67VSS_68VSS_69VSS_70VSS_71VSS_72VSS_73VSS_74VSS_75VSS_76VSS_77VSS_78VSS_79VSS_80VSS_81VSS_82VSS_83VSS_84VSS_85VSS_86VSS_87

VSS_97

VSS_100VSS_101VSS_102VSS_103VSS_104VSS_105VSS_106VSS_107VSS_108VSS_109VSS_110VSS_111VSS_112VSS_113VSS_114VSS_115VSS_116VSS_117VSS_118VSS_119VSS_120VSS_121VSS_122VSS_123VSS_124VSS_125VSS_126VSS_127VSS_128VSS_129VSS_130VSS_131VSS_132VSS_133VSS_134VSS_135VSS_136VSS_137VSS_138VSS_139VSS_140VSS_141VSS_142VSS_143VSS_144VSS_145VSS_146VSS_147VSS_148VSS_149VSS_150VSS_151VSS_152VSS_153VSS_154VSS_155VSS_156VSS_157VSS_158VSS_159VSS_160VSS_161VSS_162VSS_163VSS_164VSS_165VSS_166VSS_167VSS_168VSS_169VSS_170VSS_171VSS_172VSS_173VSS_174VSS_175VSS_176VSS_177VSS_178VSS_179

VSS_88VSS_89VSS_90VSS_91VSS_92VSS_93VSS_94VSS_95VSS_96

VSS_99VSS_98

VSS_180

VSS_182

VSS_184

VSS_186

VSS_188

VSS_18

VSS_191

VSS_193

VSS_195

VSS_197

VSS_181

VSS_183

VSS_185

VSS_187

VSS_189VSS_190

VSS_192

VSS_194

VSS_196

VSS

U24J

CRESTLINE_1p0

C46C50C7

D13D24D3

D32D39D45D49E10E16E24E28E32E47F19F36F4

F40F50G1

G13G16G19G24G28G29G33G42G45G48G8

H24H28H4

H45J11J16J2

J24J28J33J35J39

K12K47K8L1

L17L20L24L28L3

L33L49M28M42M46M49M5

M50M9

N11N14N17N29N32N36N39N44N49N7

P19P2

P23P3

P50R49T39T43T47U41U45U50

W11W39W43W47W5W7Y13Y2Y41

V2V3

Y45Y49Y5Y50Y11P29T29T31T33R28

AA32AB32AD32AF28AF29AT27AV25H50

VSS_199VSS_200VSS_201VSS_202VSS_203VSS_204VSS_205VSS_206VSS_207VSS_208VSS_209VSS_210VSS_211VSS_212VSS_213VSS_214VSS_215VSS_216VSS_217VSS_218VSS_219VSS_220VSS_221VSS_222VSS_223VSS_224VSS_225VSS_226VSS_227VSS_228VSS_229VSS_230VSS_231VSS_232VSS_233VSS_234VSS_235VSS_236VSS_237VSS_238VSS_239VSS_240VSS_241VSS_242VSS_243

VSS_245VSS_246VSS_247VSS_248VSS_249VSS_250VSS_251VSS_252VSS_253VSS_254VSS_255VSS_256VSS_257VSS_258VSS_259VSS_260VSS_261VSS_262VSS_263VSS_264VSS_265VSS_266VSS_267VSS_268VSS_269VSS_270VSS_271VSS_272VSS_273VSS_274VSS_275VSS_276VSS_277VSS_278VSS_279VSS_280VSS_281VSS_282VSS_283VSS_284

VSS_287VSS_288VSS_289VSS_290VSS_291VSS_292VSS_293VSS_294VSS_295

VSS_285VSS_286

VSS_296VSS_297VSS_298VSS_299VSS_300VSS_301VSS_302VSS_303VSS_304VSS_305

VSS_306VSS_307VSS_308VSS_309VSS_310VSS_311VSS_312VSS_313

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

All strap are sampled with respect to the leading edge of the GMCH Power OK(PWROK) Signal

CFG[17:3] Have internal Pull-upCFG[18:19] Have internal Pull-downAny CFG signal strapping option not list below should be left NC Pin

CFG[2:0]

CFG[4:3]

CFG5

CFG6

CFG7

CFG8

CFG9

CFG[11:10]

CFG[13:12]

CFG[15:14]

CFG16

CFG[18:17]

SDVO_CTRLDATA

CFG19

CFG20

Pin Name Strap description

FSB Frequency Select

Reserved

DMI X2 Select

Reserved

CPU Strap

Low power PCI Express

PCI Express Graphics Lane Reversal

Reserved

XOR/ALLZ

Reserved

FSB Dynamic ODT

SDVO Present

DMI Lane Reversal

SDVO/PCIe concurrent

Reserved

010 = FSB 800MHz011 = FSB 667MHz

0 = DMI X21 = DMI X4(Default)

0 = Reserved1 = Mobile CPU(Default)

0 = Normal mode1 = Low Power mode

0 = Reverse Lanes1 = Normal operation(Default)

00 = Reserved01 = XOR Mode Enable10 = All-Z Mode Enabled11 = Normal operation(Default)

0 = Dynamic ODT disable1 = Dynamic ODT Enable(Default)

0 = No SDVO Card present(Default)1 = SDVO Card Present

0 = Normal operation(Default)1 = Reverse Lanes

0 = Only SDVO or PCIE x1 is operation(Default)1 = SDVO and PCIE x1 are operating simultaneously via the PEG port

Configuration

SDVO/PCIE Concurrent operation

MCH_CFG_20Low = Only SDVO or PCIE X1 is operational(Default)High = SDVO andPCIE X1 are operating simultaneously via the PEG port

FSB Dynamic ODT

MCH_CFG_16 Low = ODT DisableHigh = ODT Enable(Default)

PCI Express Graphics

MCH_CFG_9 Low = Reverse LaneHigh = Normal operation(Default)

DMI X2 Select

MCH_CFG_5 Low = DMIX2High = IDMIX4(Default)

0

1

Clock gating disable

1

1

ALL-z Mode Enable

1

0

XOR Mode Enable

XOR /ALLz /Clock Un-gating

MCH_CFG_12MCH_CFG_13 Configuration

0

0

Normal operation(Default)

DMI Lane Reversal

MCH_CFG_19 Low = Normal operation(Default)High = Reverse Lane

Strap table

SDVO Present

Strap define at ExternalDVI control page

11

10 -- GMCH STRAP-3(6 of 6) 1A11 54Friday, April 13, 2007


Date: Sheet of


+3V

+3V R101

*4.02K_4

R102

*4.02K_4

R96

*4.02K_4

R90

*4.02K_4

R92

*4.02K_4

R134

*4.02K_4

R132

*4.02K_4

MCH_CFG_19[6]

MCH_CFG_5[6]

MCH_CFG_16[6]

MCH_CFG_20[6]

MCH_CFG_13[6]MCH_CFG_12[6]

MCH_CFG_9[6]

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Should be 2" close ICH7

RTC

Place within500 mils ofICH7

CKL:C1/C2: 18pF -> CL:12.5pFC1/C: 10pF -> CL Value =8.5pF

25mils/15mils

CKL:1n ~ 20nF

12

Enter XOR Chain

0

1 Set PCIE port config bit 1

Normal opration(Default)0

1

0

1

RSVD

Description

1

HDA_SDOUT

INTVRMEN

0

LAN100_SLP

ICH_RSV0

SB StrapXOR Chain Entrance Strap

ICH8-M LAN100_SLP Strap(Internal VR for VccLAN1_05 andVccCL1.05)

Low = Internal VR disableHigh = Internal VRenable(Default)

ICH8-M Internal VR Enablestrap(Internal VR forVccsus1_05,VccSus1_5 andVccCL1_5)

Low = Internal VR disableHigh = Internal VRenable(Default)

intel check listdefine to stuff33ohm

20MIL20MIL

Within 2"

Near to SB

遠離螺絲孔

10ppm,12.5pf

CH01206JB05 , CAP CHIP 12P 50V(+-5%,C0G,0402)

ICH8-M HOST,SATA,LPC 2A12 54Friday, April 13, 2007


Date: Sheet of


GATEA20

H_DPRSTP#_RH_DPSLP#_R

H_SMI#_R

LFRAME#

RCIN#

PDD0PDD1PDD2PDD3PDD4PDD5PDD6PDD7

PDD10PDD9PDD8

PDD11PDD12

PDD15PDD14PDD13

PDA0PDA1PDA2

SATA_BIAS

CLK_PCIE_SATACLK_PCIE_SATA#

SATA0TXPSATA0TXN

ACZ_SDOUT

ACZ_SDIN1

ACZ_RST#

ACZ_SDIN0

ACZ_SYNCACZ_BCLK

ICH_INTVRMEN

SATA_RXN0_CSATA_RXP0_C

SM_INTRUDER#

IRQ14PDIORDY

ACZ_RST#

ACZ_BCLK

ACZ_SDOUT

RCIN#

H_THERMTRIP_R

ACZ_SYNC

VCCRTC_2

LAD0LAD1LAD2LAD3RTCRST#

GATEA20

SATA_LED#

VCCRTC

LAN_DISABLE#

ICH_INTVRMEN LAN100_SLP ACZ_SDOUT

LAN100_SLP

GLAN_COMP_SB

VCCRTC_1 VCCRTC_3

CLK_32KX1

CLK_32KX2

ACZ_BCLK

ACZ_RST#

ACZ_SDOUT

ACZ_SYNC

H_PWRGD

LDRQ#0

+3V

+1.05V

+1.05V

+3V

3VPCU

VCCRTC

+3V

+1.5V_PCIE

VCCRTC VCCRTC +3V

5VPCU

+1.05V

Y1

32.768KHZ

412

3

C499 3900P/25V

C493*10P/50V_4

R238 33

Q30

MMBT3904

2

13

C7381U/10V_4

R5851K/F

C489*10P/50V_4

R232 33

R16010M_6

R181*0_4

G1*SHORT_ PAD1

12

C501 3900P/25V

R580

1.2K_6

R586

15K

C79922PF/50V_4

D10CH501H-40PT L-F

R188332K/F

R5821K/F

R581

4.7K_4

RV8*VZ0603M260APT

12

R19556_4

C7371U/10V_4

C798*10P/50V_4

R174 0_4

T31

C392

12PF/50V_4

R185 0_4

R178 24.9_6

RTC

LAN / GLAN

IHDA

SATAIDE

LPC

CPU

U31A

ICH8M REV 2.0

AG25AF24

AF25

AD22

B24

D22

C21B21C22

D21E20C20

AJ16AJ15

AE14

AJ17AH17AH15

AE13

AF10

AF6AF5AH5AH6

AG3AG4AJ4AJ3

AB7AC6

AG1AG2

AA4AA1AB3

Y6Y5

V1U2V3T1V4T5AB2T6T3R2T4V6V5U1V2U6

W5Y1Y3Y2W3W4

E5F5G8F6

G9E6

C4

AF13AG26

AF26AE26

AD24

AG29

AF27

AE24AC20AH14

AG28AD23

AA24

AE27

AF23

AH21

C25D25

AD13

AE4

AF2

AE3

AF1

AA23

AE10AG14

AD21

RTCX1RTCX2

INTVRMEN

INTRUDER#

GLAN_CLK

LAN_RSTSYNC

LAN_RXD0LAN_RXD1LAN_RXD2

LAN_TXD0LAN_TXD1LAN_TXD2

HDA_BIT_CLKHDA_SYNC

HDA_RST#

HDA_SDIN0HDA_SDIN1HDA_SDIN2

HDA_SDOUT

SATALED#

SATA0RXNSATA0RXPSATA0TXNSATA0TXP

SATA1RXNSATA1RXPSATA1TXNSATA1TXP

SATA_CLKNSATA_CLKP

SATARBIAS#SATARBIAS

DA0DA1DA2

DCS1#DCS3#

DD0DD1DD2DD3DD4DD5DD6DD7DD8DD9

DD10DD11DD12DD13DD14DD15

DDREQIORDY

IDEIRQDDACK#

DIOW#DIOR#

FWH0/LAD0FWH1/LAD1FWH2/LAD2FWH3/LAD3

LDRQ0#LDRQ1#/GPIO23

FWH4/LFRAME#

A20GATEA20M#

DPRSTP#DPSLP#

FERR#

CPUPWRGD/GPIO49

IGNNE#

INIT#INTR

RCIN#

SMI#NMI

STPCLK#

THRMTRIP#

RTCRST#

ENERGY_DETECT/GPIO13

GLAN_COMPOGLAN_COMPI

HDA_SDIN3

SATA2TXN

SATA2RXN

SATA2TXP

SATA2RXP

TP8

HDA_DOCK_EN#/GPIO33HDA_DOCK_RST#/GPIO34

LAN100_SLP

R521*1K

R176*56_4

C483*10P/50V_4

C48722PF/50V_4

R23510K_4

R180*56_4

R1901M_4

R561 24.9_6

R19920K/F

R22810K_4

R531BK1608LL241-T

R507 0_4

R236 BK1608LL241-T

R528*1K

C393

12PF/50V_4

R230 33

C729

*SFI0603-050E101NP

R197*0_4

R506 24.9_6

R50956_4

R243 33

R231 33R186332K/F

R508 0_4

R250 10K_4

R525 33

D11CH501H-40PT L-F

CN6DFHD02MS784

1234

PDCS1# [31]PDCS3# [31]

PDA[2:0] [31]

H_STPCLK# [3]

H_NMI [3]

H_INTR [3]H_INIT# [3]

H_IGNNE# [3]

RCIN# [39]

H_SMI# [3]

PM_THRMTRIP# [3,6]

H_PWRGD [3]

LFRAME# [35,39,41]

GATEA20 [39]

H_DPRSTP# [3,6,42]H_DPSLP# [3]

H_FERR# [3]

CLK_PCIE_SATA#[2]CLK_PCIE_SATA[2]

SATA_RXN0_C[31]SATA_RXP0_C[31]

SATA_TXN0[31]SATA_TXP0[31]

ACZ_SDIN0[32]PDD[15:0] [31]

SATA_LED#[28]

ACZ_SYNC_AUDIO [32]

ACZ_RST#_AUDIO [32]

BIT_CLK_AUDIO [32]

ACZ_SDOUT_AUDIO [32]

LAD0 [35,39,41]LAD1 [35,39,41]LAD2 [35,39,41]LAD3 [35,39,41]

H_A20M# [3]

PDDACK# [31]PDIOW# [31]

IRQ14 [31]PDIORDY [31]PDDREQ [31]

PDIOR# [31]

ICH_TP3 [14]

LAN_DISABLE#[26]

ACZ_SDIN1[34]

BIT_CLK_AUDIO_MDC [34]

ACZ_SYNC_AUDIO_MDC [34]

ACZ_RST#_AUDIO_MDC [34]

ACZ_SDOUT_AUDIO_MDC [34]

LDRQ#0

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Place within 500mils of ICH7

Place within 500mils of ICH7

MINI CARD1 PCI-E

EXPRESS CARD (NEW CARD)

25mils/15mils

Don't connect to PCI device / Express card

15/15mils

INTERUPTPCI ROUTINGTABLEREQ0# / GNT0# TI7402

IDSEL

INTE#,INTF#

DEVICE

AD25

14

for EMI request

SPI_CS#1PCI_GNT#0

ICH8 Boot BIOS select

PCI01

Low = A16 swap override enabledHigh = Default

LPC

PCI_GNT#3

1

A16 SWAP Override strap

1

SPI(Default)10

Boot BIOS Location

CHECK LIST suggest pull up 10k

PCIE-LAN(Marvell Lan)

Express Card 1

Ext Left Side

Mini Card WLANBluetooth

Ext Right Side TopExt Left Side Top

CAMERADocking

Ext Right Side

MINI CARD2 PCI-E

Express Card 2

For Robson

For Wireless

ICH8-M M PCI E(2/4) 2A13 54Friday, April 13, 2007


Date: Sheet of


USB_RBIAS_PN

DRI_IRCOMP_R

PCIE_TXN1_CPCIE_TXP1_C


SPI_CS1#

USBOC#0

USBOC#3USBOC#2

USBOC#4

USBOC#1

USBOC#5

USBOC#7USBOC#6

INTD#INTC#INTB#

REQ3#GNT3#

GNT2#REQ2#

REQ1#

SERR#

TRDY#FRAME#

IRDY#

PERR#LOCK#

STOP#

PAR

DEVSEL#PCIRST#

PCI_PME#

INTF#INTE#

PLT_RST-R#

AD0AD1AD2AD3AD4AD5AD6AD7AD8AD9AD10AD11AD12AD13AD14AD15AD16AD17AD18AD19AD20AD21AD22AD23AD24AD25AD26AD27AD28AD29

AD31AD30

SERR#

FRAME#

REQ2#

STOP#

INTH#

PERR#

REQ3#

CLK_PCI_ICHPLT_RST-R#

INTH#INTG#

REQ0#GNT0#

INTA#

INTF#

CLK_PCI_ICH

TRDY#

DEVSEL#INTG#

INTB#

INTD#

INTE#

REQ0#

INTC#

INTA#

USBOC#2

IRDY#

GNT3#

GNT0#

SPI_CS1#

USBOC#8USBOC#9

USBOC#8

USBOC#9

GNT1#

USBOC#7USBOC#1

USBOC#5

USBOC#4USBOC#6USBOC#3 USBOC#0

REQ1#


PCIE_TXP3_CPCIE_TXN3_C LOCK#

+3V

+1.5V_PCIE

+3V

+3V

+3V

+3V

+3V

+3V

3V_S5

3V_S5

3V_S5

C736 0.1U/10V_4

R257 *10K_4

C731 0.1U/10V_4

PCI

Interrupt I/F

U31B

ICH8M REV 2.0

D20E19D19A20D17A21A19C19A18B16A12E16A14G16A15B6

C11A9

D11B12C12D10C7

F13E11E13E12D8A6E8D6A3

A4D7E18C18B19F18A11C10

C17E15F16E17

C8D9G6D16A7B7F10C16C9A17

AG24B10G7

F9B5C5

A10 B3F12G11F8

AD0AD1AD2AD3AD4AD5AD6AD7AD8AD9AD10AD11AD12AD13AD14AD15AD16AD17AD18AD19AD20AD21AD22AD23AD24AD25AD26AD27AD28AD29AD30AD31

REQ0#GNT0#

REQ1#/GPIO50GNT1#/GPIO51REQ2#/GPIO52GNT2#/GPIO53REQ3#/GPIO54GNT3#/GPIO55

C/BE0#C/BE1#C/BE2#C/BE3#

IRDY#PAR

PCIRST#DEVSEL#

PERR#PLOCK#

SERR#STOP#TRDY#

FRAME#

PLTRST#PCICLK

PME#

PIRQA#PIRQB#PIRQC#PIRQD# PIRQH#/GPIO5

PIRQG#/GPIO4PIRQF#/GPIO3PIRQE#/GPIO2

R223 10K_4

RP42

8.2KX8

109876

12345

C734 0.1U/10V_4

R16624.9_6

T34

U30

TC7SH08FU

2

14

35

C450

0.1U/10V_4

R56422.6/F

RP41

8.2KX8

109876

12345

RP40

8.2KX8

109876

12345

R191 *10K_4

R218 10K_4

C735 0.1U/10V_4

PCI-Express

Direct Media Interface

USB

SPI

U31D

ICH8M REV 2.0

P27P26N29N28

M27M26L29L28

K27K26J29J28

H27H26G29G28

F27F26E29E28

D27D26C29C28

V27V26U29U28

Y27Y26W29W28

AB26AB25AA29AA28

AD27AD26AC29AC28

T26T25

Y23Y24

AJ19AG16AG15AE15AF15AG17AD12AJ18

G3G2H5H4H2H1J3J2K5K4K2K1L3L2M5M4

F2F3

C23B23E22

D23F21

AD14AH18

M1M2

N3N2

PERN1PERP1PETN1PETP1





PERN6/GLAN_RXNPERP6/GLAN_RXPPETN6/GLAN_TXNPETP6/GLAN_TXP

DMI0RXNDMI0RXPDMI0TXNDMI0TXP




DMI_CLKNDMI_CLKP

DMI_ZCOMPDMI_IRCOMP

OC0#OC1#/GPIO40OC2#/GPIO41OC3#/GPIO42OC4#/GPIO43OC5#/GPIO29OC6#/GPIO30OC7#/GPIO31

USBP0NUSBP0PUSBP1NUSBP1PUSBP2NUSBP2PUSBP3NUSBP3PUSBP4NUSBP4PUSBP5NUSBP5PUSBP6NUSBP6PUSBP7NUSBP7P

USBRBIAS#USBRBIAS

SPI_CLKSPI_CS0#SPI_CS1#

SPI_MOSISPI_MISO

OC8#OC9#

USBP8PUSBP8N

USBP9NUSBP9P

R239 *10K_4

C733 0.1U/10V_4

C740 0.1U/10V_4C739 0.1U/10V_4

C732 0.1U/10V_4

RP43

8.2KX8

109876

12345

C503 *33P/50V_4

R523

100K_4

R259 *0_4

T33

USBP0- [28]

USBP1- [28]

USBP2- [27]

USBP4- [38]

USBP5- [36]

USBP6- [35]

USBP7- [36]

USBP0+ [28]

USBP1+ [28]

USBP2+ [27]

USBP4+ [38]

USBP5+ [36]

USBP6+ [35]

USBP7+ [36]

DMI_RXN0 [6]DMI_RXP0 [6]

DMI_RXN1 [6]

DMI_RXN2 [6]

DMI_RXN3 [6]

DMI_RXP1 [6]

DMI_RXP2 [6]

DMI_RXP3 [6]

CLK_PCIE_ICH# [2]CLK_PCIE_ICH [2]

DMI_TXN0 [6]DMI_TXP0 [6]

DMI_TXN1 [6]

DMI_TXN2 [6]

DMI_TXN3 [6]

DMI_TXP1 [6]

DMI_TXP2 [6]

DMI_TXP3 [6]

PCIE_RXN1[35]PCIE_RXP1[35]

PCIE_RXN6[36]PCIE_RXP6[36]

PCIE_TXN1[35]PCIE_TXP1[35]

PCIE_TXN6[36]PCIE_TXP6[36]

AD[0..31][29]

C/BE0# [29]C/BE1# [29]C/BE2# [29]C/BE3# [29]

IRDY# [29]PAR [29]PCIRST# [29]DEVSEL# [29]PERR# [29]

SERR# [29,39]STOP# [29]TRDY# [29]FRAME# [29]

PCI_PME# [29]

PLT_RST-R# [6]

PLTRST# [14,18,26,31,35,36,39,41]

REQ0# [29]GNT0# [29]

USBP3- [23]USBP3+ [23]

CLK_PCI_ICH [2]

USBP8+ [28]USBP8- [28]

INTE# [29]INTF# [29]

PCIE_TXP2[26]

PCIE_RXN2[26]

PCIE_TXN2[26]PCIE_RXP2[26]

PCIE_RXN3[35]

PCIE_TXP3[35]

PCIE_RXP3[35]PCIE_TXN3[35]

USBP9- [35]USBP9+ [35]

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LAN_RST pin : 1.if used pciLAN please tie to PLTRST#2.if used PHY LAN please tieto RSMRST#

14

Controller Link 1VREF for IAMTsupport only

Low = DefaultHigh = NoReboot

HDA_SPKR

No Reboot strap

CRB STUFF2K%1

Controller Link 0VREF for IAMTsupport only

close to ICH

BOARD ID Selection

ID4 0: No docking.1: w/ docking

Function

00: TW7ID [1:0]

ID2

Board ID

01: DW7

ID3

ID5

10: SW7

1: CRT0: DVI

Place these close to ICH8M

EMI solution

0:Modem

0830

Near to SB

遠離螺絲孔

Near to SB

Near to SB

遠離螺絲孔

1:Without Modem

D3A

D3A

E3B

1:Without Internal Mic

0:Internal MIC

ICH8-M GPIO(3/4) 2A14 54Friday, April 13, 200

PCB STACK UP TW7- DESIGN 1 -...

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