Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

16
Pass Transistor Logic EMT 251

Transcript of Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Page 1: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Pass Transistor Logic

EMT 251

Page 2: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Pass Transistor LogicIn

puts Switch

Network

OutOut

A

B

B

B

Page 3: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Pass Transistor Logic

Gate is static – a low-impedance path exists to both supply rails under all circumstances

NMOS transistors only No static power consumption Ratioless (W/L) Bidirectional (versus undirectional)

Page 4: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Complementary Pass Transistor Logic (CPL)

Dual-rail form of pass transistor logic Avoids need for ratioed feedback Optional cross-coupling for rail-to-rail

swing

Page 5: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Example: AND/NAND gate

Page 6: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Example: OR/NOR gate

Page 7: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Example : XOR/XNOR gate

Page 8: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Cascaded Technique

Wrong!!

Correct!!

Page 9: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Draw a CMOS circuit based on this logic equation. Use a minimum number of transistors.

Page 10: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Transmission Gate Logic

EMT 251

Page 11: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Transmission Gate Logic (TG)

Most widely used solution Use both NMOS and PMOS in parallel Can be used for logic circuit implementation Full swing bidirectional switch controlled by the

gate signal (strong ‘0’ and ‘1’)

P

N

A(Vin ) B (Vout )

s

s

A (Vin ) B (Vout )

s

s

Page 12: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

The MOS transistor pass gate

1 1

0 passes a good 0

1

0 0

01

passes a bad 1

passes a bad 0 passes a good 1

nMOS

pMOS Near Short CCT Resistance small

Page 13: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

TG as a Tristate Buffer

B=A(or Z when S=0)

s

A

A(Vin) S Tn Tp B (Vout)0 0 off off Z (high impedance state (blocks logic flow))

0 1 on off 0 (nMOS passes strong 0, pMOS off when Vout<Vthp)

1 0 off off Z (high impedance state (blocks logic flow))

1 1 off on 1 (pMOS passes strong 1, nMOS off when Vout>Vdd-Vthn )

In steady state

Page 14: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Example : OR gate

Page 15: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Example : AND gate

Page 16: Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

Example : XOR gate