Parallel Parallel compressing system compressing system

for satellite for satellite on programmable on programmable

chipchip

Yifat Manzor Yifat Manzor & & Reshef Dahan Reshef Dahan

Supervisor: Eran SegevSupervisor: Eran Segev

Part Part AA

SatelliteSatellite image Input image Input Data rateData rate

from one sensor linefrom one sensor line B/W Picture Range – 2.5 km width Velocity - 8 km/sec 4 Pixels per 1m²

Rate = 80 Mpix/sec

Streaming Data 12-bit per pixel

5,000 pix

16,0

00 li

nes/

sec

80 Mpixel image

System demands:System demands: »» 80Mpix/sec input data rate.80Mpix/sec input data rate.»» Image width – 5000 pixel Image width – 5000 pixel

ADV202, compressing ADV202, compressing device indevice inreversible mode, reversible mode, capabilities:capabilities: »» 27 Mpix/sec maximum input 27 Mpix/sec maximum input data ratedata rate» 25 MByte/sec maximum output » 25 MByte/sec maximum output rate rate »» Maximum image width – 4096 Maximum image width – 4096 pixel pixel » Maximum image length – infinity» Maximum image length – infinity

Solution Solution MAIN IDEAMAIN IDEA

To generate parallel

processing by separating the

picture to 3 compressors

1667pix 1667pix 1666pix

3

16,0

00 li

nes

/sec

Tile

Memory

ADV202

ADV202

ADV202

Rocket I\O

System DescriptionSystem DescriptionXilinx’s development board –

Virtex2Pro

camera

FPGA

FPGA block diagramFPGA block diagram

Compressed data

Rocket I/ODIVIDER

Compression Unit

Compression Unit

Compression Unit

MERGER

ImplementationImplementation

ModularityModularity Strip size and rate compatible with the Strip size and rate compatible with the

compressor’s abilities.compressor’s abilities. Function block in designFunction block in design

scalabilityscalability Merge and Divide protocolMerge and Divide protocol Infrastructure for future systems requiring Infrastructure for future systems requiring

working in higher rates and/or handling working in higher rates and/or handling larger image size.larger image size.

ImplementationImplementation ContCont..

Power saving in spacePower saving in space Compressing units – minimum as Compressing units – minimum as possible.possible. Buffer in/out - minimum storing space.Buffer in/out - minimum storing space.

DividerDivider

• Separates the streamed data to Separates the streamed data to 33 infinite, infinite, equal equal width strips.width strips.

• Separation techniqueSeparation technique - - cyclic, streams 1/3 cyclic, streams 1/3 of of every line to a different compression unit.every line to a different compression unit.

DIVIDER

Compression Unit

Compression Unit

MERGER

Compression Unit

DividerDivider - Architecture - Architecture

compression unit 1

Divider_unitcompression unit 2

compression unit 3

Rocket IO

80MHz

compression unitcompression unit

• rate coordinator between therate coordinator between the divider and thedivider and the ADV202 input rate.ADV202 input rate.• ADV202 model – imitates theADV202 model – imitates the real ADV202 interface.real ADV202 interface.• rate coordinator between the ADV202 rate coordinator between the ADV202 output rate output rate and the merger.and the merger.• communicates with the merger for sending communicates with the merger for sending compressed data packages.compressed data packages.

DIVIDER

Compression Unit

Compression Unit

Compression Unit

MERGER

25MHz

Compression unitCompression unit - - ArchitectureArchitecture

27MHz

funnel adv_202model

comp_databuff

Interrupt_generator

From divider

80MHz

8 bits12 bitsTo/from merger

To merger

80MHz

mergermerger• Merges 3 streaming dataMerges 3 streaming data channels to a singlechannels to a single streaming data.streaming data.• Manages an interrupt queue.Manages an interrupt queue.• Draws fixed size, compressed packages Draws fixed size, compressed packages from the from the compression units.compression units.• Generates a header to every drawn Generates a header to every drawn package.package.

DIVIDER

Compression Unit

Compression Unit

Compression Unit

MERGER

compressed data

package

header

OutputOutput:

MergerMerger - Architecture - Architecture

headergenerator

calculator

80MHz

To/from unit 0

To/from unit 2

To/from unit 1 Compressed output

25MHz

MergerMerger – Architecture cont – Architecture cont..calculatorcalculator

Interrupt from unit 0

outputgenerator

queuegenerator queue

To\from header generator

Data to/from unit 0

Data to/from unit 1

Data to/from unit 2

80MHz

Interrupt from unit 2

Interrupt from unit 1

25MHz

Compressed output

ScalabilityScalability aspect - aspect - 8 sensors lines8 sensors lines

ON BOARD POWER

PC 1-2/ GLOBALGLOBAL MERGERMERGER

DIVIDER MERGER

Comp.

UnitComp.

UnitComp.

Unit

Testing EnvironmentTesting Environment

DIVIDER MERGER

Comp.

UnitComp.

UnitComp.

Unit

Virtex2Pro

Generator

Rocket I/O

Check Results

memory

StatusStatus

PhasePhase

componentcomponent

implementationimplementationLogic Logic

simulation simulation (ModelSim)(ModelSim)

Synthesis Synthesis place & routeplace & route

DividerDivider√√√√XX

Compression Compression unitunit√√√√XX

mergermerger√√√√XX