Paper 28.7 – ISSCC2005

A 3Gb/s AC Coupled Chip-to-Chip Communication using a Low Swing Pulse Receiver

Lei Luo, John M. Wilson, Stephen E. Mick, Jian Xu, Liang Zhang and Paul D. Franzon

North Carolina State University, Raleigh, NC

2

High density High density CapacitivelyCapacitively Coupled I/OsCoupled I/Os

3D-IC

Proximity Comm.

Chip1 Chip2

Chip3 Chip4

AC Coupled Interconnect

Circuit View

DensityFlexibilityMore integrationLonger DistanceLossy

3

i

ii

iii

pulse signaling waveformscircuit view

i ii iiiRXTX

AC Coupled Interconnect (ACCI)AC Coupled Interconnect (ACCI)

75um I/O pitch6,000+ I/Os /cm2

Low power

physical structure

Interconnects

AC Connection(Capacitive Coupling)

Trench

DC Connection(Buried Solder Bump)

Chip1 Chip2

Substrate

4

Channel ResponseChannel Response

10cm TL on PCB20cm 40cm

5

Expand 3dB bandwidthExpand 3dB bandwidth

20cm PCBMicro-strip Line

4.1 12.5

T-Line

ACCI

6

Traditional EqualizationTraditional Equalization

TX RX

Frequency

Channel

Bit-rate/2Frequency

Equalizing Filter

Bit-rate/2Frequency

Equalized Channel

Bit-rate/2

7

ACCI EqualizationACCI Equalization

Frequency

Pulse RX (latch)

Bit-rate/2Frequency

Equalized Channel

Bit-rate/2Frequency

ACCI Channel

Bit-rate/2

RXTX

8

ISI of Pulse SignalISI of Pulse SignalCurrent Bit Next Bit

600 800 1000 Time (ps)

RXTXVpp

(mV)

13% Tail

3% Tail

160

120

80

40

0

9

EYE at RX inputEYE at RX input

Increasing CouplingCapacitance

Vpp

(mV)

Time (ps)

150

100

50

0

-50

-100

-150

-2000 200 400

ISI limit

Swing limit

10

Components of ACCIComponents of ACCI

ACCI Channel

TX outputs NRZ to channel

Pulse RX converts pulses back to NRZ, then goes to clock and data recovery

11

Low power driverLow power driver

Current Mode Vs. Voltage Mode50 ohm TL load Vs. Cap loadStatic current Vs. dynamic current10mA Vs 1.3mA (to get a 0.25VSEPP output swing, for 0.18um CMOS)

10mA 1.3mA

12

Power SavingPower SavingPower of 0.18um Driver

0

5

10

1520

25

30

35

40

0.2 0.3 0.4 0.5

Output Swing (V)

Pow

er o

f Driv

er (m

W)

Current Mode DriverVM Driver @ 5GbpsVM Driver @ 4GbpsVM Driver @ 3GbpsVM Driver @ 2Gbps70% less

89% less

ACCI Driver consumes dynamic power, depending on data rate and data activity

13

(All scaled to 0.18um/1.8Vdd).

ACCI need sensitive pulse receiverACCI need sensitive pulse receiver

14

Vb

Vpulse in+

Vnrz out+ Vnrz out-

Vpulse in-

M1

M3

M5

M2

M4

M6

M7 M8

M11 M12

M10

M9Vb

Vpulse in+

Vnrz out+ Vnrz out-

Vpulse in-

M1

M3

M5

M2

M4

M6

M7 M8

M11 M12

M10

M9

A low swing pulse receiverA low swing pulse receiver

latch

Input Stage Input Stage

15

Vpulse in+

M1

M3

M5

Vpulse in+

M1

M3

M5

Input stageInput stage

ISI due to limited bandwidthSwing Vs. bandwidth tradeoff INV and feedback ratio

Without ISI

With ISI

16

Latch stageLatch stage

Vb

M7 M8

M11 M12

M10

M9Vb

M7 M8

M11 M12

M10

M9

Latch : M11 and M12; Edge Detector: M7 and M8Swing and bandwidth tradeoff M10

Without or with weak clamp_D: Huge ISI

With proper clamp_D: Minimized ISI

Without M10

With M10

17

Simulated Simulated ShmooShmoo PlotPlot

Works over wide range of Coupling Capacitance, TL Length, up to 3Gb/s

Pass Criteria: 0.8 UI Eye Opening

TL(cm)

CC(fF)

230

180

130

80

300 5 10 15 20 25

18

Test chipTest chip

15 cm50 ohmPCB trace

Multi-Phase DLL

PRBS Generator

MUX TX

RXSampler

Clock Recovery

Multi-Phase DLL

BER TesterScope

Clock Source

Data

BER

Clock Reference

Test Chip

Data

Clock Recovered

Clock

Clock

Control

19

TXT

RXT1 RXT2 RXT3 RXT4 RXT5

TX1-7 and Pads

RX1-5 and Pads

Die photoDie photo

TSMC 0.18um CMOS, 2mm by 3.5mm

20

Test Setup on PCBTest Setup on PCB

15 cm long 50 ohm differential PCB trace

150fF Coupling Capacitors

21

Chip and Measured dataChip and Measured data

< 10-12BER60um by 60um on-chip (150fF)Coupling Caps

134Total

116.5Clock, testcircuit andbuffers

10Pulse RX5DriverPower

(mW)

7ps RMSJitter of recover data15cm and 50ohm micro-strip lineLink

3Gb/s/channelData Rate1.8VSupply VoltageTSMC 0.18um CMOS 1P 6MProcess

22

Recovered Clock and DataRecovered Clock and Data

Recovered Clock Recovered and Deserialized Data

23

MCMMCM--D TestD Test

• 0.35 um CMOS Flip-chip• 5.6cm MCM Line• 5Gbps over two channels

(2.5Gb/s/ch)

TSMC 0.35µm Chip Bump Trenches & ACI

Assembled ACCI System

24

Substrate / Chip BondingSubstrate / Chip Bonding

Substrate

Chip

ACCI chip and substrate

Buried solder bumps

ACCI coupling capacitor and buried solder bumpsCoupling capacitor

MCM-D fabricated and assembled by MCNC

25

ConclusionsConclusions

AC Coupled interconnectHigh density reliable I/Os

Band-pass channel response and Equalization

ACCI transceiverVoltage mode driver

A low swing pulse receiver

Demonstration15cm TL on PCB

MCM with 5.6cm TL on BCB substrate