Panasonic TV LCD LX600 -Manual de Training

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    CTV Training Manual

    K1 Chassis

    13 Inch: TCD1372, TCD1373, TCD1382TXD1372, TXD1373, TXD1382

    TXE1386,TXE1370

    19 Inch: TXD1972, TXD1973,TXD198220 Inch: TXD2022

    Samsung Electronics America

    Product Support Department.

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    ContentsBlock Diagrams

    Power Circuit

    IC Block Diagram & Pin Description

    Voltage Regulation Circuit

    Power Supply Description

    Troubleshooting Guide

    Micom Circuit

    IC Pin Description

    MICOM (IC901) Port Description

    E-PROM (IC902) Port Description

    IC Pin Voltage & Waveforms

    Tuner Circuit

    IF/Chroma/Video Circuit

    IC Pin Description

    IC Port Voltage & WaveformsTA1201 (IC201) Port Voltage & Waveform

    Picture IF Block Circuit

    Sound IF Block Circuit

    Video Block Circuit

    Chroma & OSD Block Circuit

    Troubleshooting Guide

    Horizontal Deflection Chart

    Horizontal Deflection Drive Block Circuit

    Troubleshooting Guide

    Vertical Deflection Circuit

    IC Description & Operation

    Vertical Deflection Drive Block Circuit

    Troubleshooting GuideSound Circuit

    IC Port Voltage & Waveforms

    ICK01 Port Voltage & Waveform

    IC601 Port Voltage & Waveform

    Troubleshooting Guide

    CRT Drive Circuit

    Alignment and Adjustments

    Service Mode Adjustments

    Alignment and Adjustment

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    K1 Chassis

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    Block Diagrams

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    Power Circuit

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    IC Block Diagram & Pin Description

    IC802 (SMR-40100)IC802 Multi RegulatorPin No Description Stand-by Power-On

    Voltage Voltage

    1 5V Input for Pin 9 13V 12.5 V

    2 9V Input for Pin 8 13 V 12 V

    3 Reset Noise Filter 2.5 V 2.5V

    4 Power Control Input 0 V 4.7 V

    5 GND 0 V 0 V6 Micom Reset Output 4.3 V 4.3 V

    7 Feedback 0 V 2.3 V

    8 9V Vcc Output 0 V 8.7 V

    9 5V Vcc Output 5 V 5 VIIC801

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    (STAND-BY) IC801 PIN 1

    HC801 PIN 4

    (STAND-BY) IC801 PIN 2

    HC801 PIN 6

    (STAND-BY) 1C801 PIN 3

    (POWER ON) 1C801 PIN 1

    HC801 PIN 4

    (POWER ON) IC801 PIN 2

    HC801 PIN 6

    (POWER ON) 1C801 PIN 3

    ACQUISITION MODE: PEAK DETECT

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    (STAND-BY) IC801 PIN 4 (STAND-BY) IC801 PIN 3 (STAND-BY) 1C801 PIN 8

    (POWER ON) 1C801 PIN 4 (POWER ON) IC801 PIN 3 (POWER ON) 1C801 PIN 8

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    (POWER ON) T801 PIN 4

    CONT.BR: Min

    (STAND-BY) T801 PIN 12 (POWER ON) T801 PIN 4

    CONT: Max.BR: Center

    (POWER ON) T801 PIN 12 (POWER ON) T801 PIN 4

    CONT.BR: Max

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    (STAND-BY) T801 PIN 9 (POWER ON) T801 PIN 9

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    Voltage Regulation Circuit

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    Power Supply Description

    1. Initial Start

    AC In -> D801 -> NT801 -> HC801 Pin 1 -> HC801 Pin 6 -> IC801 Pin 2 -> S/TR(Q1) base -> S/TR(Q1) On

    2. S/TR On-time control

    Once S/TR turns on. the an induced voltage in D winding supplies the base current to base of S/TR to keep it turned on.

    Charged cap.(C 1) inside HC801 during S/TR OFF starts to discharge through:

    HC801 Pin 6 -> IC801 Pin 2 -> S/TR (Q1) Base

    Output voltage(S Winding) Down -> D Winding Voltage Down -> C851 Down ->

    Error Amp Al output current Down & Current through IC801 Pin 1 to base of Q3 Down

    Cap. C2 between Base and Emitter of Q3 charges slowly, and On-time increases.

    Output voltage(S Winding) Up -> D Winding Voltage Up -> C851 Up -> Error Amp Al output current Up & Current

    through IC801 Pin 1 to base of Q3 Up -> Cap. C2 between Base and Emitter of Q3 charges faster, and On-time

    decreases.

    CONTINUED

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    Power Supply Description

    3. S/TR Off-time control

    As base-engineer of Q3 reaches about 0.6V. the Q3 turns on, and S/TR Q1 turns off, and reverse voltages are induced in all

    windings. The reverse voltage. induced in D winding mm to discharge cap. C1 between Pin 3 and 6 of HC801 and Cap. C2

    between base and emitter of Q3, then charges them in reverse direction through zenor diode inside IC801 between C-E of Q3

    and through R5.D1 between base of Q3 and nondotted terminal of D winding.

    Off-time is time duration from the moment the load current starts to flow and to the moment it decreases to zero. How fast the

    current decreases to zero depends on peak- current in primary winding during S/TR on. If output is to be regulated then the

    load current slope should remain same, thus the bigger the peak current the longer Off-time is.

    After the load current decreases to zero, the charged cap. C 1 supplies base current to S/TR Q I to turn it on again.

    CONTINUED

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    Power Supply Description

    4. Output Regulation

    Typical Switching On/Off time

    AC Voltage: 120 Vrms

    Condition T on T off Switching Freq.

    Contrast.Bright:Max 5 uS 13 uS 55.6 KHz

    Cont:Max, Bright: Center 4.5 uS 11 uS 64.5 KHz

    Contrast,Bright:Min 3 uS 10 uS 76.9 KHzStand-By 2 uS 7 uS 111.1 KHz

    Any voltage change in output is reflected through D winding, and then turn-on time is controlled by voltage of charged cap.

    C851 during S/TR off, and voltage of D winding.

    By controlling On-time, the peak current can be controlled, and in turn the output can be regulated.

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    Troubleshooting Guide

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    Micom Circuit

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    IC Pin Description

    1. Micom (IC901) Port DescriptionPin No Pin Name In/Out Description6 SOUND MUTE OUTPUT SOUND MUTING

    9, 10 KEY IN IN/OUT VOLTAGE CONTROLLED KEY INPUT

    11 AFT INPUT FINE TUNING

    12 HOLD INPUT POWER-OUT DETECTION

    14 LED 1 OUTPUT STAND-BY: RED, TIMER:GREEN

    15 LED2 OUTPUT LED FLASHING W/REMOTE KEY PRESSED

    17 D-COIL OUTPUT DEGAUSSING CONTROL

    18 POWER OUTPUT POWER ON/OFF CONTROL

    19 A/V IN1 INPUT VIDEO JACK PRESENCE DETECTION

    20 SPOT OUTPUT CRT SPOT CONTROL

    22~24 R,G,B OUT OUTPUT OSD,TEXT RGB OUTPUT

    25 BLK OUTPUT BLANKING

    26 H-SYNC INPUT HORIZONTAL SYNC

    27 V-SYNC INPUT VERTICAL SYNC

    28,29 OSC IN/OUT IN/OUT VIDEO IN FOR CAPTION DECODING

    31,32 X-TAL 1,2 IN/OUT OSCILLATION33 RESET INPUT RESET

    34 VDD INPUT MAIN B+

    36 IR-IN INPUT REMOTE SIGNAL DETECTION

    39 SCL1 OUTPUT SERIAL CLOCK

    40 SDA1 IN/OUT SERIAL DATA

    42 CCD OUTPUT OSD ???

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    IC Pin Description2. E-Prom (IC902) Port Description

    Pin No Pin Name In/Out Description

    1~3 A0~A2 INPUT ADDRESS INPUTS

    4 VSS INPUT GND

    5 SDA IN/OUT SERIAL DATA

    6 SCL INPUT SERIAL CLOCK

    7 WC INPUT WRITE CONTROL

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    IC Pin Voltage & Waveforms1. IC901 Port Voltages & WaveformsPin No Voltage & Waveform

    6 Mute On: 0.65 V Volume Min: 0.65 V Mute Off: 0.1 V

    9 See print-out

    10 See print-out

    11 No signal: 1.2 V Tuned: 1.2 V Detuned: See print-out

    12 3.7 V

    14,15 0.2 V (LED off)

    17 When Reset Pin changes from 0V to 5V, Pin 17 Voltage becomes 0.7 V for about 2 seconds, then goes down to 0 V.

    18 Power On: 5 V Power Off: 0 V19 Video Jack In:5 V Video Jack Out: 0.4 V

    20 Power On: 0 V Power Off: 5 V

    22,23,24 OSD On (MENU): 0.6 Vp-p No OSD: 0.2 Vp-p

    25 ?

    26 See print-out

    27 See print-out

    28 See print-out

    29 1.6 V31,32 See print-out

    33 4.9 V

    34 4.9 V

    36 No Remote key pressed: 4.9 V Any key pressed: 4.9 Vp-p

    38 4.9 V

    39,40 0.2 Vp-p OSD On: 0V

    42 ?

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    MICOM PIN 9 MICOM PIN 10 MICOM PIN 11

    MICOM PIN 26 MICOM PIN 27 MICOM PIN 28

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    MICOM PIN 31 MICOM PIN 32

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    Tuner Circuit

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    IF/Chroma/Video Circuit

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    IC Pin DescriptionTA1201 (IC201) Port DescriptionPin No Pin Name In/Out Description

    1,2 SOUND OUTPUT OUTPUT Volume controlled sound output

    3 RF AGC OUT OUTPUT Detected RF AGC goes to Tuner

    4 SIF TANK COIL IN/OUT 4.5 Mhz SIF Tank for FM detection

    5 AGC FILTER IN/OUT To reduce noise on RF AGC output

    6 PIF GND - -

    7,8 PIF INPUT INPUT Input for Saw Filter Output

    9 PIF VCC INPUT 0

    10 PLL LOOP FILTER IN/OUT Filter to stabilize PLL circuit

    11 APC FILTER IN/OUT Filter to stabilize APC circuit12 3.58 MHZ VCXO IN/OUT Oscillation for chroma processing

    13 V/C/D gnd - -

    14 BLANKING IN (OSD) INPUT OSD blanking signal input from Micom

    15~17 OSD RGB INPUT INPUT OSD RGB input from Micom

    18 DIGITAL VCC INPUT -

    19~21 RGB OUTPUT OUTPUT Analog RGB output

    22 VERTICAL OUTPUT OUTPUT Vertical deflection drive pulse output

    23 NFB INPUT Negative Feedback input for Amplitude adjustment

    24 VERT RAMP INPUT Ramp pulse input for vertical position control

    25 VERT SYNC FILTER IN/OUT Vertical sync separation filter

    26 H-DRIVE CKT B+ INPUT -

    27,28 I2C BUS IN/OUT IN/OUT Micom bus line data clock

    29 X-RAY INPUT Monitor abnormal HV increase

    30 FBP INPUT INPUT Flyback pulse input for AFC control

    31 SYNC OUT OUTPUT Composite sync output

    32 H-OUT OUTPUT Horizontal deflection drive pulse output

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    TA1201 (IC201) Port Description (continued)Pin No Pin Name In/Out Description

    33 AFC FILTER IN/OUT Filter to stabilize AFC output34 32FH VCO IN/OUT Oscillation to make Hor. & Vertical drive pulse

    35 DIGITAL GND - -

    36 ABL INPUT Beam current feedback input for limiting Brightness

    37 TV INPUT INPUT Composite video input

    38 ACL INPUT Beam current feedback input for limiting Contrast

    39 EXT VIDEO INPUT INPUT External video input

    40 BLACK PEAK IN/OUT Peak black level detection

    41 VIDEO S/W OUTPUT OUTPUT Selected video output

    42 DC RESTORATION IN/OUT Detects average peak level of Y signal

    43 Y INPUT INPUT Y signal input

    44 AFT OUTPUT AFT out for fine tuning

    45 C INPUT INPUT C signal input

    46 V/C/D VCC INPUT -

    47 TV DET OUT OUTPUT Detected video signal output

    48 SIF VCC INPUT -

    49,50 PIF TANK COIL IN/OUT PIF tank for video detection & AFT detection

    51 SIF GND - -

    52 LIMITER INPUT INPUT Limits amplitude of SIF signal and sets reference level

    53 TV AUDIO INPUT INPUT Detected FM signal output54 DE-AMPHASIS IN/OUT Deamphasizes the detected FM signal

    55,56 EXT AUDIO INPUT INPUT External audio input

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    IC Port Voltage & Waveforms1.TA1201 (IC201) Port Voltage & Waveforms

    Pin No Voltage & Waveform

    1

    3 No Picture: 7.8 V

    Picture (Color Bar): 4.8 V

    4 See print-out

    5 No Picture: 4.6 V

    Picture (Color Bar): 4.1 V

    7, 8 See print-out9 8.6 V

    10 When CH is changed, voltage swings from

    3.6 V to 4.2 V

    11 5.8 V

    12 See print-out

    18 3.2 V

    19,20,21 See print-out

    22 See print-out24 See print-out

    25 See print-out

    26 See print-out

    29

    30 See print-out

    31 See print-out

    Pin No Voltage & Waveform

    32 See print-out

    33 T V

    34 See print-out

    36, 38 Contrast Bright Pin 36 Pin 38

    Max Max 3.0 V 3.0 V

    Max Center 2.7 V 3.4 V

    Min Min 2.3 V 2.8 V37 See print-out

    40 5 V (Color Bar)

    41 Same as pin 37

    42 See print-out

    43 See print-out

    44 Detuned: See print-out Tuned: 0.6 V

    45 See print-out

    46 8.6 V47 See print-out

    48 8.5 V

    49, 50 See print-out

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    IC201 PIN 4 IC201 PIN 7, 8 IC201 PIN 12

    IC201 PIN 19, 20, 21 IC201 PIN 37 IC201 PIN 43

    ACQUISITION MODE: PEAK DETECT

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    IC201 PIN 45 IC201 PIN 49, 50

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    Picture IF Block Circuit PIF Process DescriptionThe IF signal from the tuner enters the SAW filter after being amplified

    through the IF pre AMP lo compensate the insert loss of file SAW filter.

    The output of like SAW filler is sent to pin 7,8 of IC201. The amplified

    IF signal through the PIF AMP enters Q-DET and I-DET circuits.

    The Q-DET circuit generates error voltage by the phase difference

    between 90 degree shifted VCO output signal and PlF carrier signal.

    The error voltage is smoothed by the loop filter, and controls the VCO

    circuit for synchronization with the PHF carrier and also enters the AFT

    circuit.

    The AFT circuit amplifies the DC component of VCO Control voltage,

    and outputs AFT voltage through pin 44. The VCO free-run frequency is

    controlled by the bus.

    The I-DET circuit detects TV signal from VCO output signal and PIF

    signal. The detected TV signal is output from pin 47, and to the Lock

    and AGC detection circuits.

    The Lock detection circuit determines whether the AFT tuning is com-

    plete. When completed, it mutes the AFT circuit.

    The AGC detection circuit detects file sync level of TV signal and con-

    trols file gains of tuner RF-AMP and PIF-AMP to maintain the constant

    sync level. The reference voltage level to RF AOC AMP can be con-

    trolled by the bus.

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    Sound IF Block Circuit SIF Process DescriptionThe 4.5MHz SIF signal from Pin 6 of ICK01 goes through the

    BPF to eliminate any remaining video component, and isinput to the limiter circuit.

    The limiter circuit limits the 4.5 MHz SIF signal amplitude,

    and send the signal to the FM detection circuit.

    The FM is detected by the use of quadrature detection method

    with the VCO controlled phase shifted oscillation by the tank

    coil connected to Pin 4.

    The detected FM signal goes to the audio switching circuit via

    the Deamphasis circuit.

    The external audio signal enters the switching circuit via pin

    55,56. The TV audio or external audio can be selected by the

    bus control. The selected audio signal enters the audio AMP

    and is outputted through pin 1,2 with volume controlled by

    the bus.

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    Video Block Circuit

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    Video Block CircuitVideo Process DescriptionThe TV signal output from pin 47 is applied to pin 37 TV In through 4.5MHz Trap circuit to remove any remaining audio sig-nal, still sent to switching circuit. The selected signal is amplified twice for sync separation.

    Meanwhile, the external video signal enters through pin 39. The output signal of pin 41 is reduced to half by like resistor

    divider circuit and Q202 to the original amplitude and enters pin 43 video clamp amp circuit and pin 45 chroma circuit.

    The clamp circuit limits, and establishes the reference amplitude of Y signal.

    The video signal through clamp circuit enters black stretch circuit after a color signal is removed by 3.58 MHz Trap, which is

    turned on/off by the bus.

    The black stretch circuit extends Y signal toward more black level, emphasizes contrast, and limits amplitude of Y signal. The

    black level detecting filter is connected to pin 40.

    Then the Y signal enters the DC restoration circuit, which detects the average peak level of the Y signal and controls the clamp

    circuit by the difference between the reference set by the clamp circuit and pedestal level of the Y signal.

    The Y signal passed through the DC restoration circuit adjusts the timing to the chroma signal at the Y-DL circuit.

    The Y signal passes through brightness, contrast circuit, and WPL circuit where the amplitude is limited. ACL, and ABL cir-

    cuit limits peak amplitude of contrast and brightness level.

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    Chroma & OSD Block CircuitChroma Block Circuit

    OSD Block Circuit

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    Chroma & OSD Block CircuitChroma Process Description

    The chroma signal is defected from the input video signal of

    pin 41 through 3.58 MHz BPF after DC component is cut out

    by the coupling cap. C235 and noise filter.

    The detected chroma signal enters ACC circuit where the

    color burst signal is detected. With detected burst signal's

    amplitude, the color signal level is controlled through the

    Micom bus.

    The gain-controlled chroma signal enters the color circuit, and

    the burst signal enters the APC slid killer circuit. The color

    circuit controls the output of color/B & W signals by the mute

    signal of the killer circuit. The color/B&W signal enters the

    demodulation circuit.

    The APC circuit outputs an error signal caused by the phase

    difference between reference carrier of the VCXO circuit andcolor burst signal. The error signal is smoothed by the filter

    connected to pin 11 and Controls the VCXO Circuit.

    The 3.58 MHz reference carrier synchronized to the color

    burst signal enters the APC circuit, killer circuit, and tint cir-

    cuit. The killer circuit compares oscillations between color

    burst signal and reference carrier. If there is no color burst

    signal (B&W signal) at low level burst signal caused by poor

    reception, the mute signal is output by the killer circuit. Thetint circuit through the Micom bus controls the phase of the

    reference carrier.

    This controlled signal enters the demodulation circuit. The

    demodulation circuit demodulates color difference signal from

    the chroma signal and reference carrier. Next the LPF

    removes unnecessary harmonic waves. The matrix demodu-

    lates RGB signal from the Y and color difference signal.

    OSD Process Description

    The OSD Signal is converted by the timing between the RGB

    signal and fast blanking signal, and goes to the cut-off/drive

    circuit, which mixes OSD RGB with picture RGB signals.

    The out of mixed RGB signal is applied to CRT pre-drive

    amp.

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    Troubleshooting Guide

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    Horizontal Deflection Chart

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    IC201 PIN 30 IC201 PIN 32

    IC201 PIN 31 IC201 PIN 34

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    POINT 1 POINT 2 POINT 3

    POINT 4 POINT 5 POINT 6

    ACQUISITION MODE: PEAK DETECT

    GND

    ACQUISITION MODE: PEAK DETECT

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    POINT 7 POINT 8 POINT 9

    IC201 PIN 31, 32

    (HS:31)

    IC201 PIN 31, 32

    (HS:0)

    ACQUISITION MODE: PEAK DETECT

    GND

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    Horizontal Deflection Drive Block Circuit

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    Horizontal Deflection Drive Block CircuitHorizontal Deflection Drive Process Description

    The video signal input to the horizontal sync separation circuit becomes a composite sync signal and enters AFC-1 circuit and

    vertical sync separation circuit.

    Immediately it is output from the pin 31. The AFC-1 circuit outputs the error voltage caused by the phase difference between

    the composite sync signal and H count down output signal, and this error voltage is smoothed by the filter connected to the pin

    33. The error voltage also controls the 32fH VCO circuit, which controls the frequency of the ceramic oscillator connected to

    the pin 34 and outputs the 32fH signal synchronized to the horizontal sync signal.

    This synchronized signal enters the H count down circuit, which outputs signals divided from the 32fH signal. This dividedsignals enter AFC-1, AFC-2, V count down, and H-Ramp circuits.

    The AFC-2 circuit, which outputs error voltage caused by the phase difference between the H countdown output signal and

    flyback pulse signal, controls the horizontal output circuit. At this time, the H-Out signal is generated to set the horizontal sig-

    nal and flyback pulse phase through the bus.

    The horizontal signal is output from the pin 32. The horizontal position of the picture is controlled by the bus which sets the

    phase between the synch signal and flyback pulse.

    The horizontal circuit can be cut off by the X-ray circuit if the input voltage of the pin 29 goes above the critical limit (about

    0.5 V).

    K1 Chassis

    [ ]TOC 41

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    Troubleshooting Guide

    K1 Chassis

    [ ]TOC 42

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    Vertical Deflection Circuit

    K1 Chassis

    [ ]TOC 43

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    K1 Chassis

    [ ]TOC 44

    IC Description & OperationIC301 KA2131

    Pin DescriptionPin No Description Remarks

    1 GND

    2 Vertical Drive Output 50 Vp-p

    4 Pump Up Cap. Connection 424 V(48 Vp-p)6 Vertical Drive Input Vertical Oscillation

    7 Sawtooth Input Sawtooth Input

    8 Blanking Pulse Output Blanking Pulse

    9 B1 424 V

    Deflection Current Flow1. During First Half Deflection Cycle

    24 V Line --> D301 --> Pin 4 --> Q1 --> Pin 2 -->

    C306 --> DY --> R304

    * Q1 On, Q2 Off

    2. During Second Half Deflection CycleQ3061 --> Pin 2 --> Q2 --> R304 --> DY --> C306

    * Q1 Off, Q2 On

    3. During Vertical Retrace Period

    Q309--> Pin 4--> Q1--> Pin 2--> C306--> DY--> R304

    * Q1 On, Q2 Off

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    K1 Chassis

    [ ]TOC 45

    Vertical Deflection Drive Block Circuit Vertical Deflection Drive Process Description

    The video signal input to the horizontal sync separation cir-cuit becomes a composite sync signal and enters AFC-1 cir-

    cuit and V-sync separation circuits.

    The vertical sync separation circuits separates the vertical

    sync from the composite sync signal by the filler connected to

    the pin 25.

    The vertical sync signal enters the vertical count down circuit

    where the vertical drive signal is obtained after counting down

    with the H CID circuit output as the reset signal.

    This vertical drive signal enters vertical ramp circuit, which

    outputs a compensated drive signal through the pin 22. The

    NFB signal from the pin 23 compensates the drive signal for

    correct phase and amplitude. Also the filter connected to the

    pin 24 is controlled by the bus. By controlling the

    charging/discharging current the vertical size of the picture isdetermined.

    Also by changing timing the vertical position can be adjusted.

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    K1 Chassis

    [ ]TOC 46

    IC201 PIN 22 IC201 PIN 23

    IC201 PIN 24 IC201 PIN 25

    ACQUISITION MODE: PEAK DETECT

    K1 Ch i

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    [ ]TOC

    47

    POINT 1 POINT 2 POINT 3

    POINT 4 POINT 5

    K1 Ch i

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    [ ]TOC 48

    POINT 6 POINT 7

    POINT 8 POINT 9

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    K1 Chassis

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    IC201 PIN 22(VA:0)

    IC301 PIN 2(VA:0)

    IC201 PIN 22

    (VA:63)

    IC301 PIN 2

    (VA:63)

    ACQUISITION MODE: PEAK DETECT

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    Troubleshooting Guide

    K1 Chassis

    [ ]TOC 50

    K1 Chassis

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    Sound Circuit

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    [ ]TOC 51

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    IC Port Voltage & Waveforms

    1. ICK01 Port Voltage & Waveform

    Pin No Voltage & Waveform

    1 See printout

    2 See printout

    3 6.6 V

    6 See printout

    7 8.7 V

    9 6.7 V

    1. IC601 Port Voltage & Waveform

    Pin No Voltage & Waveform

    1 11.8 V

    2 11.8 V

    3 See printout6 See printout

    8 See printout

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    [ ]TOC 52

    K1 Chassis

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    IC201 PIN 1(VOL:Max) IC201 PIN 52 ICK01 PIN 1, 2

    IC201 PIN 53

    (VOL:Max)

    IC201 PIN 54 ICK01 PIN 6

    ACQUISITION MODE: PEAK DETECT

    ACQUISITION MODE: PEAK DETECT ACQUISITION MODE: PEAK DETECT

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    [

    ]TOC 54

    IC601 PIN 3

    (VOL:Max)

    IC601 PIN 6

    (VOL:Max)

    IC601 PIN 8

    (VOL:Max)

    ACQUISITION MODE: PEAK DETECT

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    Troubleshooting Guide

    K1 Chassis

    [

    ]TOC 55

    K1 Chassis

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    CRT Drive Circuit

    [

    ]TOC 56

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    [

    ]TOC 57

    IC201 PIN 20

    (Green Raster Inp. SB: 0) IC201 PIN 20(Green Raster Inp. GG: 0)

    IC201 PIN 20

    (Green Raster Inp. SB: 63)

    IC201 PIN 20

    (Green Raster Inp. GG: 255)

    ACQUISITION MODE: PEAK DETECT

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    [

    ]TOC 58

    POINT 1 POINT 2 POINT 3

    POINT 4 POINT 5

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    [ ]TOC 59

    Q502 C

    (Red Raster Inp. RC: 0)

    Q502 C

    (Green Raster Inp. GG: 0)

    Q502 C

    (Red Raster Inp. RC: 255)

    Q502 C

    (Green Raster Inp. GG: 255)

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    [ ]TOC 60

    4. Alignment and Adjustments4-1 Service Mode Adjustments

    4-1-1 Service Mode MenusSince there are no VCRs in the K1 chassis, all adjustments

    after parts replacement must be done in the Service Mode.

    Service Mode adjustments are necessary when either the EEP-

    ROM (IC902) or the CRT is replaced.

    4-1-2 Entering the Service Mode

    Press the following transmitter keys while in Stand-by mode:

    MUTE > 1 > 8 > 2 > POWER

    "Factory Mode Menu" is displayed.

    Enter Service Mode using the Volume +, keys.

    Service Mode Menu:

    Select a mode to be adjusted, using the channel down key.

    Example: VCO.

    Change the data with the Volume +, keys.

    CONTINUED

    VCO 71

    Age XX GG XXX

    VCO XX BG XXX

    SCT XX SB XX

    SCR XX VA XX

    STT XX VS XX

    RC XXX HS XX

    GC XXX SS XX

    BC XXX SVC MUTE

    Age XX GG XXX

    VCO XX BG XXX

    SCT XX SB XXSCR XX VA XX

    STT XX VS XX

    RC XXX HS XX

    GC XXX SS XX

    BC XXX SVC MUTE

    Adjustment

    Test Pattern

    Set Option Byte

    Factory Reset

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    Return to the Service mode by pressing MENU

    Return to the Factory mode via the MENU key.

    Press POWER to enter the Stand-by mode.

    Adjustment

    Test Pattern

    Set Option Byte

    Factory Reset

    Age XX GG XXX

    VCO XX BG XXX

    SCT XX SB XXSCR XX VA XX

    STT XX VS XX

    RC XXX HS XX

    GC XXX SS XX

    BC XXX SVC MUTE

    [ ]TOC 61

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    [ ]TOC 62

    4-1-3 Adjustment in Option Mode

    This adjustment is necessary whenever the EEPROM is

    replaced. Input data (as marked on the back cabinet).

    Select SET OPTION by pressing the Channel z key twice.

    Press the Volume +, keys to enter the set Option mode.

    Set each bit to "0" or "1" via the Direct Access Keys (0-7) of

    the transmitter. Example: To set Byte ) to 2, press the Direct

    Access Key "1". See below:

    Press MENU to go back to the factory mode.

    Select RESET with the the Channel z key.

    Press volume + key.

    POWER

    OFF

    Adjustment

    Test Pattern

    Set Option Byte

    Factory Reset

    Adjustment

    Test Pattern

    Set Option ByteFactory Reset

    76543210

    BYTE 0 0000001 0

    BYTE 0

    76543210

    BYTE 0 0000000 0

    BYTE 0

    Adjustment

    Test PatternSet Option Byte

    Factory Reset

    Adjustment

    Test Pattern

    Set Option Byte

    Factory Reset

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    [ ]TOC 63

    4-1-4 Service Mode Adjustments

    1. The Pattern Adjustment is done only in the factory. Do

    not attempt to readjust it.

    2. Refer to 4-2 for other adjustments

    3 Set OPTION data (as marked on the back-cabinet

    label).

    4-1-5 Service Mode Adjustment Ratings

    Initialized

    MICOMNo. Item Function Range data

    1 AGC RF AGC Adjustment 0-63 43

    2 VCO PIF VCO Adjustment 0-127 63

    3 SCT Sub-contrast Adjustment 0-63 39

    4 SCR Sub-color Adjustment 0-27 4

    5 STT Sub-tint Adjustment 0-27 19

    6 RC Red-cut off Adjustment 0-255 0

    7 GC Green-cut off Adjustment 0-255 08 BC Blue-cut off Adjustment 0-255 0

    9 SVC Input a Horiz. line pattern

    10 GG Green gain Adjustment 0-255 90

    11 BG Blue gain Adjustment 0-255 140

    12 SC Sub-brightness Adjustment 0-63 16

    13 VA Vertical Phase Size Adjustment 0-63 25

    14 VS Vertical Center Adjustment 0 0

    15 HS Horizontal Phase Adjustment 0-31 1516 SS Sub-sharpness Adjustment 0-31 25

    AdjustmentTest Pattern

    Set Option Byte

    Factory Reset

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    [ ]TOC 64

    4-2 Alignment and Adjustment4-2-1 General Alignment Instruction

    1. Usually, a color TV needs only slight touch-up adjust-

    ment upon installation. Check the basic characteristics

    such as picture height, focus and a horizontal and verti-

    cal sync.

    2. Observe the picture and check for good black and white

    details. There should be no objectionable color shading:

    If color shading is present, demagnetize the receiver. If

    color shading persists, perform purity and convergence

    adjustments described below.3. To protect against shock hazard, use an isolation trans-

    former.

    4-2-2 Power Supply Check

    Check the following:

    A:Power plug is connected; "Stand-by" mode

    B:Power On when "Power ON" button is pressed

    C: power On by FBT. Each supply is marked on its lead-inwire.

    4-2-3 Focus Adjustment

    Adjust the focus control on the FBT for well defined scanning

    lines.

    4-2-4 Fail Safe Circuit Check (FS)

    1. The failsafe check must be the final step in servicing.

    2. Turn the power switch ON and adjust customer controlsfor normal operation.

    3. Temporarily short pin X to pin R on the main board

    (RX05, RX04) with a jumper wire. Raster will disap-

    pear.

    4. The TV must remain in this state even after removing

    the jumper wire. This show that the failsafe circuit is

    working properly.

    5. To recover picture and sound, temporarily turn off theTV and allow the failsafe circuit more than 30 seconds

    to reset. Then switch power ON to produce normal pic-

    ture and sound.

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    [ ]TOC 65

    4-2-5 IC902 Replacement

    1. When IC902 is replaced, all values are reset to

    "Initialized MICOM Data" and readjustment is neces-sary.

    2. Press POWER button 10 seconds after plug-in.

    3. To enter the service mode, refer to 4-1 (Service Mode

    Adjustment).

    4-2-6 PIF VCO Adjustment

    1. Use a Pattern Generator or an off-air signal.2. Open pin 11 of micom (IC901) or one side of lead pin

    for R237.

    3. Adjust VCO in the service mode to set IC101 Pin 44

    (AFT) to 2.5V +/ 0.4 V.

    4-2-7 RF-AGC Adjustment

    1. Input a PHILLIPS pattern (CH40)2. Set the input signal to 60dB.

    3. Enter into the AGC in the service mode.

    4. Adjust AGC until color bar noise disappears.

    4-2-8 Sub-Contrast Adjustment

    1. Input a gray scale pattern. Use a pattern generator

    (PM5518).2. Short D208 to switch off the ABL feed-back.

    3. Check CN201 R-OUT with an oscilloscope.

    4. Set RC, BC, GC data to 0 in the Service Mode.

    5 Adjust SCT to 2.40 +/ 0.1Vp-p.

    6. Remove the short across D208 and restore ABL.

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    4-2-9 Sub-Tint Adjustment

    1. Input a rainbow pattern.

    2. Check CN201 B-OUT with an oscilloscope.3. Adjust STT in the service mode until the 6th peak is the

    highest and the 5th and 7th peaks have equal heights.

    4-2-10 Sub-Color Adjustment

    1. Do sub-color adjustments after the Sub-Contrast and

    Sub-Tint adjustments.2. D208 should still be shorted. The ABL should still be

    switched OFF.

    3. Input a color barpattern. Use a pattern generator

    (PM5518).

    4. Check CN201 R-OUT (use and oscilloscope).

    5. Ensure that the RC, GC, and BC data are 0, BG are 140

    and GG should be 90.

    6. Adjust SCR to 2.4 +/ 0.1Vp-p (black and red levels).7. Remove the short across D208 and restore ABL.

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    4-2-11 White Balance Adjustment

    (a) Low-light adjustments

    1. Input either a lion head or "pure white" color pattern.

    2. Operate the receiver for 30 minutes.3. Check the data in the service mode:

    RC, GC, BC are 0 and SB is 16;

    Steps BG are 90 and GG are 140.

    4. Enter the horizontal line mode by pressing the MUTE

    key.

    5. Adjust the screen VR on the FBT until a dim colored

    line (red, green or blue) appears on the screen.

    6. After pressing the MUTE key, go to RC, BC, or GCwith channel z, y keys. After putting a dim coloredline (red, green or blue) in the horizontal line with the

    MUTE key, adjust color with volumez, y keys.

    (b) High-light adjustments

    1. Input a high-light pattern.

    2. Adjust GG, BG in the Service Mode.

    3. Recheck in low light.

    4-2-12 Sub-Brightness Adjustment

    1. Input a Toshiba pattern.

    2. Warm up the receiver for 10 minutes.3. Enter the SErvice Mode and set SB to the point where

    the 5th point is brighter in the gray scale.

    4-2-13 Vertical Size Adjustment

    1. Input a lion head pattern.

    2. After the vertical center adjustment, enter into the ser-

    vice mode.

    3. Adjust VA so that the each top and bottom of the screen

    is 4.0. If the top and bottom values are different, adjust

    VA so that the sum of the two values is 8.0.

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    4-2-14 Horizontal Size Adjustment

    1. Receive a lion head pattern.

    2. Enter into the service mode.3. Adjust HS to symmetrize right and left.

    4-2-15 When CRT is Replaced

    Do the following adjustments after the basic purity and con-

    vergence adjustments.

    1. White balance2. Sub-brightness

    3. Vertical Size

    4. Horizontal Size

    5. Fail safe (should be the final step).