Pad Cratering
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1 SMTA Pad Cratering Webtorial Cheryl Tulkoff [email protected] SMTA Pad Cratering Webtorial April 19, 2012
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Transcript of Pad Cratering
1
SMTA Pad Cratering Webtorial
Cheryl Tulkoff
SMTA Pad Cratering Webtorial
April 19, 2012
2
Pad Cratering Course Abstract
o Pad cratering is defined as cracking which initiates within the
laminate during a dynamic mechanical event such as In Circuit
Testing (ICT), board depanelization, connector insertion, and
other shock and vibration inducing activities.
o During this webtorial, you'll learn about the key drivers,
measurement and detection protocols, and preventive tactics for
this serious but prevalent failure. Pad cratering was first
recognized in BGA packages but newer leadless, bottom
termination components are also vulnerable.
3
Biography
o Cheryl Tulkoff has over 22 years of experience in electronics manufacturing with an emphasis on
failure analysis and reliability. She has worked throughout the electronics manufacturing life cycle
beginning with semiconductor fabrication processes, into printed circuit board fabrication and
assembly, through functional and reliability testing, and culminating in the analysis and evaluation of
field returns. She has also managed no clean and RoHS-compliant conversion programs and has
developed and managed comprehensive reliability programs.
o Cheryl earned her Bachelor of Mechanical Engineering degree from Georgia Tech. She is a published
author, experienced public speaker and trainer and a Senior member of both ASQ and IEEE. She
holds leadership positions in the IEEE Central Texas Chapter, IEEE WIE (Women In Engineering), and
IEEE ASTR (Accelerated Stress Testing and Reliability) sections. She chaired the annual IEEE ASTR
workshop for four years and is also an ASQ Certified Reliability Engineer.
o She has a strong passion for pre-college STEM (Science, Technology, Engineering, and Math) outreach
and volunteers with several organizations that specialize in encouraging pre-college students to pursue
careers in these fields.
4
Cheryl’s Background
o 22 years in Electronics
o IBM, Cypress Semiconductor, National Instruments
o SRAM and PLD Fab (silicon level) Printed Circuit Board Fabrication, Assembly, Test, Failure Analysis, Reliability Testing and Management
o ISO audit trained, ASQ CRE, Senior ASQ & IEEE Member, SMTA, iMAPS
o Random facts:
o Rambling Wreck from Georgia Tech
o 14 year old son David, Husband Mike, Chocolate Lab Buddy
o Marathoner & Ultra Runner
o Ran Boston 2009 in 3:15
o Ran 100 miles in 24:52 on 2/4-2/5, 2012
o Triathlete – Sprint, Olympic, and Half. Ironman finisher in CDA, Idaho in June ‘10
5
Webtorial Outline
MODULE 1: INTRODUCTION
o Pad Cratering Defined
o Pad Cratering History
o Pad Cratering Drivers
o Is Pad Cratering a Pb-Free Issue?
o At Risk components
MODULE 2: Testing Methodologies
o Overview of IPC Industry Test Standards
o Alternative Test Methods
MODULE 3: Detection Methods
o ICT & Functional Test
o Electrical Characterization
o Alternative Test Methods o Acoustic Microscopy
MODULE 4: Failure Analysis Techniques
o Failure Analysis Overview
o Electrical Characterization
o Cross-Sectioning
o Dye-N-Pry
o X-ray
MODULE 5: Mitigation Techniques
o Corner Glue
o Component Practices
o Pad Design & Layout
o ICT Fixture Evaluation
o Assembly Process Evaluation
o Process Specifications
o More compliant solder
o New acceptance criteria for laminate materials
o Require reporting of fracture toughness and
elastic modulus
MODULE 6: Prevention Methods & Future
Work
o Zeta Cap
6
Module 1: Introduction
Pad Cratering Defined
7 7 7
Strain & Flexure: Pad Cratering
o Cracking initiating within the laminate during a dynamic
mechanical event
o In circuit testing (ICT), board depanelization, connector insertion,
shock and vibration, etc.
G. Shade, Intel (2006)
8
Laminate Cracking Leads to Trace Fracture
Bending
Force
Functional failure
will occur
Trace routed externally
9 9 9
Pad Cratering
o Drivers o Finer pitch components
o More brittle laminates
o Stiffer solders (SAC vs. SnPb)
o Presence of a large heat sink
o Location
o PCB thickness
o Component size & rigidity
o Temperatures & cooling rates
o Difficult to detect using standard procedures o X-ray, dye-n-pry, ball shear, and
ball pull
Intel (2006)
10 10
Is Pad Cratering a Pb-Free Issue? No, but…
Paste Solder BallAverage Fracture
Load (N)Std Dev (N)
SnPb SnPb 692 93
SnPb 656 102
Sn4.0Ag0.5Cu 935 190Sn4.0Ag0.5Cu
35x35mm, 388 I/O BGA; 0.76 mm/min
Roubaud, HP
APEX 2001
11
Pad cratering has been around for a while……
12
Module 2:Testing
Methodologies
Industry Standards
Alternative Testing Methodologies
13
o Documents 3 test methods
o Pin Pull
o Ball pull
o Ball shear
o Each test has pros /cons
o No pass or fail criteria
o User must define what is
acceptable based on
design and reliability
requirements
IPC-9708 Pad Cratering Test Methods Standard
14
o Many ways in which a BGA failure can manifest itself
o Weakest link in the system fails first
BGA Mechanical Loading Failure Modes
15
o Choice of pad geometry affects failure rate & location
o Each has advantages & disadvantage
IPC 9708 – SMD versus NSMD Structures Defined
17
o Good for any pad geometry – no balls required
o Most sensitive to board material and design variables
IPC 9708 Pin Pull Test
o Requires
pins to be
soldered to
pads
18
IPC 9708 Ball Pull Test
o Quick test after BGA ball attach
o No expensive pins required
o Almost as sensitive as pin pull
o BGAs only
o Highly dependent on
solder ball so process
control is critical
19
IPC 9708 Ball Shear Test
o Quick test after BGA
ball attach
o Less control needed
than ball pull test
o BGAs only
o Least sensitive to
design and material
variables
20
o Coupon-based testing
o Allows direct comparison between design, materials and
process changes
o Pin pull & ball pull characterize tensile loading
o Ball shear characterizes shear loading
o Best practice is to use at least 2 of the 3 tests so that both
tensile & shear are covered
Testing Practice Recommendations
21
IPC 9708 Failure
Modes Defined
22
Cisco’s Summary of Impact of Variables on Test Results
23
Universal Instruments Area Consortium Test Method Comparison Results
24
Universal Instruments Test Method Comparison Results
25
o Details how to perform
strain gage tests
o Test & equipment required
o Measurement & reporting
for both strain & strain
rate
o SMT devices excluding
discretes covered
o Measure all BGA devices
with a package body size
=/> than 27 mm x 27 mm
o Measure 3 largest
otherwise
IPC-9704 – Strain Gage Testing
Strain induced failures include ball cracking, trace damage, pad lifting and substrate damage.
26
Rosette Strain Gages
o Measures strain on several axes at the same time
o Pre-Wired with either o Two 3-ft. (1 m) Leads or
o Three 9-ft. (3 m) Leads
o For Determining the Magnitude and Angle of Unknown Stress
o Strain Gages for Static and Dynamic Applications o Broad Temperature Range
o Encapsulated for Added Durability
o Clear Alignment Marks
o http://www.omega.com/ppt/pptsc.asp?ref=Rosettes_Prewired_Strain_KFG&nav=
27
o Grid strains e1 and e3 in should be oriented parallel to the edges of the package.
o Grid strain e2 ishould be oriented diagonally away from package with respect to the edges of the package.
o Consistent and precise placement of gages is critical to correlation of data between test location and samples.
Strain Gage Placement
28
IPC 9704
o No pass / fails limits
o 3 strain limit approaches
o Component supplier
provided
o Customer specified
o Rate limited
o Maximum allowable
strain versus rate
and PCB thickness
o Not strict guidance
29
IPC 9702
o Used to characterize fracture strength of board level interconnects
o Failure modes from this test are not easily differentiated
o High speed test
o Short duration
o Failures in quick succession
4 Point Bent Test
30
Module 3: Detection Methods
31
o Limited visual inspection options
o Will cover more in failure analysis techniques
o Electrical Characterization
o Critical for both detection & failure analysis
o A known good or reference component is often required for
comparison
o Functional and in circuit testing (ICT)
o Acoustic Microscopy
o Highly Accelerated Life Testing (HALT)
o Design & production phases
Detection Methods
32 32
Electrical Characterization: PCB Assembly Level o Narrowing scope is critical to identifying the issue
o A known good or reference component is often required.
o Functional testing
o Most valuable, if product is experiencing ‘partial’, permanent failure
o JTAG (joint task action group) boundary scan
o Allows for testing ICs and their interconnections using four I/O pins (clock, input data, output data, and state machine mode control)
o Allows for relatively accurate identification of failure site, but rarely performed on failed units (primarily replacement for In Circuit Test-ICT)
o Oscilloscope
o Measures voltage fluctuations as a function of time (passive)
o Useful in probing operational circuitry
o Digital capture provides better documentation capability
o Available stand alone or PC-based
o Isolation of attached components
o Attempt to perform as much electrical characterization without component removal
o Consider trace isolation
o Environmental stresses
o Approach similar to bare board
33
Dremel Tool – Induce Vibrations
o A Dremel tool can be
used to induce local
vibration during
debugging
o Can “force” intermittent
failures out of hiding at
benchtop debug
o http://www.dremel.com
34
o In Circuit Testing (ICT) is performed using vacuum and probe force
o Can “compress” the components & laminates into making contact
o High rate of escapes from this process
o Depends on test coverage and access
o Best at capturing complete fracture – small cracks not found
In Circuit Test
34
Image Courtesy of Rematek
35
o CalPoly Study showing failure of electrical testing to capture all defects
Pad Cratering & Electrical Test Detection
Board Level Failure Analysis of Chip Scale Package Drop Test
Assemblies, 2008 International Microelectronics And Packaging
Society.
36
o Majority of failure occur at corner of packages – locations
of most stress & strain
Electrical Failure Pareto from CalPoly Study
Board Level Failure Analysis of Chip Scale Package Drop Test
Assemblies, 2008 International Microelectronics And Packaging
Society.
37
o Cisco has developed a detection method based on
Acoustic Microscopy referred to as Acoustic Emissions (AE)
o Appears to detect onset earlier and with greater capture
rate than electrical methods
o Modified 4 point bend test
o Full assembly based test
o Intent is to capture partial/small cracks which could
propagate to failure
o Some studies show 20% crack growth during thermal
cycling
Alternative Test Methodology proposed by Cisco
“A New Approach for Early Detection of PCB Pad Cratering Failures,” “COMPREHENSIVE METHODOLOGY TO CHARACTERIZE
AND MITIGATE BGA PAD CRATERING IN PRINTED CIRCUIT BOARDS”,
38
H2O or other
fluids
Transducer
Receive
Method for inspecting internal structures through the application of high frequency
(>20 kHz) sound waves
Requires immersion in water (acoustic signals reflected by air)
Allows for very accurate detection of voids and delaminations
Options
Frequency
Transmission mode
Imaging
38
Acoustic Microscopy Overview
39 39
Acoustic Microscopy: Transducer Frequency
High frequency
Short focus
Low frequency
Long focus
1. Higher resolution
2. Shorter focal lengths
3. Less penetration
(Thinner packages)
1. Lower resolution
2. Longer focal lengths
3. Greater penetration
(Thicker packages)
General rules:
• Ultra High Frequency (200+ MHz) for flip chips and wafers.
• High Frequency (50-75 MHz) for thin plastic packages. (110MHz-UHF) for flip chips.
• Low Frequency (15-30 MHz) for thicker plastic packages.
40 40
Acoustic Microscopy: Transmission Mode
Pulse-Echo: One Transducer
• Uses ultrasound reflected from the sample
• Can determine which interface is delaminated
• Requires scanning from both sides to inspect all
interfaces
• Provides images with high degree of spatial detail
• Peak amplitude, time of flight (TOF), and phase
inversion measurement
Through Transmission: Two Transducers
• Uses ultrasound transmitted through the sample
• One scan reveals delamination at all interfaces
• No way to determine which interface is
delaminated
• Less spatial resolution than pulse-echo
• Commonly used to verify pulse-echo results
Through Transmission
Transmit
&
Receive
Transmit
Receive
Pulse-Echo
41 41
Acoustic Microscopy
o Used when delamination or voiding is suspected
o Electrical shorting within the package (delamination, electro-chemical migration)
o Electrical opens (delamination, wire bond failure)
o Insufficient thermal performance detected (i.e. die attach)
o Some value for ceramic BGAs
o Attenuation due to multiple interfaces prevents imaging of interconnects under PBGAs
42
Example Acoustic Microscopy Equipment
Acoustic Microscopy Equipment – PCBA is immersed in fluid bath,
usually DI water, can be non destructive if no sensitive components
are present.
43
o 10 MHz Data Acq Rate
Cisco Acoustic Emissions (AE) Test Setup
44
Cisco Acoustic Emissions (AE) Test Setup
o HSBGA Test Vehicle
o Low speed and high speed testing performed to look at influence of strain rates along with total strain
45
Cisco Bend Test Parameters
46
Cisco Bend Test Parameters
47
Cisco Acoustic Emissions & Electrical Failures
48
Cisco Acoustic Emission Study Conclusions
o Pad cratering identified at much lower strain levels than
those detected electrically in other studies
o This test method does not require custom daisy chained
test vehicles
o Potentially cheaper method for evaluating joints and
laminates
o Other failure mechanisms could potentially be detectable
o Ceramic cracks
o Thermal cycling, shock, or vibration failures
49
Highly Accelerated Life Testing (HALT)
o A series of environmental stress tests designed to understand the limitations of the design (discover your margins)
o Theory 1: The greater the margin between the limits of the design and the operating environment, the lower the probability of failure if defects are introduced during manufacturing
o Theory 2: Not all field failures are due to wearout (motivation for accelerated life testing). Many failures due to introduction of “energy” into the system from multiple environmental stresses (thermal, vibration, power, humidity, etc.)
o What HALT is not
o It can not be used to determine long-term reliability
o It is not an optimum process to identify defective material (defective design, yes)
50
HALT (cont.)
o Phase One: Step Stress Testing
o Increases the environmental stress (temperature, vibration,
electrical, etc.) until recoverable and non-recoverable failures
occur
o Phase Two: Cyclic and Combinatorial Stress Testing
o Thermal cycling (increasing ramp rates)
o Thermal cycling + vibration
o Etc.
o Requires understanding and analysis
o You can not “pass” HALT
o Actions based upon failure mechanism and cost of fix
51 51
How To Use HALT
o Critical for understanding product limitations
o If you spec to 50C and the product fails at 52C, how confident are you in the robustness considering nominal variations in component performance?
o Benefits
o Identifies potential weak points in design before field release
o Pass/Fail: Three sigma or statistical-demonstration of sufficient margin; electronics must operate from 0C to 50C.
Operational
Specs
Stress
Upper
Oper.
Limit
Upper
Destruct
Limit
Lower
Destruct
Limit
Lower
Oper.
Limit
Storage Specs
52
Step Stress Testing Recommendations
o Perform Voltage Step Stress Test
o Both high and low voltage
o Test to recoverable and permanent failure
o Perform Temperature Step Stress Test
o High and low temperatures with 10 or 15C step
o Dwell only long enough to test functionality
o Pull max. and min. specified voltage at max. and min. specified
temperatures (“paint the corners”)
o Perform for both hot and cold temperatures
o Test to recoverable and permanent failure
o Perform Vibration Step Stress Test
o Starting at 5g and increasing in 5g increments
o Finish at 30 or 40g’s
53
RoHS HALT Failure Analysis Examples
o Cracked Solder Joint:
BGA ball to BGA
substrate
o PCB Laminate Cracks –
BGA, also called “pad
cratering”
54
RoHS HALT Failure Analysis
o Cracked traces to BGA
pads – outer rows
o BGA pads separated
from PCB
55
RoHS HALT Failure Analysis
o Cracks in BGA Laminate
o Laminate Cracks - Repair
56
Trace fracture in HALT Testing
Pb-Free Reliability Failure Example
Fracture occurred
here.
This only occurred on traces leading outward of outermost balls (on daisy chain
board). Design modification made to resolve issue.
57
SMTA Pad Cratering Webtorial
Cheryl Tulkoff
SMTA Pad Cratering Webtorial
April 19, 2012
58
Contact Information
o Questions?
o Contact Cheryl Tulkoff, [email protected],
512-913-8624
o www.dfrsolutions.com
o Connect with me in LinkedIn as well!
59
Webtorial Outline
MODULE 1: INTRODUCTION
o Pad Cratering Defined
o Pad Cratering History
o Pad Cratering Drivers
o Is Pad Cratering a Pb-Free Issue?
o At Risk components
MODULE 2: Testing Methodologies
o Overview of IPC Industry Test Standards
o Alternative Test Methods
MODULE 3: Detection Methods
o ICT & Functional Test
o Electrical Characterization
o Alternative Test Methods o Acoustic Microscopy
MODULE 4: Failure Analysis Techniques
o Failure Analysis Overview
o Electrical Characterization
o Cross-Sectioning
o Dye-N-Pry
o X-ray
MODULE 5: Mitigation Techniques
o Corner Glue
o Component Practices
o Pad Design & Layout
o ICT Fixture Evaluation
o Assembly Process Evaluation
o Process Specifications
o More compliant solder
o New acceptance criteria for laminate materials
o Require reporting of fracture toughness and
elastic modulus
MODULE 6: Prevention Methods & Future
Work
o Zeta Cap
o Sherlock
60
Module 4: Failure Analysis
(FA) Techniques
61
Pad Cratering Failure Analysis
o Pad Cratering is difficult to detect using standard procedures
o Unfortunately many companies are unaware of pad cratering until failure happens
o Recalls have been common and painful!
o Potential warning signs:
o Beware of excessive BGA repair rate
o High percentage of “defective” BGAs
o High rate of “retest to pass” at in circuit test (ICT)
o Monitor retest rate
o In Circuit Testing (ICT) is performed using vacuum and pressure
o Can “compress” the components & laminates into making contact
o X-ray and Dye-n-pry provide a limited look
o New work at Dage with 3D m-CT Inspection Option3D m-CT Inspection Option
o Precision cross-sections are required to confirm
62
General Words of Wisdom on FA
o Before spending time and money on Failure Analysis, consider the following:
o Consider FA “order” carefully. Some actions you take will limit or eliminate the ability to perform follow on tests.
o Understand the limitations and output of the tests you select.
o Use partner labs who can help you select and interpret tests for capabilities you don’t have. Be careful of requesting a specific test. Describe the problem and define the data and output you need first.
o Pursue multiple courses of action. There is rarely one test or one root cause that will solve your problem.
o Don’t put other activities on hold while waiting for FA results. Understand how long it will take to get results
o Consider how you will use the data. How will it help you?
o Information?
o Change course, process, supplier?
o Don’t pursue FA data if it won’t help you or you have no control over the path it might take you down. Some FA is just not worth doing
63 63
Failure Analysis Techniques
Failure analysis always starts with Non-Destructive Evaluation (NDE)
Designed to obtain maximum information with minimal risk of
damaging or destroying physical evidence
Emphasize the use of simple tools first
(Generally) non-destructive techniques:
Visual Inspection
Electrical Characterization
Time Domain Reflectometry
Acoustic Microscopy
X-ray Microscopy
Thermal Imaging (Infra-red camera)
SQUID Microscopy
A known good or reference component is often required.
64 64
Failure Analysis Techniques o Destructive evaluation techniques
o Decapsulation
o Plasma etching
o Cross-sectioning
o Thermal imaging (liquid crystal; SQUID and IR also good after decap)
o SEM/EDX – Scanning Electron Microscope / Energy dispersive X-ray Spectroscopy
o Surface/depth profiling techniques: SIMS-Secondary Ion Mass Spectroscopy, Auger
o OBIC/EBIC
o FIB - Focused Ion Beam
o Mechanical testing: wire pull, wire shear, solder ball shear, die shear
o Other characterization methods
o FTIR- Fourier Transform Infra-Red Spectroscopy
o Ion chromatography
o DSC – Differential Scanning Calorimetry
o DMA/TMA – Thermo-mechanical analysis
65
o Pad Cratering is difficult to detect using standard procedures
o In Circuit Testing (ICT) is performed using vacuum and pressure
o Can “compress” the components & laminates into making contact
o Beware of high component failure rate
o Monitor retest rate
o X-ray and Dye-n-pry provide a limited look
o Precision cross-sections are required
Pad Cratering Failure Analysis
66 66
BGA Visual Inspection
BGA (Ball Grid Array) Perimeter Inspection
Use of optical fiber to inspect solder balls on the perimeter of the package
Most common failure site under BGAs
Magnification: 200x
67 67
Electrical Characterization
Most critical step in the failure analysis process
Can the reported failure mode be replicated? Persistent or intermittent?
Intermittent failures often incorrectly diagnosed as no trouble found (NTF)
Least utilized to its fullest extent
Equipment often shared with production and R&D
Approach dependent upon the product
Component
Bare board
PCB assembly
Sometimes performed in combination with environmental exposure
Characterization over specified temperature range
Characterization over expected temperature range
Humidity environment (re-introduction of moisture)
Not designed to induce damage!
68 68
Electrical Characterization: Component Level Parametric characterization
Comparison of performance to datasheet specifications
Curve tracer
Applies alternating voltage; provides plot of voltage vs. current response
Valuable in characterizing diode, transistor, and resistance behavior
Time domain reflectometry (TDR)
Release and return of electrical signal along a given path
Measurement of phase shift of return signal indicates potential location of electrical open
Other characterization equipment
Inductance/capacitance/resistance (LCR) meter
High resistance meter (leakage current < nA)
Low resistance meter (four wire; < milliohms)
Use of additional environmental stresses
Semiconductor-based devices
Temperature rise or temperature/humidity could trigger elevated leakage current
Passive components
69 69
Electrical Characterization: PCB Assembly Level Functional
Most valuable, if product is experiencing ‘partial’, permanent failure
JTAG (joint task action group) boundary scan
Allows for testing ICs and their interconnections using four I/O pins (clock, input data, output data, and state machine mode control)
Allows for relatively accurate identification of failure site, but rarely performed on failed units (primarily replacement for In Circuit Test-ICT)
Oscilloscope
Measures voltage fluctuations as a function of time (passive)
Useful in probing operational circuitry
Digital capture provides better documentation capability
Available stand alone or PC-based
Isolation of attached components
Attempt to perform as much electrical characterization without component removal
Consider trace isolation (knife, low speed saw)
Environmental stresses
Approach similar to bare board
70
Dye N Pry
o Allows for quick (destructive)
inspection for cracked or
fractured solder joints under
leadless components (BGAs,
BTCs)
o http://www.electroiq.com/inde
x/display/packaging-article-
display/165957/articles/adva
nced-packaging/volume-
12/issue-1/features/solder-
joint-failure-analysis.html
71
Dye N Pry
o Step 1: Apply dye along
the package edge so that
it can flow into defective
solder joints.
o Step 2: Cure the dye
o Step 3: Remove the
component
o Where dye is,
solder/contact was not…
72 72
Cross-Sectioning
o Standard method for destructive subsurface evaluation
o Method:
o Sawing to approximate area of interest
o Potting in epoxy resins to aid polishing
o Polishing medium dependent upon materials: typically diamond, SiC, or
alumina suspensions & embedded polishing cloths
o Coarse to fine (600 grit to 0.05 um) grinding sequence to eliminate
damage from previous step
o Final etch often used for microstructural relief
o Optical/electron microscopy techniques used for inspection thereafter
73
Typical Cross Sectioning Equipment
Inverted Microscope
Polishing Compounds,
Epoxies
Polishing & Grinding Disks Precision Saw
Polishing and
Grinding
Equipment
Specimen
Mounting
74
Nordson Dage X-Ray with 3D m-CT Inspection Option
o Dage m-CT inspection option provides Computerised Tomography (CT) functionality to compliment the 2D X-ray
o Produces the CT models for 3D sample analysis, virtual micro-sectioning and internal dimensional
o measurements for o crack, void and reverse engineering
o Potentially reduce the number
o of time-consuming micro-section analyses that are needed
o Or assist in identifying on where micro-section preparation and investigation
o Non-destructive
75
Module 5: Mitigation
Techniques
76 76 76
Potential Mitigations to Pad Cratering
o Board Redesign o Solder mask defined vs. non-solder mask defined o Pad Geometry o Layout & PCB thickness
o Limitations on board flexure o 750 to 500 microstrain, component and layout dependent o Process Control & Validation
o Corner Glue
o More compliant solder
o SAC305 is relatively rigid, SAC105 and SNC are possible alternatives
o New laminate structures and component techniques
o New acceptance criteria for laminate materials
o Attempting to characterize laminate material using high-speed ball pull and shear testing
o Alternative approach
o Require reporting of fracture toughness and elastic modulus
77
Component Supplier Practices Intel Example
78
o Pad design influences failure
o Smaller pads result in higher stress under a given load
o Solder mask defined pads can provide additional strength
o Increases tolerable strain
o Moves failure location from pad crater to intermetallic
fracture
Pad Geometry
79
BGA CORNER BALL LAYOUT ENHANCEMENT
Connections to conductive
shape areas should have relief
to avoid solder mask defined
pads, allowing better adhesion
from ball to pad
The trace width is enlarged
to the width of the BGA
pad for a length of 1-2
diameters of the BGA pad.
The BGA pads enhanced
by wide traces are in the 3
x 3 corner array. Electrical
consideration may take
priority over trace
widening where
necessary.
Blue – BGA Pad
Green – Trace Routing
Pink – Solder Mask Clearance (2 mils)
Yellow - Via
BGA BALL LAYOUT IN SHAPE
AREA
80
Cisco Recommended Pad Modifications
81
o Optimized results with
“bullet” geometry found
o Largest solderable area
o Best lifetime in drop
o Failure shifted to
intermetallic region
Universal Consortium Pad Geometry Results in Drop Tests
82
o Some key areas of risk
o In Circuit Test
o Mechanical Assembly
o Depanelization
o Connector Insertion
o Heat sink attach
o Module assembly
o Look for ways to assess and minimize flexure and strain
throughout the process
Process Control is Key!
83
Corner Glue
o Excessive shock, vibration, or bending will cause PCB pad
cratering.
o When design rules are not sufficient, corner glue is the second
line of defense to combat this failure mechanism.
o Pre-Reflow
o Post-Reflow
84
Pre-Reflow Adhesive Process
* - For LF reflow use CNB951 adhesive
*
*
85
BGA
Too Little Too Much Correct
Target approximately 50% of BGA substrate height
Corner Glue – Post Reflow Process
To be most effective, length of bead should
be 4-6 solder balls in length.
86
Corner Glue – Mechanical Improvement
Post-Reflow Glue Failure mech
Ref: M. Kochenowski et. al., Improved Shock and Bend with Corner Glue, SMTA, Chicago, 2006.
87
o Review/perform ICT strain evaluation at fixture supplier and in process: 500 us, critical for QFN, CSP, and BGA
o http://www.rematek.com/download_center/board_stress_analysis.pdf
o To reduce the pressures exerted on a PCB, the first and simplest solution is to reduce the probes forces, when this is possible.
o Secondly, the positioning of the fingers/stoppers must be optimized to control the probe forces. But this is often very difficult to achieve. Mechanically, the stoppers must be located exactly under the pressure fingers to avoid the creation of shear points
ICT Strain: Fixture & Process Analysis
87
88
o Fixture revalidation should be periodically performed
o When probes are replaced
o When fixture is altered
o Supports are moved
o Rewiring is done
ICT Strain: Fixture & Process Analysis
88
89
Example of Failure in Test Fixture at 32G, 270ips 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
A X 3 4 4 4 4 4 3 3 XB 3 3 3 4 4 4 3C 3 3 3 4 3D 4 4 4 4E 4 4 4F 4G 4HJKLMNPRTUVW 4Y 4
AA 4AB 4 4 4 4AC 4 4 4 4AD 3 4 4 3 3 3AE 4 4 4 3 3 3AF X 3 4 4 4 4 4 3 X
Brd 001X ICH Dye and Pry fracture indications
90
Laminate Relationship to Cratering
M. A
hm
ad
, e
t a
l., C
isco
, A
pex, 2
00
9.
91
Module 6: Prevention &
Future Work
92
Integral Technology “Zeta Cap”
93
o Copper clad high Tg, CTE Z axis of 19 ppm/deg C. Fully
cured dielectric.
o Used with standard prepregs or Zeta® Bond.
Zeta Cap – What is it?
94
95
96
97
Zeta Cap
98
Zeta Pad Strength Failure Modes
99
o Western Region
o Streamline Circuits
o Gorilla Circuits
o Via Systems – San Jose
o TTM – Santa Ana, Santa Clara
o DDI – Milpitas, Anaheim, Toronto
o Sanmina SCI – Costa Mesa, San Jose
o Hallmark – San Diego
o MEI - Anaheim
o HEI – Tempe, AZ
o Midwest
o Global Innovation – Texas
o Minco – Minneapolis
o Holaday Circuits – Minnetonka
o East
o Endicott Interconnect – New York
o Moog Printed Circuit Boards – Virginia
o Tech Circuits – Connecticut
o Compunetix – Penn
US PCB Shops Familiar with Zeta Cap
100
o With Sherlock Automated
Design Analysis™
Software, by DfR
Solutions, designers can
identify potential bed of
nails damage early in the
layout process, before a
bed of nails tester is ever
designed, allowing for
tradeoff analyses, saving
costly board damage
and redesign.
Sherlock – Automated Design Analysis Tool
101
o Sherlock eliminates potential bed of nails damage by:
o Automatically identifying any and all components on the circuit card that could experience cracking or failure during bed of nails testing.
o Prior to the ICT, the designer can:
o Change test points
o Change pogo pin pressure, or
o Add /move board supports
o Optimize ICT process and reduce the likelihood of solder joint cracking or pad cratering caused by the bed of nails fixture. A
o Sherlock analysis is component-specific, allowing for more precise identification of at-risk areas whether you are testing a large BGA or simple chip resistor.
Sherlock
102
o Pad Cratering is an increasingly common failure mode
o Catastrophic and non-reworkable
o Easy to avoid detection and difficult to diagnose
o Partial cracks riskiest since they escape and expand in the
field
o Multiple paths for mitigation but few for true prevention
o No hard, fast rules for avoidance
o Dependent on design, component, layout, process…
Pad Cratering Conclusions
103
o Maintain awareness in design & manufacturing
o Evaluate each design
o No one size fits all criteria but some “rules of thumb”
o Validate results with destructive cross-sections
o Test & Control are key
o Use multiple testing strategies to maximize success at finding
and preventing failures
Pad Cratering Recommendations
104
o Boundary Scan: A Practical Approach
o http://www.ems007.com/pages/zone.cgi?a=83457
o Impact Performance of Microvia and Buildup Layer Materials and Its Contribution to Drop Test Failures, Dongji Xie*, Jonathan Wang**, Him Yu+, Dennis Lau+ and Dongkai Shangguan* *Flextronics International
o METHODOLOGY TO CHARACTERIZE PAD CRATERING UNDER BGA PADS IN PRINTED CIRCUIT BOARDS, Originally published in the Proceedings of the Pan Pacific Microelectronics Symposium, Kauai, Hawaii, January 22 – 24, 2008.
o COMPREHENSIVE METHODOLOGY TO CHARACTERIZE AND MITIGATE BGA PAD CRATERING IN PRINTED CIRCUIT BOARDS, Originally published in SMTAnews & Journal of Surface Mount Technology, January –March 2009, Vol. 22, Issue 1.
o VALIDATED TEST METHOD TO CHARACTERIZE AND QUANTIFY PAD CRATERING UNDER BGA PADS ON PRINTED CIRCUIT BOARDS Originally published at the IPC/APEX 2009 Conference held in Las Vegas, NV, April 2009.
o Board Level Failure Analysis of Chip Scale Package Drop Test Assemblies, Nicholas Vickers, Kyle Rauen, Andrew Farris, Jianbiao Pan, Cal Poly State University.
o Assessment of PCB Pad Cratering Resistance by Joint Level Testing Brian Roggeman1, Peter Borgesen1Assessment of PCB Pad Cratering Resistance by Joint Level Testing
o Brian Roggeman1, Peter Borgesen1, Jing Li2, Guarav Godbole2, Pushkraj Tumne2, K. Srihari2, Tim Levo3, James Pitarresi3
o 1Unovis-Solutions, Binghamton, NY 13902, Jing Li2, Guarav Godbole2, Pushkraj Tumne2, K. Srihari2, Tim Levo3, James Pitarresi3 1Unovis-Solutions, Binghamton, NY 13902
o MANUFACTURING QUALIFICATION FOR THE LATEST GAMING DEVICE
o WITH Pb-FREE ASSEMBLY PROCESS Ding Wang Chen, Ph.D., Alex Leung, and Alex Chen Celestica China and Celestica Corporate Technology Suzhou, China; Dongguan, China; and Toronto, Canada
References
105
o Pad Cratering Evaluation of PCB Dongji Xie*, Ph.D., Dongkai Shangguan*, Ph.D. and Helmut Kroener**, *FLEXTRONICS, San Jose, CA, ** Multek, Schongau, Germany
o Pad Cratering: Assessing Long Term Reliability Risks, Denis Barbini, Ph.D., AREA Consortium
o A New Approach for Early Detection of PCB Pad Cratering Failures, Anurag Bansal, Gnyaneshwar Ramakrishna and Kuo-Chuan Liu, Cisco Systems, Inc., San Jose, CA
o Validated Test Method to Characterize and Quantify Pad Cratering Under Bga Pads on Printed Circuit Boards, Mudasir Ahmad, Jennifer Burlingame, Cherif Guirguis, Technology and Quality Group, Cisco Systems, Inc.
o COMPREHENSIVE METHODOLOGY TO CHARACTERIZE AND MITIGATE BGA PAD CRATERING IN PRINTED CIRCUIT BOARDS Mudasir Ahmad, Jennifer Burlingame, and Cherif Guirguis, Technology and Quality Group, Cisco Systems, Inc.
o A New Method to Evaluate BGA Pad Cratering in Lead-Free Soldering, Dongji Xie, Ph.D.*, Clavius Chin, Ph.D.**, KarHwee Ang**, Dennis Lau+ and Dongkai Shangguan, Ph.D. *Flextronics International.
o The Application of Spherical Bend Testing to Predict Safe Working Manufacturing Process Strains, John McMahon P.Eng, Brian Gray P.Eng, Celestica.
o Investigation of Pad Cratering in Large Flip-Chip BGA using Acoustic Emission, Anurag Bansal, Cherif Guirguis and Kuo-Chuan Liu, Cisco Systems, Inc.,.
o PAD CRATERING: THE INVISIBLE THREAT TO THE ELECTRONICS INDUSTRY, Presented by Jim Griffin, OEM Sales & Marketing Manage, Integral Technology
o Pad Cratering Test Methods: AComparative Look Brian Roggeman & Wayne Jones, AREA Consortium
o VALIDATED TEST METHOD TO CHARACTERIZE AND QUANTIFY PAD CRATERING UNDER BGA PADS ON
o PRINTED CIRCUIT BOARD, Mudasir Ahmad, Jennifer Burlingame, Cherif Guirguis Component Quality and Technology Group, Cisco Systems, Inc
References
106
Contact Information
o Questions?
o Contact Cheryl Tulkoff, [email protected],
512-913-8624
o www.dfrsolutions.com
o Connect with me in LinkedIn as well!
