Pad Cratering -SMTA€¦ · · 2012-06-12Pad Cratering -SMTA Randy Schueller, Ph.D....
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Transcript of Pad Cratering -SMTA€¦ · · 2012-06-12Pad Cratering -SMTA Randy Schueller, Ph.D....
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Outline
o Pad Cratering Defined
o Testing Methodologies
o Detection Methods
o Failure Analysis Techniques
o Mitigation Techniques
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Pad Cratering Defined
o Cracking initiating within the laminate during a dynamic mechanical event
o In circuit testing (ICT), board depanelization, connector insertion, shock and vibration, etc.
G. Shade, Intel (2006)
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Is Pad Cratering a Pb-Free Issue? No, but…
Roubaud, HP
APEX 2001
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Pad Cratering
o Drivers
o Finer pitch components
o More brittle laminates
o Stiffer solders (SAC vs. SnPb)
o Presence of a large heat sink
o Location
o PCB thickness
o Component size & rigidity
o Temperatures & cooling rates
o Difficult to detect using standard procedures
o X-ray, dye-n-pry, ball shear, and ball pull
Intel (2006)
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Laminate Cracking Leads to Trace Fracture
BendingForce
Functional failurewill occur
Trace routed externally
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Testing Methodologies
Industry StandardsAlternative Testing Methodologies
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o Many ways in which a BGA failure can manifest itself
o Weakest link in the system fails first
BGA Mechanical Loading Failure Modes
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o Documents 3 test methods
o Pin Pull
o Ball pull
o Ball shear
o Each test has pros /cons
o No pass or fail criteria
o User must define what is acceptable based on design and reliability requirements
IPC-9708 Pad Cratering Test Methods Standard
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o Good for any pad geometry – no balls required
o Most sensitive to board material and design variables
IPC 9708 Pin Pull Test
o Requires pins to be soldered to pads
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IPC 9708 Ball Pull Test
o Quick test after BGA ball attach
o No expensive pins required
o Almost as sensitive as pin pull
o BGAs only
o Highly dependent on solder ball so process control is critical
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IPC 9708 Ball Shear Test
o Quick test after BGA ball attach
o Less control needed than ball pull test
o BGAs only
o Least sensitive to design and material variables
o Shear speed will influence results
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IPC 9702-Bend Test
o Used to characterize fracture strength of board level interconnects
o Failure modes from this test are not easily differentiatedo High speed testo Short durationo Failures in quick succession
4 Point Bent Test
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Detection Methods
(Manufacturing)
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Pad Cratering Failure Analysis
o Pad Cratering is difficult to detect using standard procedures
o Unfortunately many companies are unaware of pad cratering until failure happens
o Recalls have been common and painful!
o Potential warning signs:
o Beware of excessive BGA repair rate
o High percentage of “defective” BGAs
o High rate of “retest to pass” at in circuit test (ICT)
o Monitor retest rate
o In Circuit Testing (ICT) is performed using vacuum and pressure
o Can “compress” the components & laminates into making contact
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o Limited visual inspection options
o Will cover more in failure analysis techniques
o Electrical Characterization
o Critical for both detection & failure analysis
o A known good or reference component is often required for comparison
o Functional and in circuit testing (ICT)
o Acoustic Microscopy
o Highly Accelerated Life Testing (HALT)
o Design & production phases
Detection Methods
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o In Circuit Testing (ICT) is performed using vacuum and probe forceo Can “compress” the components & laminates into making contacto High rate of escapes from this processo Depends on test coverage and access
o Best at capturing complete fracture – small cracks not found
In Circuit Test
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Image Courtesy of Rematek
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o Cisco has developed a detection method based on Acoustic Microscopy referred to as Acoustic Emissions (AE)
o Appears to detect onset earlier and with greater capture rate than electrical methods
o Modified 4 point bend test
o Full assembly based test
o Intent is to capture partial/small cracks which could propagate to failure
o Some studies show 20% crack growth during thermal cycling
Alternative Test Methodology proposed by Cisco
“A New Approach for Early Detection of PCB Pad Cratering Failures,” “COMPREHENSIVE METHODOLOGY TO CHARACTERIZE
AND MITIGATE BGA PAD CRATERING IN PRINTED CIRCUIT BOARDS”,
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Cisco Acoustic Emissions (AE) Test Setup
o HSBGA Test Vehicleo Low speed and high speed testing performed to look at
influence of strain rates along with total strain
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Cisco Acoustic Emission Study Conclusions
o Pad cratering identified at much lower strain levels than those detected electrically in other studies
o This test method does not require custom daisy chained test vehicles
o Potentially cheaper method for evaluating joints and laminates
o Other failure mechanisms could potentially be detectable
o Ceramic cracks
o Thermal cycling, shock, or vibration failures
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Highly Accelerated Life Testing (HALT)
o A series of environmental stress tests designed to understand the limitations of the design (discover your margins)o Theory 1: The greater the margin between the limits of the design and
the operating environment, the lower the probability of failure if defects are introduced during manufacturing
o Theory 2: Not all field failures are due to wearout (motivation for accelerated life testing). Many failures due to introduction of “energy” into the system from multiple environmental stresses (thermal, vibration, power, humidity, etc.)
o What HALT is noto It can not be used to determine long-term reliability
o It is not an optimum process to identify defective material (defective design, yes)
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RoHS HALT Failure Analysis Examples
o Cracked Solder Joint: BGA ball to BGA substrate
o PCB Laminate Cracks –BGA, also called “pad cratering”
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RoHS HALT Failure Analysis
o Cracked traces to BGA pads – outer rows
o BGA pads separated from PCB
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Failure Analysis (FA)
Techniques
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Dremel Tool – Induce Vibrations
o A Dremel tool can be used to induce local vibration during debugging
o Can “force” intermittent failures out of hiding at benchtop debug
o http://www.dremel.com
o Cold spray can also be used to reveal failure.
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Failure Analysis Techniques – Non Destructive
� Failure analysis always starts with Non-Destructive Evaluation (NDE)
� Designed to obtain maximum information with minimal risk of damaging or destroying physical evidence
� Emphasize the use of simple tools first
� (Generally) non-destructive techniques:
� Visual Inspection
� Electrical Characterization
� Time Domain Reflectometry
� Acoustic Microscopy
� X-ray Microscopy
� Thermal Imaging (Infra-red camera)
� SQUID Microscopy
� A known good or reference component is often required.
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Failure Analysis Techniques - Destructive
o Destructive evaluation techniqueso Dye and Pry
o Cross-sectioning
o Thermal imaging (liquid crystal; SQUID and IR also good after decap)
o SEM/EDX – Scanning Electron Microscope / Energy dispersive X-ray Spectroscopy
o Surface/depth profiling techniques: SIMS-Secondary Ion Mass Spectroscopy, Auger
o FIB - Focused Ion Beam
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BGA Visual Inspection
� BGA (Ball Grid Array) Perimeter Inspection
� Use of optical fiber to inspect solder balls on the perimeter of the package
� Most common failure site under BGAs
� Magnification: 200x
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Nordson Dage X-Ray with 3D m-CT Inspection Option
o Dage m-CT inspection option provides ComputerisedTomography (CT) functionality to compliment the 2D X-ray
o Produces the CT models for 3D sample analysis, virtual micro-sectioning and internal dimensional
o measurements foro crack, void and reverse engineering
o Potentially reduce the numbero of time-consuming micro-section
analyses that are needed o Or assist in identifying on where
micro-section preparation and investigation
o Non-destructive
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Mitigation Techniques
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Potential Mitigations to Pad Cratering
o Board Redesigno Solder mask defined vs. non-solder mask definedo Pad Geometryo Layout & PCB thickness
o Limitations on board flexureo 750 to 500 microstrain, component and layout
dependento Process Control & Validation
o Corner Glueo More compliant solder
o SAC305 is relatively rigid, SAC105 and SNC are possible alternatives
o New laminate structures
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o Pad design influences failure
o Smaller pads result in higher stress under a given load
o Teardrop shape helps
o Solder mask defined pads can provide additional strength
o Increases tolerable strain
o Moves failure location from pad crater to intermetallic fracture
Pad Geometry
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o Choice of pad geometry affects failure rate & locationo Each has advantages & disadvantageo SMD better in shock and bend – NSMD better in thermal cycle
IPC 9708 – SMD versus NSMD Structures Defined
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Component Supplier Practices Intel Example
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Cisco Recommended Pad Modifications
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o Optimized results with “bullet” geometry found
o Largest solderable area
o Best lifetime in drop
o Failure shifted to intermetallic region
Universal Consortium Pad Geometry Results in Drop Tests
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o Minimize board strain (<500 ustrain with large components).
o Some key areas of risk
o In Circuit Test
o Mechanical Assembly
o Depanelization
o Connector Insertion
o Heat sink attach
o Module assembly (screwing down board)
o Look for ways to assess and minimize flexure and strain throughout the process
Process Control is Key!
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BGA
Too Little Too Much Correct
Target approximately 50% of BGA substrate height
Corner Glue – Post Reflow ProcessTo be most effective, length of bead should
be 4-6 solder balls in length.
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Corner Glue – Mechanical Improvement
Post-Reflow Glue Failure mech
Ref: M. Kochenowski et. al., Improved Shock and Bend with Corner Glue, SMTA, Chicago, 2006.
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o Review/perform ICT strain evaluation at fixture supplier and in process: 500 us, critical for QFN, CSP, and BGA
o http://www.rematek.com/download_center/board_stress_analysis.pdf
o To reduce the pressures exerted on a PCB, the first and simplest solution is to reduce the probes forces, when this is possible.
o Secondly, the positioning of the fingers/stoppers must be optimized to control the probe forces. But this is often very difficult to achieve. Mechanically, the stoppers must be located exactly under the pressure fingers to avoid the creation of shear points
ICT Strain: Fixture & Process Analysis
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o With Sherlock Automated Design Analysis™ Software, by DfR Solutions, designers can identify potential bed of nails damage early in the layout process, before a bed of nails tester is ever designed, allowing for tradeoff analyses, saving costly board damage and redesign.
Sherlock – Automated Design Analysis Tool
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o Sherlock eliminates potential bed of nails damage by:
o Automatically identifying any and all components on the circuit card that could experience cracking or failure during bed of nails testing.
o Prior to the ICT, the designer can:
o Change test points
o Change pogo pin pressure, or
o Add /move board supports
o Optimize ICT process and reduce the likelihood of solder joint cracking or pad cratering caused by the bed of nails fixture. A
o Sherlock analysis is component-specific, allowing for more precise identification of at-risk areas whether you are testing a large BGA or simple chip resistor.
Sherlock
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Laminate Relationship to Cratering
M. Ahm
ad, et al., C
isco, Apex
, 2009.
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o Zeta Cap simply replaces the outerlayer foil in the PCB construction.
o When used as a cap layer (see below) it becomes the interface between the copper pad and the rest of the PCB.
o The more compliant cap will prevent or block fractures and protect copper connections (traces) to the pad.
Zeta Cap
Zeta cap
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o Pad Cratering is an increasingly common failure mode
o Catastrophic and non-reworkable
o Difficult to detect and difficult to diagnose
o Partial cracks riskiest since they escape and expand in the field
o Multiple paths for mitigation but few for true prevention
o No hard, fast rules for avoidance
o Dependent on design, component, layout, process…
Pad Cratering Conclusions
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o Maintain awareness in design & manufacturing
o Evaluate each design
o No one size fits all criteria but some “rules of thumb”
o Validate results with destructive cross-sections
o Test & Control are key
o Use multiple testing strategies to maximize success at finding and preventing failures
Pad Cratering Recommendations
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o Boundary Scan: A Practical Approacho http://www.ems007.com/pages/zone.cgi?a=83457
o Impact Performance of Microvia and Buildup Layer Materials and Its Contribution to Drop Test Failures, Dongji Xie*, Jonathan Wang**, Him Yu+, Dennis Lau+ and Dongkai Shangguan* *Flextronics International
o METHODOLOGY TO CHARACTERIZE PAD CRATERING UNDER BGA PADS IN PRINTED CIRCUIT BOARDS, Originally published in the Proceedings of the Pan Pacific Microelectronics Symposium, Kauai, Hawaii, January 22 – 24, 2008.
o COMPREHENSIVE METHODOLOGY TO CHARACTERIZE AND MITIGATE BGA PAD CRATERING IN PRINTED CIRCUIT BOARDS, Originally published in SMTAnews & Journal of Surface Mount Technology, January –March 2009, Vol. 22, Issue 1.
o VALIDATED TEST METHOD TO CHARACTERIZE AND QUANTIFY PAD CRATERING UNDER BGA PADS ON PRINTED CIRCUIT BOARDS Originally published at the IPC/APEX 2009 Conference held in Las Vegas, NV, April 2009.
o Board Level Failure Analysis of Chip Scale Package Drop Test Assemblies, Nicholas Vickers, Kyle Rauen, Andrew Farris, Jianbiao Pan, Cal Poly State University.
o Assessment of PCB Pad Cratering Resistance by Joint Level Testing Brian Roggeman1, Peter Borgesen1Assessment of PCB Pad Cratering Resistance by Joint Level Testing
o Brian Roggeman1, Peter Borgesen1, Jing Li2, Guarav Godbole2, Pushkraj Tumne2, K. Srihari2, Tim Levo3, James Pitarresi3
o 1Unovis-Solutions, Binghamton, NY 13902, Jing Li2, Guarav Godbole2, Pushkraj Tumne2, K. Srihari2, Tim Levo3, James Pitarresi3 1Unovis-Solutions, Binghamton, NY 13902
o MANUFACTURING QUALIFICATION FOR THE LATEST GAMING DEVICEo WITH Pb-FREE ASSEMBLY PROCESS Ding Wang Chen, Ph.D., Alex Leung, and Alex Chen Celestica China
and Celestica Corporate Technology Suzhou, China; Dongguan, China; and Toronto, Canada
References
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o Pad Cratering Evaluation of PCB Dongji Xie*, Ph.D., Dongkai Shangguan*, Ph.D. and Helmut Kroener**, *FLEXTRONICS, San Jose, CA, ** Multek, Schongau, Germany
o Pad Cratering: Assessing Long Term Reliability Risks, Denis Barbini, Ph.D., AREA Consortiumo A New Approach for Early Detection of PCB Pad Cratering Failures, Anurag Bansal, Gnyaneshwar
Ramakrishna and Kuo-Chuan Liu, Cisco Systems, Inc., San Jose, CAo Validated Test Method to Characterize and Quantify Pad Cratering Under Bga Pads on Printed Circuit
Boards, Mudasir Ahmad, Jennifer Burlingame, Cherif Guirguis, Technology and Quality Group, Cisco Systems, Inc.
o COMPREHENSIVE METHODOLOGY TO CHARACTERIZE AND MITIGATE BGA PAD CRATERING IN PRINTED CIRCUIT BOARDS Mudasir Ahmad, Jennifer Burlingame, and Cherif Guirguis, Technology and Quality Group, Cisco Systems, Inc.
o A New Method to Evaluate BGA Pad Cratering in Lead-Free Soldering, Dongji Xie, Ph.D.*, Clavius Chin, Ph.D.**, KarHwee Ang**, Dennis Lau+ and Dongkai Shangguan, Ph.D. *Flextronics International.
o The Application of Spherical Bend Testing to Predict Safe Working Manufacturing Process Strains, John McMahon P.Eng, Brian Gray P.Eng, Celestica.
o Investigation of Pad Cratering in Large Flip-Chip BGA using Acoustic Emission, Anurag Bansal, CherifGuirguis and Kuo-Chuan Liu, Cisco Systems, Inc.,.
o PAD CRATERING: THE INVISIBLE THREAT TO THE ELECTRONICS INDUSTRY, Presented by Jim Griffin, OEM Sales & Marketing Manage, Integral Technology
o Pad Cratering Test Methods: AComparative Look Brian Roggeman & Wayne Jones, AREA Consortiumo VALIDATED TEST METHOD TO CHARACTERIZE AND QUANTIFY PAD CRATERING UNDER BGA PADS ONo PRINTED CIRCUIT BOARD, Mudasir Ahmad, Jennifer Burlingame, Cherif Guirguis Component Quality and
Technology Group, Cisco Systems, Inc
References
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Contact Information
o Thank you. Any Questions?Contacts
o Cheryl Tulkoff, [email protected], 512-913-8624
o Randy Schueller, [email protected]
o 512-658-6318
o www.dfrsolutions.com
o Connect with us on LinkedIn as well!
