OW331_47-SIS User Guide

Safety Instrumented System (SIS) User Guide for Ovation 3.3.1 OW331_47

Version 1 July 2010

Copyright Notice

Since the equipment explained in this document has a variety of uses, the user and those responsible for applying this equipment must satisfy themselves as to the acceptability of each application and use of the equipment. Under no circumstances will Emerson Process Management be responsible or liable for any damage, including indirect or consequential losses resulting from the use, misuse, or application of this equipment.

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Copyright © Emerson Process Management Power & Water Solutions, Inc. All rights reserved.

Emerson Process Management Power & Water Solutions

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E-Mail: [email protected] Website: https://www.ovationusers.com

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Contents

1 Introduction to Ovation Safety Instrumented System (SIS) 1 1.1 What is a Safety Instrumented System?............................................................................. 1 1.2 Functions of Ovation SIS ....................................................................................................2 1.3 Safety Instrumented System terminology ........................................................................... 2

2 Planning your Safety Instrumented System 5 2.1 SIS issues to consider......................................................................................................... 5

2.1.1 Safety Instrumented Functions (SIFs)............................................................... 6 2.1.2 Safety Integrity Levels (SILs) ............................................................................ 6

2.2 Limitations for SIS ............................................................................................................... 7 2.3 SIS environmental specifications ........................................................................................7 2.4 SIS network design examples.............................................................................................8

2.4.1 Physical network design example ..................................................................... 8 2.4.2 Logical network design example ....................................................................... 9

2.5 Planning your hardware installation .................................................................................... 9 2.5.1 Installation tools...............................................................................................10

3 Hardware for Ovation SIS 11 3.1 Hardware components of Ovation SIS..............................................................................11 3.2 SIS carriers........................................................................................................................ 14

3.2.1 SIS Carrier part numbers ................................................................................ 14 3.2.2 Vertical carriers ...............................................................................................15 3.2.3 To install the 1-wide carrier (dual-left/right extender cables) .......................... 17 3.2.4 To install the 2-wide power/SIS Data Server carriers ..................................... 18 3.2.5 To install the 4-wide Vertical (Power/SIS Data Server) carrier ....................... 20 3.2.6 To install the 8-wide I/O interface carrier (can hold up to four simplex Logic Solvers) 20 3.2.7 To install the 8-wide Vertical (left/right side) carrier (can hold up to four simplex Logic Solvers).................................................................................................................... 21

3.3 SLS terminal blocks ..........................................................................................................23 3.3.1 SIS terminal block part numbers ..................................................................... 23 3.3.2 To install terminal blocks ................................................................................. 23

3.4 SIS Data Server ................................................................................................................24 3.4.1 SIS Data Server part number.......................................................................... 24 3.4.2 To install a simplex SIS Data Server...............................................................24 3.4.3 To power up a simplex SIS Data Server ......................................................... 25 3.4.4 To power up a duplex SIS Data Server........................................................... 26 3.4.5 To remove a redundant SIS Data Server........................................................ 26 3.4.6 SIS Data Server LEDs..................................................................................... 27

3.5 SIS Logic Solvers..............................................................................................................28 3.5.1 SIS Logic Solver part number .........................................................................29 3.5.2 Logic Solver specifications .............................................................................. 29

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3.5.3 To install Logic Solvers ................................................................................... 30 3.5.4 Logic Solver redundancy.................................................................................31 3.5.5 SIS Logic Solver LEDs ....................................................................................32

3.6 SIS I/O channels ...............................................................................................................33 3.6.1 Analog Input and HART Analog Input channel specifications and wiring ....... 33 3.6.2 HART two-state output channel specifications and wiring .............................. 34 3.6.3 Digital Input channel specifications and wiring................................................ 35 3.6.4 Digital Output channel specifications and wiring............................................. 37

3.7 SIS Net Repeater ..............................................................................................................38 3.7.1 SIS Net Repeater part number........................................................................38 3.7.2 To install SIS Net Repeaters for horizontal mounting ..................................... 39 3.7.3 SIS Net Distance Extender..............................................................................39 3.7.4 SIS Net Repeater LEDs .................................................................................. 40

3.8 Fiber-optic cable\ring.........................................................................................................41 3.9 Carrier extender cables..................................................................................................... 41

3.9.1 Carrier extender cable part numbers ..............................................................41 3.9.2 To install carrier extender cables .................................................................... 42 3.9.3 To terminate the local bus ...............................................................................43

3.10 Power Supply .................................................................................................................... 44 3.10.1 Power supply part number .............................................................................. 45 3.10.2 Power supply specifications ............................................................................ 45 3.10.3 To install power supplies .................................................................................45 3.10.4 To provide power to the Logic Solvers............................................................46 3.10.5 To provide power to the SISNet Repeaters .................................................... 46 3.10.6 To provide power to SISNet Distance extenders ............................................ 47 3.10.7 SIS Power Supply LEDs.................................................................................. 48

3.11 SIS LAN switches and routers ..........................................................................................49 3.12 Ovation SIS accessories ...................................................................................................49

3.12.1 SIS Relay module............................................................................................ 50 3.12.2 Voltage Monitor module ..................................................................................54 3.12.3 SIS Current Limiter module .............................................................................56 3.12.4 Auxiliary Relay DTA-Inverting module ............................................................59 3.12.5 Auxiliary Relay ETA-Direct module .................................................................63 3.12.6 Auxiliary Relay Diode module ......................................................................... 64

4 Software for Ovation SIS 67 4.1 Software components of Ovation SIS ...............................................................................67

5 SIS Algorithms 69 5.1 Algorithm types ................................................................................................................. 70 5.2 Using algorithm reference pages ......................................................................................70

5.2.1 Algorithm functional symbols........................................................................... 71 5.3 Ovation SIS Logic Solver algorithm table .........................................................................72 5.4 LSAI................................................................................................................................... 75 5.5 LSALM............................................................................................................................... 78 5.6 LSAND .............................................................................................................................. 80 5.7 LSAVTR ............................................................................................................................ 82 5.8 LSBDE............................................................................................................................. 100

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5.9 LSBFI .............................................................................................................................. 102 5.10 LSBFO............................................................................................................................. 105 5.11 LSCALC .......................................................................................................................... 107 5.12 LSCEM............................................................................................................................ 113 5.13 LSCMP............................................................................................................................ 145 5.14 LSDI ................................................................................................................................ 147 5.15 LSDO............................................................................................................................... 150 5.16 LSDVC ............................................................................................................................ 157 5.17 LSDVTR .......................................................................................................................... 169 5.18 LSLIM.............................................................................................................................. 185 5.19 LSMID ............................................................................................................................. 188 5.20 LSNAND.......................................................................................................................... 191 5.21 LSNDE ............................................................................................................................ 193 5.22 LSNOR............................................................................................................................ 195 5.23 LSNOT ............................................................................................................................ 197 5.24 LSOFFD .......................................................................................................................... 198 5.25 LSOND............................................................................................................................ 200 5.26 LSOR............................................................................................................................... 202 5.27 LSPDE............................................................................................................................. 204 5.28 LSRET............................................................................................................................. 206 5.29 LSRS............................................................................................................................... 208 5.30 LSSEQ ............................................................................................................................ 210 5.31 LSSR............................................................................................................................... 215 5.32 LSSTD............................................................................................................................. 217 5.33 LSTP ............................................................................................................................... 226 5.34 LSXNOR.......................................................................................................................... 228 5.35 LSXOR ............................................................................................................................ 229 5.36 SIS connector algorithm table.........................................................................................230 5.37 SECPARAM ....................................................................................................................231 5.38 SECPARAMREF.............................................................................................................232 5.39 GSECPARAMREF ..........................................................................................................233 5.40 NONSECPARAM ............................................................................................................234 5.41 Connecting SIS sheets....................................................................................................235 5.42 Secured algorithm parameters........................................................................................236 5.43 Nonsecured algorithm parameters..................................................................................236

6 Adding and configuring SIS components in the Developer Studio 237 6.1 Overview of adding and configuring SIS components ....................................................237 6.2 To add an SIS Network to the Ovation system...............................................................238 6.3 To add an SIS Data Server to the Ovation System ........................................................241 6.4 Initial installation SIS upgrade.........................................................................................244 6.5 To add an SIS network switch to the Ovation System....................................................244 6.6 To create SIS network switch configuration files ............................................................246

6.6.1 To initialize SIS network switches .................................................................248

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6.7 To add an SIS I/O device number...................................................................................250 6.8 To add an SIS I/O device to the Ovation System ...........................................................250

6.8.1 To associate a Node point with an SIS I/O device........................................253 6.9 To assign an SIS I/O Data Server to an SIS I/O Device.................................................255

6.9.1 Viewing SIS points in the Developer Studio hierarchy.................................. 258 6.9.2 Removing Ovation SIS points from SIS control sheets.................................259

6.10 To configure SIS LAN network switches......................................................................... 260 6.11 To add and configure SIS Logic Solvers in the Ovation System ....................................263

6.11.1 Configuring the Logic Solver Config tab........................................................266 6.11.2 Configuring the Logic Solver General tab ..................................................... 267 6.11.3 Configuring the Logic Solver Proof Testing tab.............................................268

6.12 To add an SIS control sheet to the SIS Ovation system.................................................270 6.13 To configure an SIS I/O channel.....................................................................................271

6.13.1 Configuring an Analog Input Channel ...........................................................273 6.13.2 Configuring a HART Analog Input Channel ..................................................275 6.13.3 Configuring a HART Two-state Output Channel ...........................................277 6.13.4 Configuring a Digital Input Channel ..............................................................279 6.13.5 Configuring a Digital Output Channel............................................................280

6.14 To configure SIS control modules...................................................................................280 6.15 To configure SIS digital points for alarming with timestamps .........................................282 6.16 To view SIS points ..........................................................................................................284

7 Using Ovation SIS 285 7.1 Loading Logic Solvers.....................................................................................................285

7.1.1 To load an SIS Logic Solver..........................................................................285 7.2 Using Point Information (PI) to identify SIS points ..........................................................287

7.2.1 To use Point Information to identify SIS points .............................................288 7.3 Viewing SIS Tuning windows for SIS algorithms ............................................................290

7.3.1 To access the SIS Tuning window for SIS algorithms ..................................290 7.3.2 SIS Tuning window for the LSCALC algorithm .............................................291 7.3.3 SIS Tuning window for the LSCEM algorithm...............................................292 7.3.4 SIS Tuning window for the LSSEQ algorithm ...............................................294 7.3.5 SIS Tuning window for the LSSTD algorithm................................................296

7.4 Forcing an algorithm input value.....................................................................................298 7.4.1 To force an algorithm input value..................................................................298

7.5 Restarting a Logic Solver ................................................................................................307 7.5.1 To restart (reboot) a Logic Solver..................................................................307

7.6 Requiring a reset before outputs can become energized ............................................... 309 7.7 Configuring the Logic Solver's response to detected faults ............................................309

7.7.1 Detecting faults on input channels ................................................................310 7.7.2 Detecting faults on output channels ..............................................................314

7.8 Choosing the Logic Solver scan rate ..............................................................................315 7.9 Loading to a running process..........................................................................................315 7.10 Restarting a Logic Solver after a power failure ...............................................................316 7.11 Proof testing the Logic Solver .........................................................................................316

7.11.1 Automatic proof testing..................................................................................317 7.11.2 Manual proof testing......................................................................................317

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7.12 Customizing your Ovation Control Builder frame............................................................318 7.13 Upgrading SIS firmware ..................................................................................................319

7.13.1 To initially load or upgrade an SIS Data Server ............................................319 7.13.2 To upgrade an SIS Logic Solver ...................................................................320

7.14 Using Fault Codes for SIS (66, 3, 8) ...............................................................................321 7.15 SIS Diagnostics...............................................................................................................322 7.16 SIS Logic Solver events ..................................................................................................324

Index 327

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IN THIS SECTION

What is a Safety Instrumented System?.............................................................................1 Functions of Ovation SIS ....................................................................................................2 Safety Instrumented System terminology ...........................................................................2

1.1 What is a Safety Instrumented System?

A Safety Instrumented System (SIS) is a set of components that includes sensors, Logic Solvers, and final control elements whose purpose is to respond to dangerous plant conditions, which may be hazardous. The Safety Instrumented System must generate the correct outputs to prevent the hazard or reduce the consequences of the hazard.

A Safety Instrumented System (SIS) is a form of process control typically used in industrial processes, such as those of Power Generation and Waste Water. The SIS performs specified functions in order to maintain a safe state of a control process when any unacceptable process conditions are detected.

A safe state is a state of the process operation where the hazardous event cannot occur. The safe state should be achieved within one-half of the process safety time.

International standard IEC 61508 is a standard of rules applied to all types of industry. This standard covers the complete safety life cycle, and has its origins in the process control industry sector.

International standard IEC 61511 was published in 2003 to provide guidance to end-users on the application of Safety Instrumented Systems in the process industries.

Refer to the Ovation Safety Instrumented System (SIS) User Guide for information about using SIS with Ovation.

S E C T I O N 1

Introduction to Ovation Safety Instrumented System (SIS)

1.2 Functions of Ovation SIS

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1.2 Functions of Ovation SIS

The Safety Instrumented System performs the following functions:

Implements a risk reduction strategy which is intended to reduce the likelihood of a hazardous event causing a catastrophe in a plant.

Validates messages that are sent from Ovation workstations to the safety system. This reduces the risk of sending invalid and perhaps unsafe messages to the SIS. This function is known as SIS Write.

Manages the safety instrumented functions (SIFs) to provide a risk reduction strategy which is intended to reduce the likelihood of a hazardous event. Each SIF defines:

Measurement sensors to use.

Actions to take.

When to apply the actions.

How fast to measure and react.

1.3 Safety Instrumented System terminology

Safety Instrumented System terms

TE RM DE S C RI P T I O N

Algorithms Algorithms are self-contained software modules that reside in the Logic Solvers.

Backplane Backplane is the electronic bus that is part of an SIS carrier. Backplane carries signals between the SIS Logic Solvers and the SIS Data Server.

CIS Ovation Controller Interface to SIS Data Server (CIS) provides communication between the Ovation Controller and the SIS Data Server.

Control module When a Logic Server is added to the Studio, four control modules are automatically created and appear under the Logic Solver in the Studio tree. The control sheets are stored in the control modules. All the control sheets stored in a control module are scanned at the same frequency.

CRC Cyclic redundancy check (CRC) is a mathematical function designed to detect changes to computer data, and is commonly used in digital communications and data storage. A CRC-enabled device calculates CRC code for each block of data. When a new block is received, the device repeats the calculation; if the new CRC code does not match the old CRC code, this indicates that there is a difference between the two blocks of data. This means there is either a data error or a change in the configuration of the data.

DHCP Dynamic Host Configuration Protocol (DHCP) is a network application protocol used by devices to obtain configuration information for operation in an Internet Protocol network. This allows networks to add devices with little or no manual intervention.

HAZOP Hazard and Operational Studies. Requirements for SIS projects.

IP Address Unique number consisting of four parts separated by dots. An example of an IP address is 129.228.36.38. Every computer that is on the Internet has a unique IP address.

Local bus Communications between Logic Solvers and one SIS Data Server. Achieved via backplanes and extender cables.

Local SISNet (Local peer bus)

Communications of safety data among Logic Solvers connected to one SIS Data Server. Achieved via carrier backplanes and coaxial extender cables.

1.3 Safety Instrumented System terminology

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TE RM DE S C RI P T I O N

LOPA Layers of Protection Analysis. Requirements for SIS projects.

Netmask The netmask (also known as an address mask) is a number that identifies the range of IP addresses that are on a local network. The netmask serves as a filter that enables a computer to determine whether it can transfer data directly to another machine on the local network or if the computer must use a router to transfer data.

NAMUR NAMUR is an international association of automation technology in process control industries. NAMUR alarming can be performed on I/O channels. The NAMUR limits are 106.25% top limit and -2.5% bottom limit.

NTP task Network Time Protocol. Synchronizes time between the Ovation Controller and its attached Logic Solvers.

Remote SISNet (Remote peer bus)

Communications among Logic Solvers connected to different SIS Data Servers. Achieved via SISNet Repeaters and a fiber optic loop

Shadow algorithm Term used to describe SIS algorithms when they are loaded into the Ovation Controller. The algorithms are not actually used by the Controller for control, but serve as a visual representation to the user of the algorithms in the Logic Solver.

SIF Safety Instrumented Function (see page 6).

SIL Safety Integrity Level (see page 6).

SIS Force Force operation (see page 298) occurs when a value for an algorithm input parameter (pin) is manually changed, typically for testing purposes.

SIS hardware Refer to Hardware components (see page 11).

SIS LAN Communication between a SIS Data Server and an Ovation Controller.

SIS point An Ovation point that has been used on an SIS control sheet. After the sheet is saved and loaded to an SIS Logic Solver, the point can then be used in SIS control schemes.SIS points can be analog or digital points.

SISNet Ring Sub-network of SIS components that is contained within one fiber-optic ring (value between 0 and 15).

SISNet Communications among Logic Solvers, with both local and remote architectures.

SIS Write SIS Write provides for the validation of messages between Ovation Operator Stations and the SIS Logic Solvers. This function greatly reduces the risk of sending an invalid message to the safety system from the Ovation system.

SNMP Simple Network Management Protocol (SNMP) is used in network management systems to monitor network-attached devices.

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IN THIS SECTION

SIS issues to consider.........................................................................................................5 Limitations for SIS ............................................................................................................... 6 SIS environmental specifications ........................................................................................7 SIS network design examples.............................................................................................8 Planning your hardware installation ....................................................................................9

2.1 SIS issues to consider

A Safety Instrumented System (SIS) is a form of process control usually implemented in industrial processes, such as those in a factory. The SIS performs specified functions to achieve or maintain a safe state of the process when unacceptable or dangerous process conditions are detected.

Consider the following issues when planning a SIS project:

The safe state is a state of the process operation where the hazardous event cannot occur. You should be able to achieve a safe state within one-half of the process safety time.

Even though safety instrumented systems are composed of elements that are similar to elements in a process control system (such as sensors, logic solvers, actuators, and support systems), you should keep the safety system separate and independent from your regular control systems.

The specified functions, or safety instrumented functions (SIF (see page 6)) should be implemented as part of an overall risk reduction strategy since they are intended to reduce the likelihood of a catastrophic release and create a safe state.

The correct operation of an SIS requires a series of equipment to function properly, such as the following:

Sensors capable of detecting abnormal operating conditions, such as high flow, low level, or incorrect valve positioning.

Logic Solvers that receive the sensor input signal(s), make appropriate decisions based on the nature of the signal(s), and change its outputs according to user-defined logic.

Final elements that take action on the process (for example, closing a valve) to bring it to a safe state due to changes in Logic Solver output.

Support systems, such as power and communications, are generally required for SIS operation. The support systems should be designed to provide the required integrity and reliability.

Functional and safety integrity requirements for an SIS are determined from hazard and operability studies (HAZOP), layers of protection analysis (LOPA), risk graphs, and so on. All techniques are mentioned in IEC 61511 and IEC 61508.

You need to verify that during SIS design, construction, and operation, these functional and safety requirements are met.

S E C T I O N 2

Planning your Safety Instrumented System

2.1 SIS issues to consider

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You can verify functional requirements by design reviews, such as failure modes, effects, and diagnostic analysis (FMEDA). You can also use various types of testing, such as factory acceptance testing, site acceptance testing, and regular functional testing.

You can verify safety integrity requirements by reliability analysis. For SIS that operates on demand, it is often the probability of failure on demand (PFD) that is calculated. In the design phase, the PFD may be calculated using generic reliability data. Later on, the initial PFD estimates may be updated with field experience from the specific plant in question.

Since it is not possible to address all factors that affect SIS reliability through reliability calculations, you should also have adequate measures in place (for example, processes, procedures, and individual training and certification) to avoid, reveal, and correct SIS related failures

2.1.1 Safety Instrumented Functions (SIFs)

Safety instrumented systems are applied to a process to substantially reduce the risk from costly or dangerous failures in industrial processes. The magnitude of risk reduction needed is determined from an analysis of the severity of hazardous process events and their probability of occurrence.

Safety instrumented systems are typically comprised of multiple Safety Instrumented Functions (SIFs). Each SIF can be considered a control loop, defining:

Measurements (sensors) to use. Actions to take (control elements to drive). When to apply the actions (logic linking the measurements to the actions). How fast to measure and react.

Every SIF has a Safety Integrity Level (SIL (see page 6)) assigned to it.

2.1.2 Safety Integrity Levels (SILs)

Every SIF has a Safety Integrity Level (SIL) assigned to it. SIL is a measure of the risk reduction provided by a SIF based on four discrete levels, each representing an order of magnitude of risk reduction. The factors considered in determining a SIL include:

Device integrity Diagnostics Failures Testing Operation Maintenance

2.2 Limitations for SIS

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2.2 Limitations for SIS

The following table provides the limits that are imposed on an Ovation SIS system.

CO M P O N E N T MAX I M UM L I M I T

SISNet Repeater rings in a system 1

SISNet Repeater pairs in an Ovation SIS system

32

Logic Solvers per SIS Data Server 32 (simplex), 16 (redundant)

Logic Solvers in a SIS system 1024

SIS control modules in a Logic Solver 4

Algorithms in a SIS control module 127

Secure parameters per Logic Solver 16

Non-secure parameters per Logic Solver 24

Logic Solvers that can publish data globally on one SIS Data Server

8

Secure parameters published globally per SIS system

256

2.3 SIS environmental specifications

The following table provides the environmental specifications for normal operation of Ovation SIS devices.

SP E CI F I C AT I O N DE S C RI P T I O N

Storage temperature

-40°C to 85°C (-40°F to 185°F)

Operating temperature

-40°C to 70°C (-40°F to 158°F)

Relative humidity 5 to 95%, non-condensing

Airborne contaminants

Severity level G3

Protection rating IP 20, NEMA 12

Shock 10 g half-sine wave for 11 ms

Vibration 1 mm peak-to-peak from 5 to 16 Hz; 0.5 g from 16

to 150 Hz

Input power 20 rating

Electromagnetic compatibility

Per EN61326-1, Criteria A and Namur NE21

2.4 SIS network design examples

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2.4 SIS network design examples

There are many different ways to design an SIS network. Each system has unique requirements that must be considered when planning the SIS network.

The following SIS network design examples illustrate the different design types:

Physical network design (see page 8) provides a hardware view of the SIS network. Logical network design (see page 9) provides a conceptual view of the SIS network.

2.4.1 Physical network design example

2.5 Planning your hardware installation

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2.4.2 Logical network design example


The following list provides an overview of the basic SIS hardware installation. Refer to the specific sections for installation details.

1. Install appropriate carriers (see page 14) on the DIN rails in a hardware cabinet.

2. Install terminal blocks (see page 23) onto a carrier.

3. Install the SIS Data Servers (see page 24) onto a carrier.

4. Install Logic Solvers (see page 30) onto the terminal block.

5. Connect the field wiring.

6. Install the SIS Net Repeaters (see page 39).

7. Install extender cables (see page 42).

8. Terminate the local bus (see page 43).

9. Provide power to (see page 44):

SIS Data Servers

SIS Logic Solvers.

SIS Net Repeaters.

SIS Net Extenders.

10. If desired, install auxiliary equipment (see page 49).


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2.5.1 Installation tools

The following tools are needed to install standard Ovation SIS:

Standard electrical tools (voltmeter, wire cutter, wire stripper, pliers, screwdrivers). Standard installation tools (screwdrivers, drill with standard bits). Ethernet cable tools (crimper, cable tester).

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IN THIS SECTION

Hardware components of Ovation SIS..............................................................................11 SIS carriers........................................................................................................................14 SLS terminal blocks ..........................................................................................................23 SIS Data Server ................................................................................................................24 SIS Logic Solvers..............................................................................................................28 SIS I/O channels ...............................................................................................................33 SIS Net Repeater ..............................................................................................................38 Fiber-optic cable\ring.........................................................................................................41 Carrier extender cables.....................................................................................................41 Power Supply ....................................................................................................................44 SIS LAN switches and routers ..........................................................................................49 Ovation SIS accessories ...................................................................................................49

3.1 Hardware components of Ovation SIS

The SIS system contains various hardware components that are described in the following table.

Note: For information on installing switches and routers in your SIS system, refer to the manufacturer's installation instructions.

SIS hardware components

HAR D W AR E CO M P O N E N T DE S C RI P T I O N

SIS carriers (see page 14) Vertical or horizontal brackets that mount on the DIN rails in a cabinet and hold the SIS Logic Solvers and terminal blocks.

Simplex terminal block (see page 23)

Interfaces between I/O devices and one Logic Solver.

Duplex terminal block (see page 42)

Interfaces between I/O devices and two Logic Solvers.

SIS Data Server (see page 24)

Provides the interface between the Ovation Controller and Logic Solvers and SISNet Repeaters. The SIS Data Server can manage up to 32 Logic Solvers.

SIS Logic Solvers (see page 28)

Hardware modules that contain logic solving capability and provide an interface to 16 I/O channels.

SIS Net Repeaters (see page 38)

Provides communication between Logic Solvers that are connected to different SIS Data Servers.

Fiber optic cable/ring (see page 41)

Used to permit one SISNet Repeater connected to a SIS Data Server to communicate with another SISNet Repeater connected to a different SIS Data Server.

S E C T I O N 3

Hardware for Ovation SIS


12 OW331_47

HAR D W AR E CO M P O N E N T DE S C RI P T I O N

Carrier Extender cables (see page 41)

Connects power and signals between 8-wide carriers.

SIS Net Distance Extender (see page 39)

Permits SISNet Repeaters to communicate over greater distances.

Power Supply (see page 44)

Provides power to the SIS Data Server.


OW331_47 13

The following graphic illustrates the SIS hardware components in a typical system.

3.2 SIS carriers

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3.2 SIS carriers

SIS carriers are brackets that are used to secure the SIS modules in a cabinet. The SIS carriers mount on standard 35 mm (1.38 in.) T- or G-type DIN rails in the hardware cabinets.

There are two types of SIS carriers:

Horizontal carriers 1-wide carrier (dual-left/right cable extender).

2-wide carriers (SIS Data Server, SIS Net Repeater).

8-wide carriers (I/O) (can hold up to four simplex Logic Solvers). Vertical carriers

1-wide carrier (right cable extender Vertical).

1-wide carrier (left cable extender Vertical).

4-wide Vertical (Power/SIS Data Server).

4-wide Vertical (SIS Net Repeater).

8-wide Vertical (I/O, left/right side) (can hold up to four simplex Logic Solvers).

Note: The LocalBus, including all cabling, cannot be longer than 6.5 m (21.3 ft).

3.2.1 SIS Carrier part numbers

SIS carriers are brackets that are used to secure the SIS modules in a cabinet.

The following table lists the available SIS carrier parts.

SIS carriers

CAR R I E R P AR T N UM BE R

DE S C RI P T I O N

KJ4001X1-NA1-PW 1-Wide Horizontal Dual Right Cable Extender

KJ4001X1-NB1-PW 1-Wide Horizontal Dual Left Cable Extender

KJ2221X1-EA1-PW 2-Wide Horizontal - holds SISNet Repeaters

KJ4001X1-BA3-PW 2-Wide Horizontal - SIS Data Server w/ Redundancy and SIS + Bus Term

KJ4001X1-BE1-PW 8-Wide Horizontal - I/O with Shield Bar (Can hold up to four simplex Logic Solvers)

KJ4003X1-BC1-PW 4-Wide Vertical Power/SDS, Top

KJ4003X1-BD1-PW 4-Wide Vertical SISNet Repeater

KJ4003X1-BA1-PW 8-Wide Vertical - I/O SIS Compatible, Left Side (Can hold up to four simplex Logic Solvers)

KJ4003X1-BB1-PW 8-Wide Vertical - I/O SIS Compatible, Right Side (Can hold up to four simplex Logic Solvers)

KJ4003X1-BE1-PW Extender, Right 1-Wide Vertical

KJ4003X1-BF1-PW Extender, Left 1 -Wide Vertical

3.2 SIS carriers

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3.2.2 Vertical carriers

Vertical carriers mount on standard 35 mm (1.38 in.) T- or G-type DIN rails.

Note: The vertical carriers are mounted properly when the lettering is in the upright position.

There are six types of carriers for mounting vertically in a cabinet:

Two types of 1-wide extenders. Two types of 4-wide carriers for power/SDS and SISNet repeaters. Two types of 8-wide I/O interface carriers (8-wide carrier can hold up to four simplex Logic

Solvers).

There are two separate cable lengths for connecting the 8-wide I/O interface carriers (8-wide carrier can hold up to four simplex Logic Solvers):

1 meter bottom cable extender. 2 meter top cable extender.

The LocalBus, including all cabling, cannot be longer than 6.5 m (21.3 ft).

The following figure illustrates a cabinet containing vertical configurations.

3.2 SIS carriers

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Figure 1: Cabinet with vertical SIS configuration

3.2 SIS carriers

OW331_47 17

The following figure illustrates suggested spacing for vertical DIN rail installation.

Figure 2: Vertical DIN rail installation

3.2.3 To install the 1-wide carrier (dual-left/right extender cables)

The 1-wide carrier is used to extend the local peer bus through the use of extender cables (see page 42) or to terminate the Local peer bus.

Refer to To install carrier extender cables (see page 42) for directions on using 1-wide carriers as extenders.

Use the following procedure to use the 1-wide carrier as a terminator:

1. Install a one-wide carrier onto the right/left side of the last carrier on the DIN rail.

2. Place a 120 ohms BNC terminator (KJ4010X1-BN1) onto each BNC connector on the carrier and push and turn to lock the terminator into place.

3.2 SIS carriers

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3. Terminate both connectors.

Figure 3: 1-wide SIS carrier

3.2.4 To install the 2-wide power/SIS Data Server carriers

Use the 2-wide power/SDS carrier to install one power supply and one SIS Data Server.

1. Install the 2-wide power/controller carrier on the DIN rails in the cabinet.

2. You can install an SIS Data Server and power supply on the 2-wide power/SIS Data Server carrier.

Note: Be sure that you are using the 2-wide power/SDS carrier numbered KJ4001X1- BA3-PW or higher for any SIS installation.

3. Install the 2-wide SISNet Repeater carriers on the DIN rails if remote communication is required. (SISNet Repeater carriers can be installed anywhere between the 2-wide power/SDS carrier and the terminated one-wide carrier.)

4. Connect the carriers to any adjacent carriers by sliding together the 48 pin connectors on the sides of the carriers.

3.2 SIS carriers

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5. If you are installing carriers on separate DIN rails, you will need to connect two (left and right) one-wide carriers and then connect cables to extend the LocalBus and local peer bus.

Figure 4: 2-wide SIS power/Data Server carrier

3.2 SIS carriers

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3.2.5 To install the 4-wide Vertical (Power/SIS Data Server) carrier

Use the 4-wide power/SIS Data Server carrier to install two power supplies and two redundant SIS Data Servers.

The 4-wide power/SIS Data Server carriers supply power and communications connections for vertically mounted SIS Data Servers.

Top 4-wide power/controller carriers connect to the left 8-wide I/O interface carrier. The 96 pin connector is at the bottom of this carrier. (The left 8-wide I/O interface carrier holds cards 1-8 from top to bottom.)

Figure 5: 4-wide SIS Vertical (Power/SIS Data Server) carrier

3.2.6 To install the 8-wide I/O interface carrier (can hold up to four simplex Logic Solvers)

Use the 8-wide carrier to install eight I/O cards with terminal blocks.

The power and cable specifications are:

Local Bus that powers I/O cards uses 8.0 A. (For large systems, use the LocalBus extenders to add more power.)

Bussed field power bus that is shared by multiple I/O card pairs uses 6.5 A for each connection.

Local Bus cable =1 .2 m (3.9 ft) long.

3.2 SIS carriers

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1. Install the 8-wide I/O interface carrier on the DIN rails in the cabinet next to the 2-wide carrier.

2. You can install Logic Solver terminal blocks on the 8-wide carrier.

Figure 6: 8-wide SIS I/O interface carrier

3.2.7 To install the 8-wide Vertical (left/right side) carrier (can hold up to four simplex Logic Solvers)

Use the 8-wide Vertical carrier to install up to four Logic Solvers with terminal blocks.

There are two types of 8-wide interface carriers:

Left 8-wide interface carrier (card positions 1-8 from top to bottom). Right 8-wide interface carrier (card positions 8-1 from top to bottom).

The extender cable specifications are:

Bottom cable extender = 1.0 m (3.3 ft) nominal length. Top cable extender = 2.0 m (6.6 ft) nominal length. Local Bus cable = 1.2 m (3.9 ft) long.

1. Mount the DIN rail at the appropriate location.

2. Connect each 8-wide carrier to any adjacent carriers by sliding the 96-pin connectors at the top or bottom of the carriers together. Hold the carrier in position to ensure that it does not fall.

3. Turn the screws counter-clockwise to disengage the latch. With the carrier on the rail, tighten the screws clockwise to latch.

3.2 SIS carriers

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Note The middle two screws are for G-rail mounting and the outer screws are for T-rail mounting.

4. If you are mounting 8-wide carriers on separate rails, use the bottom cable extender for a left-to-right bridge and the top cable extender for a right-to-left bridge.

5. Install ground wiring. For a good connection, use a signal ground cable and a block spade terminal, sized for AC/DC system power.

Figure 7: 8-wide SIS Vertical (left/right side) carrier

3.3 SLS terminal blocks

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3.3 SLS terminal blocks

Terminal blocks connect the wires from the devices in the plant to the SIS Logic Solvers. The terminal blocks are mounted on the SIS carriers in the Ovation cabinets.

3.3.1 SIS terminal block part numbers

Terminal blocks connect the wires from the devices in the plant to the SIS Logic Solvers.

The following table lists the available SIS terminal blocks.

SIS terminal blocks

TE RM I N AL B L O C K P AR T N UM BE R

DE S C RI P T I O N

KJ2201X1-HA1-PW Connects to SIS Logic Solver (Simplex).

KJ2201X1-JA1-PW Connects to Redundant SIS Logic Solver (Duplex).

3.3.2 To install terminal blocks

Terminal blocks are mounted on the SIS 8-wide I/O carriers (can hold up to four simplex Logic Solvers) and are used to contain the SIS Logic Solvers (SLS). SIS terminal blocks are yellow.

1. Install an 8-wide I/O carrier onto a DIN rail.

2. Locate an odd slot number on the I/O interface carrier. Simplex terminal blocks occupy two slots and redundant terminal blocks occupy four slots.

3. Insert the tabs on the back of the terminal block through the slots on the carrier and push the terminal block up to lock it into place. The following figure shows a redundant terminal block installed on an I/O interface carrier.

4. Connect the field wiring.

3.4 SIS Data Server

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The following figure illustrates the installation of an SIS terminal block on a horizontal 8-wide carrier:

Figure 8: SIS terminal block installation example

3.4 SIS Data Server

An SIS Data Server provides the interface between the Ovation Controller and Logic Solvers and SISNet Repeaters.

3.4.1 SIS Data Server part number

The SIS Data Server provides the interface between the Ovation Controller and Logic Solvers and SISNet Repeaters.

The following table lists the available SIS Data Server.

SIS Data Server

DAT A SE R V ER P AR T N UM BE R

DE S C RI P T I O N

KJ2003X1-PW1 Ovation SIS Data Server

3.4.2 To install a simplex SIS Data Server

A SIS Data Server provides the interface between the Ovation Controller and Logic Solvers and SISNet Repeaters.

1. Install a 2-wide power/SIS Data Server carrier onto a DIN rail.

2. Align the connectors on the back of the SIS Data Server with the connectors on the right slot of the 2-wide power/SIS Data Server carrier and push to attach.

3. Tighten the mounting screw.

3.4 SIS Data Server

OW331_47 25

The following figure illustrates the installation of an SIS Data Server.

.

3.4.3 To power up a simplex SIS Data Server

Prerequisites:

Install (see page 24) the SIS Data Server into a 2-wide carrier. Make sure the system power supply is connected to the SIS Data Server and the power is off. Make sure the Ovation network is set up in such a way that the SIS Data Server is able to

communicate (once it is powered up) with a DHCP server.

Procedure

1. Power up the SIS Data Server's power supply.

2. Refer to the flashing LEDs (see page 27) on the SIS Data Server:

The SIS Data Server attempts to contact the DHCP server and obtain its runtime configuration. Until the DHCP transaction is complete, the SIS Data Server continues to flash its LEDs.

The SIS Data Server initializes in the ACTIVE mode. The ACTIVE LED switches to the constant ON state. The Pri CN and Sec CN LEDs flash to indicate network activity.

Note: If the DHCP server does not contain a valid configuration for the SIS Data Server, the SIS Data Server remains in the ‘obtaining runtime configuration’ state until a valid configuration can be provided by the DHCP server.

3.4 SIS Data Server

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3.4.4 To power up a duplex SIS Data Server

Prerequisites:

Install (see page 24) the SIS Data Server into a 2-wide carrier. Make sure the system power supply is connected to the SIS Data Server and the power is off. Make sure the Ovation network is set up in such a way that the SIS Data Server is able to

communicate (once it is powered up) with a DHCP server. Make sure theSIS Data Server's redundant partner is running and active, and that there is a

physical redundant connection between the SIS Data Server and its partner.

Procedure

1. Power up the SIS Data Server's power supply.


The SIS Data Server attempts to contact the DHCP server and obtain its runtime configuration. Until the DHCP transaction is complete, the SIS Data Server continues to flash its LEDs.

The SIS Data Server communicates with its partner over the redundancy link. It detects that the partner is currently in the ACTIVE state. The SDS initializes in the STANDBY state. The STANDBY LED switches to the constant ON state. The Pri CN and Sec CN LEDs flash to indicate network activity.

Note that if the redundancy configuration obtained from the DHCP server by the two SIS Data Servers does not match, the two SIS Data Servers cannot communicate over the redundancy link. The SIS Data Server reboots while the redundant partner continues to operate in the ACTIVE mode. This cycle will repeat itself until the redundancy configuration is the same for both SIS Data Servers.

Note: If the DHCP server does not contain a valid configuration for the SIS Data Server, the SIS Data Server remains in the ‘obtaining runtime configuration’ state until a valid configuration can be provided by the DHCP server.

3.4.5 To remove a redundant SIS Data Server

Prerequisites

1. Make sure both SIS Data Servers in a redundant pair are running and both have active connections to the Ovation network.

Procedure

1. Remove the active redundant SIS Data Server from its slot on the carrier.


The partner SIS Data Server in the redundant pair detects the failure of its partner and switches to ACTIVE mode.

The STANDBY LED switches to the constant OFF state. The ACTIVE LED switches to the constant ON state. The Pri CN and Sec CN LEDs flash as per network activity. The Pri CN and Sec CN LEDs flash to indicate network activity.

Note: If you remove the standby SIS Data Server from its slot on the carrier, the active partner remains unaffected and continues to run in the ACTIVE state.

3.4 SIS Data Server

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3.4.6 SIS Data Server LEDs

The following table describes the LED indicators on an SIS Data Server (SDS).

LED LED ST AT U S DAT A SE R V ER ST AT U S

On Power is supplied to the unit. Power (Green)

Off System power is not supplied to unit (possible line power problem) (Internal Fault).

On (solid/continuous)

Internal fault.

Off No Fault.

On for one second followed by all LEDs on for five seconds

Unit went through RESET due to an unrecoverable software error.

Error (Red)

Flashing SIS Data Server is cleared.

On SIS Data Server is Active. Active (Green)

Off SIS Data Server is on Standby.

SIS Data Server is cleared. (Internal Fault)

On SIS Data Server is on Standby.

Off SIS Data Server is Active.

Standby (Green)

Flashing SIS Data Server is not configured.

Flashing Communication is active for Primary Physical Interface. Primary CN (Orange)

Off Communication is not active for Primary Physical Interface.

Flashing Communication is active for Secondary Physical Interface. Secondary CN (Orange)

Off Communication is not active for Secondary Physical Interface.

When you install and load an Ovation SIS Data Server, the LEDs flash a pattern that reveals the state of the SIS Data Server.

Initialization state

When you install (see page 24) an SIS Data Server in an Ovation carrier, the LEDs perform the following sequence, with one second between each phase, until the SIS Data Server is fully activated:

LED PH AS E 1 PH AS E 2 PH AS E 3 PH AS E 4 PH AS E 5

Power ON ON ON ON ON

Error OFF OFF OFF OFF OFF

Active OFF ON ON ON ON

Standby OFF OFF ON ON ON

Pri CN OFF OFF OFF ON ON

Sec CN OFF OFF OFF OFF ON

3.5 SIS Logic Solvers

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Minimal Firmware load

After the SIS Data Server has been initialized, the LEDs perform the following sequence to indicate that the basic SIS firmware is loaded on the SIS Data Server:

LED ST AT E

Power Constant ON

Error Constant OFF

Active If this is the active SIS Data Server, constant ON.

If this is not the active SIS Data Server, constant OFF.

Standby If this is the standby SIS Data Server, constant ON.

If this is not the standby SIS Data Server, constant OFF.

Pri CN Dependent on network activity.

Sec CN Dependent on network activity.

Upgraded Firmware load

After the SIS Data Server has been upgraded, the LEDs perform the following sequence only once to indicate that upgraded SIS firmware is now loaded on the SIS Data Server:

LED ST AT E

Power Constant ON

Error Constant OFF

Active Blinks every two seconds.

Standby Blinks every 0.5 seconds.

Pri CN Dependent on network activity.

Sec CN Dependent on network activity.


Logic Solvers are hardware modules that contain logic solving capability. There are simplex and redundant Logic Solvers. Local Logic Solvers use the same SIS Data Server but remote Logic Solvers use different SIS Data Servers.

Each Logic Solver can provide an interface to a maximum of 16 I/O channels. The following table lists the available types of SIS I/O.

SIS Logic Solver I/O

I /O TYP E DE S C RI P T I O N FU N C TI O N AL I T Y

Analog input Reports the analog value present at the channel.

Used with LSAI algorithms as input I/O references. Used with LSAO algorithms as readback references to read a 4


OW331_47 29

I /O TYP E DE S C RI P T I O N FU N C TI O N AL I T Y

to 20 mA signal.

HART analog input

Reports the analog value present at the channel and up to four digital values from a HART field device.

Used with LSAI algorithms as input I/O references. Used with LSAI algorithms as readback references to read a 4 to 20 mA signal.

HART two-state output

Drives a digital valve controller output device. On value is 20 mA. Off value is configurable: either 0 mA or 4 mA (to allow for HART communications).

Used with LSDVC algorithm to drive DVC6000ESD digital valve controllers.

Digital Input Reports the digital value present at the channel.

Used with LSDI algorithms as input I/O references when reading a digital (On/Off) signal. Used with LSDO algorithms as a readback I/O reference for a digital signal.

Digital Output Drives the output to a digital value and holds the output at that value. Outputs immediately reflect the output value that was received. Upon receiving a configuration that indicates a change from one type of output to another, the outputs switch to the off state

Used with LSDO algorithms as output I/O references when driving a digital signal.

3.5.1 SIS Logic Solver part number

Logic Solvers are hardware modules that contain logic solving capability.

The following table lists the available SIS Logic Solver.

SIS Logic Solver

LOGI C SO L VER P AR T N UM BE R

DE S C RI P T I O N

KJ2201X1-PW1 Ovation SIS Logic Solver

3.5.2 Logic Solver specifications

The following table provides the SIS Logic Solver specifications.


Storage temperature

-40 to 85 C (-40 to 185 deg. F)

Operating temperature

-40 to 70 C (-40 to 158 deg. F)


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Relative humidity 5 to 95%, non-condensing

Airborne contaminants

ISA-S71.04-1985 Airborne Contaminants

Class G3

Conformal coating

Protection rating IP 20, NEMA 12

Shock 10 g ½-sine wave for 11 ms

Vibration 1 mm peak-to-peak from 5 to 16 Hz; 0.5 g from 16 to 150 Hz

Input power 24 VDC +- 20%, 1.0A plus field power (5.0 A total)

Note: it is recommended that the Logic Solver and SIS Data Server use separate power supplies

Field power 4 A maximum (actual value depends upon channel type and field device type)

Isolation Each channel is optically isolated from the system and factory-tested to 1500 VDC. No channel-to channel isolation.

LocalBus current None

Mounting In SIS terminal blocks in odd-numbered slots (1,3,5,7) on the 8-wide carrier.

Simplex logic solvers take two slots and redundant Logic Solvers take four slots

Dimensions Height 105.5 mm (4.1 in.)

Width 83.8 mm (3.3 in.)

Depth 110.0 mm (4.3 in.)

3.5.3 To install Logic Solvers

Logic Solvers are hardware modules that contain logic solving capability. These modules communicate with each other through the SIS carriers.

1. Install an 8-wide I/O carrier (can hold up to four simplex Logic Solvers) onto a DIN rail (can hold up to four simplex Logic Solvers).

2. Install a Logic Solver terminal block on the I/O interface carrier.

3. Install a Logic Solver on the terminal block.

4. Use odd numbered slots (1,3,5,7) on an 8-wide carrier.

5. Use two slots for Simplex Logic Solvers and four slots for redundant Logic Solvers (see page 31).

6. Align the connectors on the back of the Logic Solver with the connectors on the front of the terminal block and push to attach.


OW331_47 31

The following figure illustrates the installation of an SIS Logic Solver.

Figure 9: SIS Logic Solver Installation example

3.5.4 Logic Solver redundancy

A redundant Logic Solver configuration consists of a pair of Logic solvers mounted in adjacent carrier slots with a redundant terminal block. Each Logic Solver is powered separately. The redundant Ovation SIS Logic Solver modules are connected to the field at the redundant terminal block.

No control sheet configuration is required to take advantage of Logic Solver redundancy, as the system automatically recognizes the redundant pair of cards. An integrity error alarm in a redundant Logic Solver pair will notify the operator if a Logic Solver fails.

When an Ovation SIS system uses redundant Logic Solvers, this means that any two redundant Logic Solvers run in parallel at all times. Both Logic Solvers read the inputs from the I/O terminals, both execute the logic and both drive the outputs at the I/O terminals.

There is no concept of primary and backup or master and slave. The only difference between the two is that the active Logic Solver communicates with both the Ovation Developer Studio and the Ovation Operator Station, and the dedicated safety network (SISnet). The standby Logic Solver is communicating only on the SISnet.

If a failure is detected in one of the Logic Solvers, it automatically goes to a failed state. In this condition all its output channels are de-energized. This has no impact on the other Logic Solver or the physical outputs because the other module continues to read inputs, execute logic, and drive outputs. The transition from the active to the standby Logic Solver is therefore completely bumpless.


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3.5.5 SIS Logic Solver LEDs

The following table describes the LED indicator patterns on an SIS Logic Solver (SLS) module.

PO WE R LED (GRE E N)

ER R O R LED (RE D)

AC T I V E LED (YE L LO W)

ST AN D B Y LED(YE L LO W)

SLS ST AT U S

On

Flashing in sync with Standby Alternating with Error and Active

On

Flashing in sync with Active Alternating with Power and Standby

On

Flashing in sync with Error Alternating with Power and Standby

On

Flashing in sync with Power Alternating with Error and Active

Power-up tests in progress

On

Solid

On

Flashing in sync with Active

On

Flashing in sync with Error

Off Non-Redundant Setup

Not initialized

On

Solid

On

Flashing in sync with Active

On


Off Redundant pair (Active)

Not initialized

On

Solid

On

Flashing in sync with Standby

Off On


Redundant pair (Standby)

Not initialized

On

Solid

Off On

Flashing


Initialized, not configured

On

Solid

Off On

Flashing


Initialized, not configured

On

Solid

Off Off On

Flashing


Initialized, not configured or configuration in progress

On

Solid

Off On

Solid


Configured

On

Solid

Off On

Solid


Configured

On

Solid

Off On

Solid


Configured

On

Solid

Off Off On

Solid


Configured

On

Solid

On

Solid

On

Flashing

On

Flashing

Card is not fully operational

(Contact technical support)

On

Solid

On

Solid

Off Off Error detected during power-up tests (Contact technical support)

3.6 SIS I/O channels

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A Logic Solver provides 16 channels of flexible I/O. This means that each channel can be used as one of the following:

Analog Input (see page 33). HART Analog Input (see page 33). HART Two-State Output (see page 34). Digital Input (see page 35). Digital Output (see page 36).

Note: To configure an SIS I/O channel (see page 271) provides information on configuring the SIS I/O channels.

3.6.1 Analog Input and HART Analog Input channel specifications and wiring

Analog Input channel specifications

SPE CI F I C ATI O N DE S C RI P T I O N

Number of channels 16

Isolation Each channel is optically isolated from the system and factory tested to 1500 VDC. No channel-to-channel isolation.

Nominal signal range (span)

4 to 20 mA

Full signal range 1 to 24 mA

Field circuit power per channel

24 mA

2-wire transmitter power

15.0 V minimum terminal to terminal @ 20 mA; current limited to 24 mA max.

Safety/diagnostic accuracy

2.0% of span

Resolution 16 bits

2-pole filter, corner frequency 5.68 Hz

Filtering -3 db at 5.68 Hz

-20.0 db at 40 Hz (half the sample rate)


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Figure 10: Wiring diagram and terminations for Analog Input and HART Analog Input channels

3.6.2 HART two-state output channel specifications and wiring

HART two-state output channel specifications




Nominal signal range (span)

On state - 20 mA

Off state - 0 to 4 mA (configurable (see page 277))

Full signal range 0 to 24mA

Safety/diagnostic accuracy

5% of span

Resolution 12 bits

Compliance voltage 20 mA into 600 Ω load

Open-loop detection <1.0mA - when the output drifts 15% out of the configured value


OW331_47 35

Figure 11: Wiring diagram and terminations for HART Two-state output channels

3.6.3 Digital Input channel specifications and wiring

Digital input channel specifications




Detection level for ON ≥ 2 mA

Detection level for OFF

< 1.65 mA

Input impedance ~ 1790 Ω

Inputs compatible with NAMUR sensors (12 V)

Input compatibility Dry contact

Dry contact with end of line resistance

<100 Ω for guaranteed short circuit detection

Line fault detection 1

Short circuit (optional)

>6 mA (simplex)

>11 mA (redundant)

Line fault detection

Open circuit (optional)

>40 kΩ for guaranteed open loop detection

<0.35 mA 1 Digital Input channels have line fault detection for detecting open or short circuits in field wiring. To use this capability you must: Enable line fault detection in your configuration. Enable line fault detection on a channel-by-channel basis when you configure the channels.

Connect the dry contact to external resistors. Connect the dry contact to a 12 KΩ resistor in parallel (allows the open circuit detection) and a 2.4 KΩ resistor in series (allows short circuit detection). Emerson's End of Line Resistance Module (KJ2231X1-EC1) provides this function. This module connects to the Digital Input channel and to a field contact.

Line fault detection is built into NAMUR sensors (see page 2). Do not use external resistors with NAMUR sensors; however, you must enable line fault detection in your configuration when using NAMUR sensors.


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Figure 12: Wiring diagram and terminations for digital input channels (with line fault detection options)

Figure 13: Wiring diagram and terminations for digital input channels (without line fault detection options)


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3.6.4 Digital Output channel specifications and wiring

Digital output channel specifications




Output voltage Field power minus 2 V

Field power 0.5 A continuous per channel; 4.0 A max. per card

Output loading 56 to 3500 Ω

Open loop test off. 4.5 μA typical; 10 μA max.

Off-state leakage Optional pulse test will apply 24 VDC pulse on line for 1.0 mS every 50 mS.

Short circuit protection

Outputs current limited to 2.0 A typical

Line fault detection 1

Short circuit (optional)

< 5 Ω for > 1 second with +24 VDC field power.

< 25 kΩ for guaranteed open loop detection

Line fault detection

Open circuit (with +24 VDC field power)

< 3.5 kΩ for guaranteed no open loop detection.

1 Digital Output channels have line fault detection for detecting open or short circuits in field wiring. To use this capability you must: Enable line fault detection in your configuration. Enable line fault detection on a channel-by-channel basis when you configure the channels.

When driving inductive loads greater than or equal to 0.8 Henry in simplex or 0.3 Henry in redundant, an RC compensator may be required. Size the RC compensator at 3.3 kΩ and 0.47 μf for simplex and 2.7 kΩ and 0.22 μf for redundant as shown in the following figure. Emerson's RC compensator module (KJ2231X1-ED1) provides this function. This module can be used for simplex and for redundant applications. Pulse testing is recommended; however, it can be disabled for field devices such as solid state relays or active electronics that cannot support it. With redundant Logic Solvers, pulse testing requires partner synchronization and stops if the redundant partner becomes unavailable.

3.7 SIS Net Repeater

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Figure 14: Wiring diagram and terminations for digital output channels


SIS Net Repeaters are hardware modules that provide communication beyond the local Logic Solvers that are connected to one SIS Data Server.

The Repeaters broadcast global messages to remote Logic Solvers that are attached to another SIS Data Server. This communication is done through the use of a fiber-optic network.

Global messages refer to messages that are intended for all Logic Solvers.

3.7.1 SIS Net Repeater part number


The following table lists the available SIS Net Repeater part number.

SIS Net Repeater

SIS NE T RE PE AT E R PAR T N UM BE R

DE S C RI P T I O N

KJ2221X1-PW1 Ovation SIS Net Repeater


OW331_47 39

3.7.2 To install SIS Net Repeaters for horizontal mounting


1. Install a 2-wide SIS Net Repeater carrier onto a DIN rail.

2. Install the SISNet Repeater on the carrier. There is a primary and secondary SISNet Repeater on each carrier.

3. Align the connector on the back of the SISNet Repeater with the connector on the 2-wide SISNet Repeater carrier and push to attach.


The following figure illustrates the installation of an SIS Net Repeater.

Figure 15: SIS Net Repeater Installation example

3.7.3 SIS Net Distance Extender

SISNet Distance Extenders convert multimode fiber-optic signals to single mode fiber-optic signals to allow SISNet Repeaters to communicate over greater distances. Depending upon the installation, the remote peer ring can be extended by an additional 20 km when single mode fiber-optic cable is used.

The following table lists the available SIS Net Distance Extender part number.

SIS Net Distance Extender

NE T DI S T AN C E EX T E ND E R AR T N UM BE R

DE S C RI P T I O N

KJ2222X1-BA1-PW Ovation SIS Net Distance Extender


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3.7.4 SIS Net Repeater LEDs

The following table describes the LED indicators on an SIS Net Repeater.

LED LED ST AT U S SIS NE T REPE AT E R ST AT U S

On Power is applied to Unit. Power

(Green) Off Power is not applied to unit.

On Internal Fault .

Off There is no fault.

Error

(Red)

Flashing Maintenance Required.

On Normal operation, SIS Net Repeater is receiving global data from other SIS Net Repeaters and transmitting it to the local peer bus.

Off Normal operation, there is no Logic Solver for the SIS Net Repeater to synchronize with on the local peer bus. OR The SIS Net Repeater local peer bus transmitter hardware has detected a problem

Flashing (local peer Tx only)

The SIS Net Repeater is not receiving its own transmissions while still receiving the transmissions of local Logic Solvers.

Local Peer Tx

(Yellow)

Flashing (both local Tx and Rx)

Local peer bus extender cables are disconnected; bus is not terminated or is terminated with wrong resistance.

On Normal operation, SIS Net Repeater is receiving transmissions from local Logic Solvers.

Off Normal operation, there is no Logic Solver for the SIS Net Repeater to synchronize with on the local peer bus. OR SIS Net Repeater local peer bus receiver hardware has detected an error.

Local Peer Rx

(Yellow)

Flashing (both local Tx and Rx)

Local peer bus extender cables are disconnected; bus is not terminated or is terminated with wrong resistance; More than 5% of received messages have errors.

On Normal operations, SIS Net is transmitting local and remote global messages on the fiber-optic ring.

Off Hardware error.

Remote Peer Tx

(Yellow)

Flashing Break in fiber-optic ring.

On Normal operation, the SIS Net Repeater is receiving global data.

Off Hardware error.

Remote Peer Rx

(Yellow)

Flashing Fiber-optic cable is disconnected, broken, or crossed; More than 5% of

received messages have errors.

3.8 Fiber-optic cable\ring

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3.8 Fiber-optic cable\ring

A fiber-optic cable/ring allows one SISNet Repeater (connected to an SIS Data Server) to communicate with another SISNet Repeater (connected to a different SIS data Server).

A local SISNet Repeater collects locally generated global messages into a single message and sends it to the next SISNet Repeater in the ring. Upon receipt of a message, the receiving SISNet Repeater broadcasts it to its local peer bus and forwards the message to the next SISNet Repeater in the ring.

A global message is forwarded around the ring once.

The primary SISNet Repeaters form one fiber-optic ring and the secondary form a separate, independent ring.

SISNet Distance Extenders (see page 39) that convert multimode fiber-optic signals to single mode fiber-optic signals can be used to extend the remote peer ring

3.9 Carrier extender cables

Carrier extender cables extend power and signals between 8-wide carriers (can hold up to four simplex Logic Solvers). Local peer bus extender cables extend the local peer bus between Logic Solvers on different carriers. One-wide carriers with terminators terminate the local peer bus at the final carrier.

When carriers are installed on separate DIN rails, carrier extender cables and local peer bus extender cables are used to extend the LocalBus and local peer bus. Extender cables connect to one-wide carriers on the left and right sides of the 2-wide and 8-wide carriers.

3.9.1 Carrier extender cable part numbers

Carrier extender cables extend power and signals between 8-wide carriers.

The following table lists the available SIS cable extenders.

SIS cable extenders (horizontal)

CAB L E E X T E N D E R P AR T N UM BE R S

DE S C RI P T I O N

KJ4002X1-BF2-PW Carrier extender cable, bottom, 44 inches




KJ4002X1-BE1-PW Carrier extender cable, top, 77 inches


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SIS cable extenders (vertical))


DE S C RI P T I O N

KJ4003X1-BH1-PW Carrier extender cable, 43 inches

KJ4003X1-BH2-PW Carrier extender cable, 17 inches

SIS BNC cable extenders


DE S C RI P T I O N

KJ4010X1-BL1-PW Cable Assembly, SISNet, Coax, Black, 46 inches

KJ4010X1-BM1-PW Cable Assembly, SISNet, Coax, White, 46 inches





3.9.2 To install carrier extender cables

A standard installation uses one carrier extender cable; however, dual carrier extender cables can also be used. The following procedure is for a standard installation that uses one carrier extender cable.

1. Install the right and left-side one-wide carriers by sliding together the 48-pin connectors on the sides of the carriers.

2. Connect the 44-pin D-shell (male) connector on the carrier extender cable to the top D-shell connector labeled A on the right-side carrier and fasten the retainer screws.


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3. Connect the 44-pin D-shell connector on the other end of the cable to the top D-shell connector labeled A on the left-side carrier and fasten the retainer screws.

Figure 16: 1-wide SIS carrier

4. Notice that the local peer bus extender cable has black and white boots. The cables connect black-to-black (D) and white-to-white (C).

5. Place the cable end onto the BNC connector on the carrier and push and turn to lock the cable into place.

3.9.3 To terminate the local bus

You must terminate the local peer bus by using a 120 ohm BNC terminator on the right one-wide carrier that is connected to the last 8-wide carrier on the local bus.

1. Install a 1-wide carrier onto the right side of the last carrier.

3.10 Power Supply

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2. Place a 120 ohms BNC terminator onto each BNC connector on the carrier and push and turn to lock the terminator into place. Terminate both connectors.

Figure 17: Bus terminator on the 1-wide carrier

3.10 Power Supply

Logic Solvers, SIS Net Repeaters, and SISNet Distance Extenders are powered separately from SIS Data Servers. This ensures that a loss of power to the SIS Data Server does not affect the operation of Logic Solvers, SISNet Repeaters, and SISNet Distance Extenders. In most installations, redundant 24 VDC power is used for both simplex and redundant SIS applications. When redundant 24 VDC power is used, both power supplies must be referenced to a common connection to ground

The SIS power supply takes line power or power from a bulk power supply and converts it to 12 VDC power to drive the SIS Data Server. The system power supply mounts on either slot of the 2-wide power/ SDS carrier.

Caution: Although the screw terminal connector on the Logic Solver, SISNet Repeater, and SISNet Distance Extender has two positive and two negative connectors, it is recommended that they NOT be used to daisy-chain power. Daisy-chaining could result in a loss of power to downstream Logic Solvers if power is removed or lost at an upstream Logic Solver.

3.10 Power Supply

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3.10.1 Power supply part number

The system power supply takes line power or power from a bulk power supply and converts it to 12 VDC power to drive the SIS Data Server. The system power supply mounts on either slot of the 2-wide power/SIS Data Server carrier or on a 4-wide power/SIS Data Server carrier.

The following table lists the available SIS power supply part number.

SIS power supply

PO WE R S UP PL Y P AR T N UM BE R

DE S C RI P T I O N

KJ1501X1-PW1 Ovation SIS power supply

3.10.2 Power supply specifications

The following table lists the values of the power supply ratings.

SIS power supply specifications

PO WE R S UP PL Y P AR AM E TER VAL U E

Input power rating 24V DC, +/-20% (5.4A) OR 12V DC, -4%+5% (14.8A)

Output power rating -40 to 60° C (-40 to 140° F)

Output power rating 70° C (158° F)

12V DC, 8.0A OR 12V DC, 13.0A

12V DC, 6.0A OR 12V DC, 10.0A

Output power rating 5.1V DC, 2.0A

Output power rating 3.4V DC, 2.0A

Note: Combined output power of 5.1V DC and 3.4 VDC DC

10.2 Watts Maximum

Ambient temperature -40 to 70° C

Alarm relay contact rating 30V DC, 2A OR 250 AC, 2A

3.10.3 To install power supplies

The system power supply takes line power or power from a bulk power supply and converts it to 12 VDC power to drive the SIS Data Server. The system power supply mounts on either slot of the 2-wide power/SDS carrier or on a 4-wide power/SDS carrier.

1. Install a 2-wide or 4-wide power/SIS Data Server carrier onto a DIN rail.

2. Connect the input supply wires to the input power connection on the top of the system power supply.

3. If you have secondary system power supplies, connect the input supply drops to each system power supply.

3.10 Power Supply

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Warning: Always remove input power to the supply before connecting or disconnecting the input power connection. The connector should not interrupt current flow and could be damaged if actuated under a load condition.

4. Align the system power supply with the connector on the 2-wide or 4-wide power/SIS Data Server carrier and push to attach.


3.10.4 To provide power to the Logic Solvers

1. Locate the removable 24 VDC screw terminal connectors on the top of the Logic Solver.

2. Connect power supply positive (+) to the positive (+) connector on the Logic Solver and power supply negative (-) to the negative (-) connector on the Logic Solver.

Figure 18: Providing power to the Logic Solver

3.10.5 To provide power to the SISNet Repeaters

1. Locate the removable 24 VDC screw terminal connectors on the top of the SISNet Repeater.

3.10 Power Supply

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2. Connect power supply positive (+) to the positive (+) connector on the SISNet Repeater and power supply negative (-) to the negative (-) connector on the SISNet Repeater.

Figure 19: Providing power to the SISNet Repeater

3.10.6 To provide power to SISNet Distance extenders

1. Locate the removable 24 VDC screw terminal connectors on the top of the SISNet Distance Extender.

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2. Connect power supply positive (+) to the positive (+) connector on the SISNet Distance Extender and power supply negative (-) to the negative (-) connector on the SISNet Distance Extender.

Figure 20: Providing power to the SISNet Distance Extender

3.10.7 SIS Power Supply LEDs

The following table describes the LED indicators on an SIS Power Supply.

LED LED ST AT U S PO WE R SUP PLY ST AT U S

On Power is supplied to the unit. Power (Green)

Off System power is not supplied to unit (Possible line power problem)

(Internal Fault)

On Outputs are outside of tolerance.

Inputs over voltage. Unit shuts down.

Error (Red)

Off No fault.

3.11 SIS LAN switches and routers

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3.11 SIS LAN switches and routers

For information on installing switches and routers in your SIS system, refer to the manufacturer's installation instructions.

3.12 Ovation SIS accessories

Typically, Ovation SIS equipment will connect to either 4-20 mA analog signal devices or digital I/O devices rated at up to 500 mA per channel. Almost all the outputs will be "de-energize-to-trip." However, there may be some output signals that require higher voltages or currents. Some environments may require nonincendive outputs. Some devices may require "energize-to-trip" functionality.

SIL3 applications that require higher voltage or current than the Logic Solver natively supplies may employ the SIS Relay module. The Voltage Monitor may be used to verify the correct state of the relay. For applications where the current to the final device needs to be limited for nonincendive ratings, there is the current limiter module.

For other applications that simply need high current, Ovation offers the Auxiliary Relay Energize to Actuate (ETA Direct) module. For applications where the current to the final device needs to be switched on when the system trips, there is the Auxiliary Relay De-energize to Actuate (Inverting), or DTA-Inverting relay. Either of these relay modules, when paired with the Auxiliary Relay Diode module, allows Ovation SIS to meet higher-current digital output requirements while maintaining its field wiring monitoring and ensuring that the relay changes states correctly.

The following auxiliary equipment can be used with SIS applications:

SIS Relay module (see page 50) Voltage Monitor module (see page 54) SIS Current Limiter module (see page 56) Auxiliary Relay DTA Inverting module (see page 59) Auxiliary Relay ETA Direct module (see page 63) Auxiliary Relay Diode module (see page 64)


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3.12.1 SIS Relay module

The SIS Relay module is suitable for use in both high and low de-energize to trip safety critical applications. This module can extend the voltage and current capability of the Ovation SIS Logic Solver or any other safety PLC 24VDC digital output without compromising safety integrity. It is capable of switching up to 2.5A at 250 VAC or 2.5A at 24 VDC for safety applications following de-energize to trip conventions by disconnecting field power when de-energized.

Two sets of output switches that are controlled by one common input are provided .The DC mode of operation is configured to provide two independent sets of DC input power while the AC mode of operation is configured to switch both sides of the AC input power.

The SIS Relay module contains three relays from different manufacturers. A relay coil is energized for all three relays in normal operation. If a demand occurs, the Logic Solver removes the power from the coil for all three relays at the same time. Each relay can be proof tested in the field. Refer to the Ovation SIS Accessories Safety Manual.

AC Field Wiring

Refer to the following figure for AC field wiring connections for the SIS Relay module.

Two pin digital input connection for input from a Logic Solver or generic safety PLC 24VDC Digital Output channel.

Two pin connections for input from an AC power source. Two pin connections for the switched AC output to an AC field device.


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Figure 21: SIS Relay module for AC Field Wiring


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DC Field Wiring

Refer to the following figure for DC field wiring connections for the SIS Relay module.

Two pin digital input connection for input from a Logic Solver or generic safety PLC 24VDC Digital Output channel.

Four pin connection for input from two DC power sources. Four pin connection for the switched outputs to two DC field devices

Figure 22: SIS Relay module for DC Field Wiring

The SIS Relay module's LED shows the state of the relay coil if the digital input is correctly connected to the Logic Solver output. The LED is illuminated when the relays are energized and supplying power through the switched power outputs. The following table shows the specifications for the SIS Relay module.

SIS Relay Module Specifications

I TEM SP E CI F I C AT I O N S

Input for energized relay > 18VDC

Input for de-energized relay < 6VDC


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Input current at 24 VDC < 70 mA ±- 20%

Relay current rating for AC operation 2.5A @ 250 VAC

Relay current rating for DC operation Note: When used in switched applications where transients and current are limited.

2.5A @ 30 VDC

Maximum AC Source 280 VAC

Maximum DC Source 30 VDC

Output series impedance (energized state) < 0.5 Ω

Output series impedance (de-energized state) > 1 MΩ

Maximum DC source 1 to source 2 potential 100 V

Input to Output isolation rating 300 VAC

Input to output delay (de-energize) 10 msec

Input to output delay (energize) 12 msec

Mounting configuration Horizontal DIN rail

Lifetime limitation on number of relay cycles >30,000 cycles or 20 years

The dimensions for the SIS Relay module are the same as for the Voltage Monitor module (see page 54).


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3.12.2 Voltage Monitor module

The Voltage Monitor provides two independent sets of voltage monitoring circuitry in one device. Each circuit is suitable for use in both high and low de-energize to trip applications to extend the voltage input monitoring capability of the Ovation SIS Logic Solver or any other safety PLC digital input compatible with its specified output states. It also supplies a secondary output for non-safety critical monitoring for each input. Refer to the Ovation SIS Accessories Safety Manual for information on proof testing the Voltage Monitor.

The state of both outputs for an associated input is controlled by the voltage level of the input with the outputs going to the de-energized state when the input goes below a specified value.

The Voltage Monitor is designed to be used with the Ovation SIS Logic Solver to drive the Logic Solver's Digital Input channel or an Ovation Digital Input channel (auxiliary) based on the output of the SIS Relay module. Refer to the following figures.

Figure 23: Voltage Monitor Top View and Dimensions


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Figure 24: Voltage Monitor Bottom View and Connections

The Voltage Monitor has the following connections:

Two four-pin connection blocks, one for each voltage monitoring channel for connection to DC or AC power source being monitored.

Two four-pin connection blocks, one for each voltage monitoring channel for connecting the output to a Logic Solver or other safety PLC monitored DI channel and an Ovation Digital Input channel (auxiliary).

The table below shows the specifications for the Voltage Monitor.

Voltage Monitor Specifications


Input for energized output >18 VDC or > 80 VAC

Input for de-energized output <3 VDC or <3 VAC

Maximum input voltage rating 250 VAC

Input current at 24 VDC < 6 mA ± 20%


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Input current at 120 VAC <12mA

Input current at 230 VAC <15 mA

Output impedance (energized state) < 3.5 KΩ

Output impedance (de-energized state) >8.5 KΩ

Maximum output voltage rating 30 VDC

Input to output isolation rating 250 VAC

Safety output to auxiliary isolation rating 30 VAC

Channel-to-channel isolation rating 250 VAC

Input to output delay (de-energize) 30 msec

Input to output delay (energize) 5 msec

Mounting configuration Horizontal DIN rail

Lifetime limitations 30,000 cycles or 20 years

3.12.3 SIS Current Limiter module

The SIS Current Limiter module limits the current from the Logic Solver Digital Output channels to levels below the ignition curves for Class 1 Division 2 and Zone 2 installations. Field wiring from the Current Limiter output to the field can be removed and reconnected under power. The following table shows specifications for the Current Limiter.

SIS Current Limit Specifications


Input power (from Logic Solver Digital Output channels)

17 to 29 VDC; 22 VDC nominal

Output power 28.8 VDC (max)

Output current range 0-100 mA (max)

Output current limit threshold 100 mA (min); 120 mA (max)

Mounting Horizontal DIN rail


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Refer to the following figures for illustrations of pin connections:

Four pin connections for input from the Logic Solver Digital Output channels. Four pin connections for output to energy-limited loads.

Figure 25: SIS Current Limiter Top View and Dimensions


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Figure 26: SIS Current Limiter Bottom View and Connections


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3.12.4 Auxiliary Relay DTA-Inverting module

The Auxiliary Relay DTA-Inverting (De-Energize to Actuate) module is connected to a Logic Solver's digital input and digital output channels and is then connected to a dual 24 VDC power supply.

Two field terminals are then used to connect to the Auxiliary Relay Diode module (see page 64) that is located next to the field actuator as shown in the following figure.

The Auxiliary Relay DTA-Inverting module energizes the field when Digital Out is turned Off.

The Auxiliary Relay DTA-Inverting module is paired with the Auxiliary Relay Diode module to enable monitoring of the field wiring and the status of the relay. A switch on the Auxiliary Relay Diode module is used to change between Energize to Actuate (ETA) and De-Energize to Actuate (DTA). The Auxiliary Relay DTA-Inverting module's LED shows if power is correctly installed and the state of the relay coil.

This module is not intended for SIL-certified applications.

Figure 27: Example of module connections to Auxiliary Relay Diode module


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Figure 28: SIS Auxiliary Relay DTA Inverting Top View and Dimensions


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Figure 29: SIS Auxiliary Relay DTA Inverting module Bottom View and Connections

The Auxiliary Relay DTA-Inverting module has the following connections:

Two pin connections for primary power Two pin connections for secondary power Two pin connections for field output to the Auxiliary Relay Diode module Two pin connections for coil input Two pin connections for status output Two pin connections for auxiliary output contact closure (not shown in the "Example of

module connections to Auxiliary Relay Diode module" graphic)

Auxiliary Relay DTA-Inverting Module Specifications


Input field power 24 VDC ± 20% 5A maximum (actual current depends upon actuator used)

Contains integrated OR-ing diodes for redundant 24 V inputs.

Relay current rating 5 A @ 24 VDC nominal

Isolation Power input and Logic Solvers must be connected to a common ground.

Coil input voltage 17-28.8 VDC to energize


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Coil input impedance 430 Ohms


The following table summarizes the Auxiliary Relay ETA-Direct module functionality.

Auxiliary Relay DTA-Inverting module functions

PRO CE SS ST AT E

DO CH AN N E L

RE L AY ST AT E

RE L AY LED

RE L AY OU T P U T

DI CH AN N E L (RE L AY ST AT U S)

L I N E FAU L T

DE T E C TI O N1

DO DI Relay Output

Normal (Alarm Off)

On (1) On On Off On (1) Open/ Short

Open/Short

Open/Short

Tripped (Alarm On)

Off (10 Off Off On Off (0) Open/ Short

Open/Short

N/A

1 Only applies when Line Fault Detection is enabled. When Line Fault Detection is not enabled, the On states detect opens only and the Off states detect shorts only.


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3.12.5 Auxiliary Relay ETA-Direct module

The Auxiliary Relay ETA-Direct (Energize to Actuate) module is connected to a Logic Solver's digital input and digital output channels and is then connected to a dual 24 VDC power supply.

Two field terminals are then used to connect to the Auxiliary Relay Diode module that is located next to the field actuator in a similar manner as that shown in the graphic in the Auxiliary Relay DTA-Inverting module (see page 59) topic.

Note: The dimensions and connections for the Auxiliary Relay ETA-Direct module are the same as those for the Auxiliary Relay DTA-Inverting module (see page 59).)

The Auxiliary Relay ETA-Direct module energizes the field when Digital Out is turned On.

The Auxiliary Relay ETA-Direct module is paired with the Auxiliary Relay Diode module to enable monitoring of the field wiring and the status of the relay. A switch on the Auxiliary Relay Diode module is used to change between Energize to Actuate (ETA) and De-Energize to Actuate (DTA). The Auxiliary Relay ETA-Direct module's LED shows if power is correctly installed and the state of the relay coil.

This module is not intended for SIL-certified applications but may be useful in lock-out or deluge applications where an unintended trip caused by a Logic Solver fault or operator error could be hazardous to personnel and equipment.

The following table shows the specifications for the Auxiliary Relay ETA-Direct module.

Auxiliary Relay ETA-Direct Module Specifications


Input field power 24 VDC ± 20% 5A maximum l (actual current depends upon actuator used)

Contains integrated OR-ing diodes for redundant 24 V inputs.

Relay current rating 5 A @ 24 VDC nominal

Isolation Power input and Logic Solvers must be connected to a common ground.

Coil input voltage

Coil input impedance

17-28.8 VDC to energize

430 Ohms


The following table summarizes the Auxiliary Relay ETA-Direct module functionality.


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Auxiliary Relay ETA-Direct module functions

PRO CE SS ST AT E

DO CH AN N E L

RE L AY ST AT E

RE L AY LED

RE L AY OU T P U T

DI CH AN N E L (RE L AY ST AT U S)

L I N E FAU L T

DE T E C TI O N1

DO DI Relay Output

Normal (Alarm Off)

Off (0) Off Off Off On (1) Open/ Short

Open/ Short

Open/ Short

Tripped (Alarm On)

On (1) On On On Off (0) Open/ Short

Open/ Short

N/A

1 Only applies when Line Fault Detection is enabled. When Line Fault Detection is not enabled, the On states detect opens only and the Off states detect shorts only.

3.12.6 Auxiliary Relay Diode module

The Auxiliary Relay Diode module is paired with either the Auxiliary Relay ETA-Direct module (see page 63) or the Auxiliary Relay DTA Inverting modules (see page 59) to extend the Logic Solver's automatic testing of field wiring past these relays to the digital end device.

A switch on the Auxiliary Relay Diode module is used to change between Energize to Actuate and De-Energize to Actuate operation.

The following table shows the specifications for the Auxiliary Relay Diode module.

Auxiliary Relay Diode module Specifications


Mode selection Switch selectable between ETA and DTA operation. Incorrect switch position will cause bad status on Logic Solver Digital Input.

Diode rating 24 VDC ± 20% 5 A maximum (actual current depends upon actuator used)

Mounting Per DIN 43729


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The following figure shows the dimensions, connections, and switch positions on the Auxiliary Relay Diode module.

Figure 30: Auxiliary Relay Diode module

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IN THIS SECTION

Software components of Ovation SIS ...............................................................................67

4.1 Software components of Ovation SIS

The SIS system contains various software components that are described in the following table.

Information on adding and configuring the various software components of Ovation SIS is found in Adding and configuring SIS components in the Developer Studio (see page 237).

SIS software components

SO F T W AR E C O M PO NE N T

LO C AT I O N OP E R AT I N G SY S TEM IN T E R F AC E S T O:

SIS Data Server SIS Data Server pSOS operating system Logic Solver (external) Net Repeater (external) CIS

Ovation Controller Interface to SIS Data Server (CIS)

Ovation Controller VxWorks operating system

Controller embedded software (external)

SIS Data Server embedded software

Ovation SIS Engineering tools

Ovation SIS MMI Tools SIS Write Server

Ovation SIS Write Library

Engineering or Operator Station

MS Windows 2003/XP/Windows 7

CIS Ovation SIS Engineering tools

Ovation SIS MMI Tools

Ovation SIS Engineering Tools

Engineering station MS Windows 2003/XP/Windows 7

CIS SIS Write Server

Ovation SIS MMI Tools Operator Station MS Windows 2003/XP/Windows 7

CIS SIS Write Server

S E C T I O N 4

Software for Ovation SIS

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IN THIS SECTION

Algorithm types..................................................................................................................70 Using algorithm reference pages ......................................................................................70 Ovation SIS Logic Solver algorithm table .........................................................................72 LSAI...................................................................................................................................74 LSALM...............................................................................................................................78 LSAND ..............................................................................................................................80 LSAVTR ............................................................................................................................82 LSBDE.............................................................................................................................100 LSBFI ..............................................................................................................................102 LSBFO.............................................................................................................................105 LSCALC ..........................................................................................................................107 LSCEM............................................................................................................................113 LSCMP............................................................................................................................145 LSDI ................................................................................................................................147 LSDO...............................................................................................................................150 LSDVC ............................................................................................................................157 LSDVTR ..........................................................................................................................169 LSLIM ..............................................................................................................................185 LSMID .............................................................................................................................188 LSNAND..........................................................................................................................191 LSNDE ............................................................................................................................193 LSNOR............................................................................................................................195 LSNOT ............................................................................................................................197 LSOFFD ..........................................................................................................................198 LSOND............................................................................................................................200 LSOR...............................................................................................................................202 LSPDE.............................................................................................................................204 LSRET.............................................................................................................................206 LSRS...............................................................................................................................208 LSSEQ ............................................................................................................................210 LSSR ...............................................................................................................................215 LSSTD.............................................................................................................................217 LSTP ...............................................................................................................................226 LSXNOR..........................................................................................................................228 LSXOR ............................................................................................................................229 SIS connector algorithm table .........................................................................................230 SECPARAM ....................................................................................................................231 SECPARAMREF.............................................................................................................232 GSECPARAMREF ..........................................................................................................233 NONSECPARAM ............................................................................................................234 Connecting SIS sheets....................................................................................................235 Secured algorithm parameters........................................................................................236 Nonsecured algorithm parameters..................................................................................236

S E C T I O N 5

SIS Algorithms

5.1 Algorithm types

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5.1 Algorithm types

There are seven types of SIS logic algorithms:

Input/Output (I/O) algorithms – Used to reference hardware points. Math algorithms – Perform mathematical functions for conversion, integration, and totaling. Timer/Counter algorithms – Perform timing and counting functions for control and

sequencing. Logical algorithms – Perform logic functions for sequencing, scheduling, and interlocking. Analog Control algorithms – Perform simple and complex algorithms for comprehensive

analog control. Energy Metering algorithms – Perform mathematical flow calculations for natural gasses,

steam, and other fluids. Advanced Control algorithms – Perform complex algorithms for advanced process control.

5.2 Using algorithm reference pages

Algorithm reference pages are provided for each algorithm in this manual. These pages are alphabetized and provide the following information about each algorithm (where applicable):

Description - Describes the algorithm's operation. Invalid Real Numbers and Quality - Describes how quality is set. Functional Symbol - Illustrates (in pictorial form) the algorithm's operation. Refer to

Algorithm functional symbols (see page 71). Algorithm Record Type (if required) - Defines the type and size of the record generated for

storing parameters and other information necessary to the algorithm. (See Ovation Record Types Reference Manual.)

Algorithm Definitions - Provides the following information on the algorithm: Names of the parameters used.

Algorithm record field used by each tuning constant or data initialization parameter; also, the type of entry required in this field (integer, byte, or real).

Parameter types such as those described below:

Variable = Input or output signal to the algorithm (that is, analog or digital).

Tuning Constant = Fixed parameter that remains constant unless it is changed by the user at the Operator's Station or Control Builder.

Data Initialization Parameter = Fixed constant that cannot be changed by the user at the Operator's Station but can be changed by the Control Builder.

Selectable = can be either a Tuning constant in an algorithm record field or a point record.

Reconcilable Constant = parameter can be tuned and reconciled through a special, project-specific diagram.

Algorithm Initialization = internal parameter that is exposed by the algorithm.

Definition of whether the parameter is required or optional.

If the parameter is optional and not initialized by the user, it defaults to zero.

If there are input points to the algorithm that are optional and not initialized by the user, they have a value of zero for analog points and FALSE for digital inputs.

5.2 Using algorithm reference pages

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Default value (if applicable).

Brief description of the parameter.

Minimum point record required by each variable.

Each algorithm defines the minimum size point record that can be used for each algorithm input or output.

The quality of the points is set BAD when a detectable hardware failure is encountered. This information can be used in control strategies or for alarming purposes by detecting BAD quality using the QUALITYMON series of algorithms.

Function - Explains the algorithm's operation in terms of a mathematical equation. Application Example - Provides an example to demonstrate the use of the algorithm. Miscellaneous Sections - applicable to a specific algorithm only.

5.2.1 Algorithm functional symbols

The following items are used in the algorithm functional symbols:

Required Analog (LA record type) input or output (solid line and solid arrowhead).

Required Digital or Packed Digital (LD or LP record type) input or output (solid line and hollow arrowhead).

Required Algorithm (LC record type) input or output (solid line and line arrowhead).

Required Drop (DU) input or output (solid line and no arrowhead).

Optional or Selectable Analog (LA record type) input or output (dashed line and solid arrowhead).

Optional or Selectable Digital or Packed Digital (LD, LP record type) input or output (dashed line and hollow arrowhead).

5.3 Ovation SIS Logic Solver algorithm table

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Optional or Selectable Algorithm (LC record type) input or output (dashed line and line arrowhead

Optional or Selectable Drop (DU record type) input or output (dashed line and no arrowhead)

Note: Symbols portrayed in this manual only serve as an example and can be configured differently depending on the number and type of pins that are used. The Control Builder application may show various symbol configurations of the same algorithm and may not directly match what is shown in this document.


Algorithms from the SIS family are not valid in control macros or standard control functions.

The following Logic Solver algorithms are supported in Ovation SIS.

AL G O R I T HM DE S C RI P T I O N FU N C TI O N

LSAI (see page 74)

Analog Input Accesses a single analog measurement value and status from an I/O channel. The input value is a transmitter's 4 to 20 mA signal.

LSALM (see page 78)

Alarm Performs alarm detection on a user-specified input. The parameters generated can then be used to generate alarm events at the user interface.

LSAND (see page 80)

Logical AND Generates a digital output value based on the logical AND of two to 16 digital inputs. The algorithm supports signal status propagation.

LSAVTR (see page 82)

Analog Voter

Monitors a number of input values and determines if there are enough votes to trip. If a configured number of the inputs vote to trip, the algorithm trips and sets the output of the algorithm to 0 (zero).

LSBDE (see page 100)

Bi-Directional Edge Trigger

Generates a True (1) digital pulse output when the digital input makes a positive (False-to-True) or negative (True-to-False) transition since the last execution of the algorithm. The algorithm supports signal status propagation.

LSBFI (see page 102)

Boolean Fan In Generates a digital output based on the weighted binary sum, binary coded decimal (BCD) representation, or logical OR of one to 16 digital inputs. The algorithm supports signal status propagation.

LSBFO (see page 105)

Boolean Fan Out Decodes a binary weighted input to individual bits and generates a digital output value for each bit (as many as 16 outputs). The algorithm supports signal status propagation.

LSCALC (see page 107)

Calculation/Logic Allows you to specify an expression that determines the algorithm's output. Mathematical functions, logical operators, constants and parameter references can be used in the expression.


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LSCEM (see page 113)

Cause Effect Matrix (uses advanced editor)

Defines interlock and permissive logic that associates as many as 16 inputs and 16 outputs. Configure one or more inputs to trip each output. When an input becomes active, all outputs associated with that input trip.

LSCMP (see page 145)

Comparator Compares two values and sets a Boolean output based on that comparison.

LSDI (see page 147)

Digital Input Accesses a single digital measurement value and status from a two-state field device and makes the processed physical input available to other algorithms. The algorithm supports signal inversion, signal filtering, signal status propagation, and simulation.

LSDO (see page 150)

Digital Output Takes a digital input value representing the commanded output state and writes it to a specified Digital Output channel. The algorithm supports fault state detection and field device confirmation.

LSDVC (see page 157)

Digital Valve Controller

Drives a HART Two-state Output channel connected to a digital valve controller. The algorithm supports partial stroke testing, fault state detection, and field device confirmation.

LSDVTR (see page 169)

Digital Voter Monitors a number of input values and determines if there are enough votes to trip. If a configured number of the inputs vote to trip, the algorithm trips and sets the output of the algorithm to 0 (zero).

LSLIM (see page 185)

Limit Limits an input value between two reference values. The algorithm has options that set the output to a default value or the last value if the input becomes out of range.

LSMID (see page 188)

Middle Signal Selector

Selects between multiple analog signals. The algorithm selects the mid-valued input from the inputs that are not disabled and do not have Bad status. If there is an even number of inputs, the average of the two middle valued inputs is used as the middle value.

LSNAND (see page 191)

Logical NAND Generates a digital output value based on the logical AND of two to 16 digital inputs, then performs a NOT on the result. The algorithm supports signal status propagation.

LSNDE (see page 193)

Negative Edge Trigger

Generates a True (1) digital pulse output when the digital input makes a negative (True-to-False) transition since the last execution of the algorithm. The algorithm supports signal status propagation.

LSNOR (see page 195)

Logical NOR Generates a digital output value based on the logical OR of two to 16 digital inputs, then performs a NOT on the result. The algorithm supports signal status propagation.

LSNOT (see page 197)

Logical NOT Logically inverts a digital input signal and generates a digital output value. The algorithm supports signal status propagation.

LSOFFD (see page 198)

Off-Delay Timer Delays the transfer of a False (0) digital input value to the output by a specified time period. The algorithm supports signal status propagation.

LSOND (see page 200)

On-Delay Timer Delays the transfer of a True (1) digital input value to the output by a specified time period. The algorithm supports signal status propagation.

LSOR (see page 202)

Logical OR Generates a digital output value based on the logical OR of two to 16 digital inputs. The algorithm supports signal status propagation.


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LSPDE (see page 204)

Positive Edge Trigger

Generates a True (1) digital pulse output when the digital input makes a positive (False-to-True) transition since the last execution of the algorithm. The algorithm supports signal status propagation.

LSRET (see page 206)

Retentive Timer Generates a True (1) digital output after the input has been True for a specified time period. The elapsed time the input has been True and the output value are reset when the reset input is set True.

LSRS (see page 208)

Reset/Set Flip-Flop Generates a digital output value based on NOR logic of reset and set inputs.

LSSEQ (see page 210)

Sequencer (uses advanced editor)

Associates system states with actions to drive outputs based on the current state.

LSSR (see page 215)

Set/Reset Flip-Flop Generates a digital output value based on NAND logic of set and reset inputs.

LSSTD (see page 217)

State Transition Diagram (uses advanced editor)

Implements a user-defined state machine. The state machine describes the possible states, and the transitions between those states, that can occur.

LSTP (see page 226)

Timed Pulse Generates a True (1) digital output for a specified time duration when the input makes a positive (False-to-True) transition. The output remains True even when the input returns to its initial digital value and returns to its original False value only when the output is True longer than the specified time duration.

LSXNOR (see page 228)

Logical XNOR Performs a NOT on the exclusive OR of two inputs.

LSXOR (see page 229)

Logical XOR Performs an exclusive OR of two inputs to produce an output.

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5.4 LSAI

Description

The Logic Solver Analog Input (LSAI) algorithm accepts a single analog input signal from an input channel and makes it available to other algorithms.

The LSAI algorithm provides an interface to analog input devices connected to Logic Solvers that are on the same SIS Data Server. Some typical analog devices are differential pressure, flow, temperature, and level transmitters.

Analog inputs can be from conventional or HART channels. This algorithm does not use digital values from HART channels.

The LSAI algorithm does not have alarms.

Functional Symbol

5.4 LSAI

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Algorithm Execution

The LSAI algorithm accesses a single analog measurement value and status from an input channel.

The LSAI algorithm supports signal scaling and signal status calculation.

The algorithm's output parameter (OUT) reflects the process variable (PV) value and status.

When you configure the LSAI algorithm, you select the input channel associated with an analog measurement by configuring the Ovation point. You select the point and the parameter the LSAI algorithm accesses on that channel. The channel specified can be one of the 16 channels on this Logic Solver or an input channel on a Logic Solver on the same SIS Data Server.

The Ovation system cannot change the scaling in a HART device connected to a Logic Solver channel. Such changes must be done using AMS Device Manager or a handheld configurator. These changes do not propagate into the Ovation database.

Status Handling

The SOP8 (Status Opt:Bad if Limited) parameter allows you to select options for status handling and processing. The supported status options for the Analog Input algorithm are:

Bad if Limited

When this option is selected, the status of PV and OUT is Bad if the status of the referenced channel is Hi Limited or Low Limited due to exceeding the overrange, underrange, NAMUR, or sensor failure limits.

Algorithm Definitions

NAM E

LC AL G. RE C O R D F I E L D

TYP E

RE Q UI RE D/ OP TI O N AL

DE F AU L T VAL U E

DE S C RI P T I O N

MI N. POI NT RE C O R D

OUT R2 - Real Variable Required - Analog Output with Status LA

PV R3 - Real Variable Optional - Analog Output Value Only LA

FVAL R4 - Real Variable Optional - Hardware Channel Value LA

BLERR G0 - Integer Variable Optional - Block Error Status 256 - Input Failure/Bad PV

4096 - Simulate Active

LX

TPSC S1 - Real Data Init Required 100 Output Scale: Top.

This parameter is copied from the channel configuration and can't be changed in algorithm configuration.

-

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


BTSC S2 - Real Data Init Required 0 Output Scale: Bottom.

This parameter is copied from the channel configuration and can't be changed in algorithm configuration.

-

SOP8 YQ - Integer Bit 8

Data Init. Required 0 Status Opt: Bad if Limited.

This parameter is copied from the channel configuration and can't be changed in algorithm configuration. 0 - No 1 - Yes

-

5.5 LSALM

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5.5 LSALM

Description

The Logic Solver Alarm (LSALM) algorithm detects alarm conditions on an analog input you specify. Use the algorithm to generate an alarm condition that can be referenced by an alarm in the SIS module.

Functional Symbol

Algorithm Execution

Use the Alarm algorithm to detect alarm conditions for analog parameters from other algorithms. You can choose the alarm detection type (High or Low) and the alarm limit. The algorithm provides enable and delay parameters for the alarm you configure.

The following configurable parameters are available:

ADTYP - Indicates if the alarm detection type is High or Low. ALM_ENAB - Enables and disables processing for the alarm condition. The default value is

Enabled (1). When ALM_ENAB is 0 (alarm detection is disabled):

AACT is immediately forced to 0 (Inactive)

No alarm condition detection occurs.

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ADLON - Delays the time it takes for AACT to be set to Active (1) after the alarm condition is detected. If the alarm condition clears before the delay time is reached, the AACT parameter remains Inactive (0) and the timer is reset. The timer resets every time the alarm condition clears.

ADLOF - Delays the time it takes for AACT to be set to Inactive (0) after the alarm condition clears. If the alarm condition reoccurs before the delay time is reached, the AACT parameter remains Active (1) and the timer is reset. The timer resets every time the alarm condition is detected.

AENDL - The time before alarm condition processing begins immediately after the alarm is enabled (ALM_ENAB becomes True). The AACT parameter is forced to 0 for the time specified. The timer resets whenever ALM_ENAB goes from Disabled (0) to Enabled (1).

AHYS - Used as a deadband when resetting alarm conditions for analog values.

Status Handling

The algorithm does not support status. Alarm detection is performed regardless of the status of the input.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


IN R1 - Real Variable Required - Monitored Input LA

AACT X1 - Byte Variable Required - Alarm activation state. The choices are: 0 - Inactive 1 - Active

LD

ATMR R2 - Real Variable Required - Alarm Delay Timer LA

ADTYP X2 - Byte Tunable Required 1 Alarm Detection Type 0=Low 1=High

-

ALIM R3 - Real Tunable Required 0 Alarm Condition Limit -

AENCV X3 - Byte Bit 0

Tunable Required 1 Enable Alarm: Activate 0=No 1=Yes

-

ADLOF R4 - Real Tunable Required 0 Alarm Delay Off -

ADLON R5 - Real Tunable Required 0 Alarm Delay On -

AENDL R6 - Real Tunable Required 0 Alarm Enable Delay -

AHYS R7 - Real Tunable Required 0.5 Alarm Hysteresis -

TPSC R8 - Real Tunable Required 100 Input Scale: Top -

BTSC R9 - Real Tunable Required 0 Input Scale: Bottom -

SCDML X5 - Byte Tunable Required 1 Input Scale: Decimal Place

-

5.6 LSAND

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5.6 LSAND

Description

The Logic Solver AND (LSAND) algorithm generates a digital output value based on the logical AND of two to 16 digital inputs. The algorithm supports signal status propagation.

IN1 through INx are the digital input values and statuses (as many as 16 inputs).

OUT is the digital output value and status.

Functional Symbol

Algorithm Execution

The number of inputs to the LSAND algorithm is an extensible parameter. The algorithm default is two inputs. Use the Control Builder (see Ovation Control Builder User Guide) to add additional input pins.

The LSAND algorithm examines the inputs you define and applies the logical AND function to the inputs. When all inputs are True (1), the output is True. When one or more of the inputs is False (0), the output is False.

Status Handling

The output status is set to the worst status among the selected inputs unless at least one input is False and its status is not Bad. When this is the case, the output status is set to GoodNonCascade.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


NOFIN Y0 - Byte

--

Required 2

Number of Inputs (automatically incremented by system)

-

IN1 - Variable Required - Input 1 LD


IN3 - Variable Optional - Input 3 LD

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N















OUT - Variable Required - Output LD

5.7 LSAVTR

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5.7 LSAVTR

Description

The Logic Solver Analog Voter (LSAVTR) algorithm provides an analog voter function for safety instrumented functions. A voter algorithm monitors a number of input values and determines if there are enough votes to trip. The LSAVTR algorithm monitors as many as 16 analog inputs. If a configured number of the inputs vote to trip, the algorithm trips and sets the output of the algorithm to 0 (zero).

For example, a process shutdown might be required if a tank exceeds a certain temperature. Three temperature sensors are installed in the tank and an analog voter algorithm is configured to monitor the sensors and trip if two of the three transmitters detect a high temperature.

Because the Logic Solver is a De-energize to Trip system, the normal operating value of the output is 1 (On) and the tripped value is 0 (Off).

Functional Symbol

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Algorithm Execution

The LSAVTR algorithm has one or more floating-point inputs with status and one digital output with status. The algorithm compares each input to a common configured trip limit to determine whether that input is a vote to trip the output (change it from the normal operating value to the tripped value). The inputs are typically the engineering unit values from multiple field transmitters measuring the same process value.

Basic Algorithm Operation

Voting in the Analog Voter algorithm is an M out of N function or "MooN". That is, M inputs of the total N inputs must vote to trip. For example, the algorithm can be configured as a 2 out of 3 voter (2oo3), where two of the three inputs must exceed the trip limit before the output is tripped. The output of the algorithm is typically connected to an LSCEM (Cause and Effect Matrix) algorithm, which interprets the value as either a safe or dangerous process state.

The LSAVTR algorithm has three inputs by default. The number of inputs is extensible from 1 to 16. The M value corresponds to the parameter N2TRP (Votes needed to trip, default value is 2). Common voting schemes include 2 out of 3 (2oo3), 1 out of 2 (1oo2), and 2 out of 2 (2oo2). Other features of the algorithm make it useful for single transmitter applications as a 1oo1 voter.

To determine whether an input is a vote to trip, the value is compared to the limit value (TRLIM - Voted-to-Trip Limit Value). The configuration parameter DTYPE (Input Detection Type) determines whether the comparison is Greater Than (high limit) or Less Than (low limit).

In addition to trip limit detection, the algorithm also compares the inputs to a common PTLIM (Pre-Trip Limit Value) and applies voting to determine a pre-tripped condition. Pre-trip voting is typically used as a pre-alarm condition, but it is possible to expose the POUT parameter as an algorithm output so that a single voter algorithm can initiate trip demand logic for two different trip points.

A vote to trip must remain a vote to trip for a configured time (TRDLY - Trip Delay) before the output changes to tripped. When the vote to trip clears, it must remain clear for NDLY (Output Reset Delay) before the output changes to the normal state. The delays apply to both the OUT and POUT (Output of Pre-Trip Vote) outputs. The default value for both delays is 0.0 seconds. The TRSTS (Trip Status Indicator) and PSTAT (Pre-Trip/Startup Inhibit Status) parameters indicate the state of the vote to trip.

For example, the possible values for TRSTS are:

Normal - the conditions for tripping are not fulfilled. Tripped -- the conditions for tripping are fulfilled. Voted to Trip, Delayed -- transition of TRSTS can be delayed when this parameter is a

non-zero number and a transition is occurring between the tripped state. Voted Normal, Delayed -- transition of TRSTS can be delayed when this parameter is a

non-zero number and a transition is occurring between the normal state. Trip Inhibited (when applicable) -- occurs whenever a startup bypass is active or when it is

not possible to trip because there are not enough inputs participating in voting. The latter case can occur when inputs are bypassed or when inputs have bad status and the selected STATUS_OPT option is Trip inhibited.

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Startup and Maintenance Bypass Options

It is often necessary to force a voter algorithm's output to remain at the Normal value during plant startup to prevent a trip caused by inputs that have not stabilized at their normal operating values. You may also want to bypass inputs to allow for sensor maintenance. By default, you can bypass only one input of the algorithm at a time. The bypassed input cannot vote to trip.

The following sections explain how to use the BOPx options to implement startup and maintenance bypasses.

Bypassing Inputs

If you have voter algorithms with 1 out of 2 (1oo2)) or 1 out of 1 (1oo1) voting schemes you may want the ability to bypass inputs to allow for maintenance. Voters that require multiple votes to trip can benefit from bypass functions as well, resulting in more predictable behavior during transmitter maintenance. Default algorithm behavior requires that BPERM (Permit Input Bypass) be true to bypass inputs. You can configure BPERM to be set by a display button or physical switch (digital input to the SIS module).

If your application does not require permission before inputs can be bypassed, you can select the BOPTx option "Bypass Opt: PermitNotReq" (Bypass permit is not required to bypass).

Reducing the Number to Trip

By default, an algorithm configured as an M out of N voter becomes an M out of (N-1) algorithm (a 2 out of 3 voter becomes a 2 out of 2 voter) when an input is bypassed because the bypassed input cannot vote to trip. Selecting the BOPTx option "Bypass Opt: MaintBypRed" (A maintenance bypass reduces the number to trip) causes an M out of N voter to become an (M-1) out of (N-1) voter (reduces the number required to trip by one when an input is bypassed).

The following table shows the effect the BOPTx option "Bypass Opt: MaintBypRed" has on the actual number to trip (ANTRP) for several voting schemes. Note that in no case is ANTRP less than one.

BOPTX OP TI O N - A M AI N T E N AN C E B Y P AS S R E D U C E S T H E N UM BE R T O T RI P.

CO N FI G U RE D VO TI N G SC H E M E

TH E O P TI O N I S N O T S E LE CT E D. (US E S CO N FI G U R E D N2TRP)

TH E O P TI O N I S S E L E C TE D. (RE D U CE S ANTRP)

2 out of 3 2 out of 2 1 out of 2

2 out of 2 Trip Inhibited 1 out of 1


1 out of 1 Trip Inhibited Trip Inhibited



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Allowing Multiple Bypasses

If your application requires, you can enable bypassing multiple inputs simultaneously by selecting the BOPTx option "Bypass Opt: MulBypAllowed" (Multiple maintenance bypasses are allowed).

If multiple bypasses are set, deselecting the BOPTx option "Bypass Opt: MulBypAllowed" prevents further bypasses being set but existing bypasses remain set. Additional bypasses cannot be set until all existing bypasses are cleared.

Maintenance Bypass Timeout

You can configure a maintenance bypass to be active for a finite time using BTOUT (Input Bypass Reset Timeout). Its default value is 0.0 seconds, which means no timeout is applied (maintenance bypasses remain active until BYPx (Voting Bypass for Input x) parameters become False, either by changing True BYPx parameters to False or changing BPERM to False).

When BTOUT is non-zero, BTMR (Bypass Countdown Timer) is preset to BTOUT seconds when the first BYPx parameter becomes True (not when BPERM becomes True). Each module scan thereafter BTMR is decremented until it times out (unless all BYPx parameters become False, in which case the algorithm resets BTMR to 0.0).

BTMR is common to all inputs. The value of BTMR does not change when a second BYPx parameter is changed to True (if multiple bypasses are allowed). When BTMR times out, the algorithm default behavior changes all True BYPx parameters to False. If you use bypass timeouts, do not expose BYPx parameters as algorithm inputs and connect to them. Doing so will prevent the algorithm from removing bypasses upon timeout. If you need to manipulate BYPx parameters from SIS module logic, use an LSCALC algorithm to conditionally assign them.

Optionally, you can use the bypass timer for indication only by selecting the BOPx option "Maintenance bypass timeout is for indication only." This causes the timeout of BTMR to activate a notification alarm (AALRT Expiration Reminder), but does not undo bypasses.

Bypass Timeout Reminder

You can configure the algorithm to remind operators that a bypass timeout is imminent. By default, the algorithm does not notify. There are two ways you can cause a notification:

For bypasses with a configured timeout, you can cause notification in advance of the timeout by setting RMTIM (Reminder Alarm Duration) to a non-zero value. When BTMR is non-zero but less than or equal to RMTIM, the alarm condition (AALRT Expiration Reminder) is active. The bypass timer is re-armed only after the first bypass. However, BTMR is a writeable parameter. After notification that a timeout is about to happen, BTMR can be incremented using a display button or some other suitable technique to extend the time.

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A second approach is available when you are using the bypass timeout for indication only, that is, bypasses are not removed when BTMR expires (the BOPx option "Maintenance bypass timeout is for indication only" is selected). In this case the reminder alarm condition becomes active when BTMR times out even if RMTIM is 0.0. If RMTIM is non-zero, the reminder occurs prior to timeout. If BTMR times out, the reminder is active and remains active until all bypasses have been removed.

The following table describes the behavior of the bypass timeout and reminder function for three different configuration setups.

BTOUT AN D BOPX CO N FI G U R AT I O N

CO N DI T I O N

BTOUT = 0.0 (NO T I M EO U T)

BTOUT > 0.0 AN D BOPX OP T I ON "MAI N T E N AN C E B Y P AS S T I M EO U T I S FO R I N DI C AT I O N O N L Y" I S NO T S E LE C T E D (BYPX R EM OV E D O N T I M EO U T)

BTOUT > 0.0 AN D BOPX O P T I O N "MAI N T E N AN C E B Y P AS S T I M EO U T I S FO R I N DI C AT I O N O N L Y" I S S E LE C T E D (T IM EO U T F O R I N DI C AT I O N O N L Y)

BPERM changes to True.

BTMR stays 0.0 BTMR stays 0.0 BTMR stays 0.0

First input is bypassed (BYPx changes to True)

BTMR stays 0.0 BTMR = BTOUT seconds and begins timing down.

BTMR = BTOUT seconds and begins timing down.

Second input is bypassed (assuming the BOPx option "Multiple maintenance bypasses are allowed" is selected).

BTMR stays 0.0 BTMR continues timing down.

BTMR continues timing down.

BTMR > RMTIM N/A No reminder No reminder

BTMR <= RMTIM No reminder Reminder alarm condition is active.

Reminder alarm condition is active.

Bypass timer times out

N/A The algorithm changes all BYPx parameters to False. Reminder alarm condition clears on the following scan.

Reminder alarm condition remains active until all bypasses are removed manually.

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Startup Bypass Trip Inhibit

It is often necessary to force a voter algorithm's output to remain at the Normal value during plant startup to prevent a trip caused by inputs that have not stabilized at their normal operating values. This startup bypass allows the process to reach normal operating conditions without tripping. Use the STUP (Inhibit Startup Trip Detection) parameter and associated parameters for startup bypasses. Do not use maintenance overrides for this purpose.

Timed Startup Bypass (the BOPx option Startup bypass duration is event-based is not selected)

On a rising edge of the STUP parameter the algorithm forces OUT and POUT to the normal state value for a configurable length of time defined by SUTM (Startup Inhibit Duration). When the countdown timer SUTMR (Startup Inhibit Timer) times out, the algorithm resumes normal trip detection. The default behavior of the algorithm is such that a subsequent rising edge of STUP does not affect the startup time while SUTMR is timing down. To avoid a pending trip on timeout, you can allow each rising edge of STUP to re-arm SUTMR (by selecting the BOPx option "Startup bypass preset is allowed while active").

A reminder becomes available to STUP bypasses by selecting the BOPx option "Reminder applies to startup bypass." When SUTMR is greater than 0.0 but less than RMTIM, the reminder alarm condition (AALRT Expiration Reminder) is active. The reminder alarm condition is common to the timeout of maintenance and startup bypasses.

Another option is to have the startup timer expire when inputs have stabilized, that is, when there have not been enough votes to trip for a configurable period of time. When the BOPx option "Startup bypass expires upon stabilization" is selected, the bypass timer expires when the process stabilizes. While SUTMR is timing down, STMR times out whenever there are not enough votes to trip and resets whenever the trip votes equal or exceed the number required to trip.

If STMR reaches the configured STM, SUTMR resets to 0.0 and normal trip detection resumes. While SUTMR is timing down, the algorithm increments T2STB (Time to Stable) and stops as soon as the STMR is triggered. T2STB (Time to Stable) indicates the total number of seconds during the startup bypass until the inputs become and remain stable (assuming SUTM is sufficiently long).

STMR does not reset at the end of the startup time period, but is reset at the beginning of a startup and at any time during the startup when there are enough trip votes. T2STB is reset at the beginning of a startup bypass. STMR and T2STB are processed even when the stabilization option is not used (the BOPx option "Startup bypass expires upon stabilization" is not selected). You can use the value of T2STB to optimize the configured SUTM.

Event-Based Startup Bypass (the BOPx option Startup bypass duration is event-based is selected)

When the startup bypass expires based on an event rather than a fixed time period, select the BOPx option "Startup bypass duration is event based." This ends the startup bypass when the parameter STUP becomes False. STMR and T2STB are not processed. They are set to 0.0 when STUP becomes True.

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Bypass Permit Control

You can use the BOPx option "Bypass permit control should be visible in operator interface" to control the visibility of a button on a graphic representing this algorithm. Operators can use this button to set the BPERM parameter. Do not select this option if logic in the SIS module is writing to BPERM (for example, a keyswitch is used to permit bypassing).

The following table summarizes the BOPx options and their effects.

BOPx parameter options

OP TI O N

BE H AV I O R WH E N OP TI O N I S S E T TO 1 (TRU E)

BE H AV I O R WH E N OP TI O N I S S ET T O 0 (FAL S E)

A maintenance bypass reduces the number to trip. (BOP1 - MaintBypRed)

An M out of N voter becomes an (M-1) out of (N-1) voter (number required to trip by is reduced by one) when an input is bypassed.

An M out of N voter becomes an M out of (N-1) voter when an input is bypassed.

Multiple maintenance bypasses are allowed. (BOP2 - MulBypAllowed)

You can bypass multiple inputs at the same time.

Only one input can be bypassed at a time.

Maintenance bypass timeout is for indication only. (BOP3 - IndicateOnly)

When BTMR times out AALRT Bypass Active remains set and input bypasses remain in effect.

When BTMR times out, AALRT Bypass Active clears and all bypasses are cleared.

Startup bypass preset is allowed while active. (BOP4 - ReArmAllowed)

Each time STUP is set to True, SUTMR is reset to the configured value of SUTM.

SUTMR is not reset.

Startup bypass expires upon stabilization. (BOP5 - BypExpires)

Startup bypass and SUTMR clear if STMR reaches STM (after there are not enough votes to trip for the configured amount of time).

Startup bypass ends when SUTMR reaches 0 (zero).

Reminder applies to startup bypass. (BOP6 - ReminderApplies)

When SUTMR is greater than 0.0 but less than RMTIM, the AALRT Expiration Reminder is set. The reminder alarm condition is common to maintenance and startup bypass timeouts.

AALRT Expiration Reminder does not apply to startup bypass.

Startup bypass duration is event-based. (BOP7 - BypDurEvent)

Startup bypass expires only when STUP becomes False. STMR and T2STB are not processed.

Startup bypass is time based.

Bypass permit is not required to bypass. (BOP8 - PermitNotReq)

BPERM does not need to be set to True for inputs to be bypassed.

BPERM must be set to True for inputs to be bypassed.

Bypass permit control should be visible in operator interface. (BOP9 - BypPerVisible)

Bypass permit controls appear in the standard LSAVTR faceplate. Do not select this option if SIS module logic writes to BPERM (for example, bypass permitting is done using a keyswitch).

Bypass permit controls do not appear in the standard LSAVTR faceplate.

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Status Handling

The status of the inputs influences algorithm behavior based on how the SOPT (Status Options if Bad input) parameter is configured. The three choices of SOPT are:

Always Use Value — The value of the input is always used regardless of status. In this way a hardware failure does not necessarily cause a shutdown and time is allowed for repair. Detected hardware failures are indicated by standard alarms on the Logic Solver card. This is the default option.

Will Not Vote if Bad — The input value is not counted as a vote to trip if its status is Bad. Vote to Trip if Bad — The input value is counted as a vote to trip if the input status is Bad.

The following table shows how several common voting schemes degrade when a single input has bad status based on the option chosen for SOPT.

RE S U L TI NG VO TI N G SC H E M E F O R SOPT VAL U E S

ORI GI N AL VOTI NG SC H E M E

AL W AY S US E VAL U E1 WI L L NO T VO T E I F BAD VO T E TO TRI P I F

BAD

2 out of 3 2 out of 3 or 1 out of 2 2 out of 2 1 out of 2

2 out of 2 2 out of 2 or 1 out of 1 Will Not Vote if Bad 1 out of 1

1 out of 2 1 out of 2 or Tripped 1 out of 1 Tripped

1 out of 1 1 out of 1 or Tripped Trip Inhibited Tripped

1. The degraded voting scheme depends on the value of the input with Bad status.

5.7 LSAVTR

90 OW331_47

The LSAVTR algorithm determines the status of OUT and POUT in the same way no matter which status option is chosen. The status calculation is completely separate from the value calculation.

The status of OUT and POUT is Good if the number of non-bypassed inputs with Good status is greater than or equal to ANTRP (Actual Votes Needed to Trip), or all inputs are bypassed; otherwise, the status is Bad. Uncertain status on inputs is treated as Good.

When any input has Bad status, the AALRT Input Bad becomes active.

TRSTS and PSTAT Indication

The TRSTS parameter indicates the state of the trip vote functions. The typical value for TRSTS is Normal, and less commonly, Tripped. As shown in the following figure, TRSTS can be delayed when TRDLY or NDLY is non-zero and a transition is occurring between normal and tripped states.

A fifth state, Trip Inhibited, occurs whenever a startup bypass is active or when it is not possible to trip because there are not enough inputs participating in voting. The latter case can occur when inputs are bypassed or when inputs have bad status and the selected SOPT option is Trip inhibited.

The solid lines in the figure show the common state transitions of TRSTS expected as the process value moves above and below the trip point. The dashed lines show less common state transitions.

Figure 31: State diagram for TRSTS

5.7 LSAVTR

OW331_47 91


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


AUX1 G3 - SID Data Init. Required - Auxiliary record 1 LC

NOFIN Y0 - Byte -- Required 1 Number of Inputs (automatically incremented by system).

-

IN1 R1 - Real Variable Required - Input 1 LD

IN2 R2 - Real Variable Optional - Input 2 LD








IN10 S1 - Real Variable Optional - Input 10 LD







OUT X1 - Byte Variable Required - Output LD

PVN1 G4 - Integer Bit 0

Variable Optional - Pre-Trip Check Status Input 1

LD



LD



LD



LD



LD



LD



LD

5.7 LSAVTR

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N




LD



LD



LD



LD



LD



LD



LD



LD



LD

PVOT X6 - Byte Variable Optional - Num of Inputs Voted to Pre-Trip

LA

PDTMR AUX1:R1 - Real

Variable Optional - Countdown Timer for Pre-Delay

LA

POUT X7 - Byte Variable Optional - Output of Pre-Trip Vote

LD

PSTAT X8 - Byte Variable Optional - Pre-Trip/Startup Inhibit Status

LA

TVN1 G5 - Integer Bit 0

Variable Optional - Voted-to-Trip Status Input 1

LD



LD



LD



LD



LD



LD



LD



LD

5.7 LSAVTR

OW331_47 93

NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N




LD



LD



LD



LD



LD



LD



LD



LD

TRPVT X9 - Byte Variable Optional - Num of Inputs Voted-to-Trip

LA

TRSTS Y2 - Byte Variable Optional - Trip Status Indicator. The choices are: 0 = Normal 1 = Tripped 2 = Trip inhibited 3 = Voted to Trip, Delayed

Voted Normal, Delayed

See explanation given above.

LA

T2STB AUX1:R2 - Real

Variable Optional - Time to Stable in seconds.

LA

SUTMR AUX1:R3 - Real

Variable Optional - Startup Inhibit Timer in seconds.

LA

STMR AUX:R4 - Real

Variable Optional - Startup No-Vote-to-Trip Timer in seconds.

LA

OUTNB Y4 - Byte Variable Optional - Output with No Bypass

LD

DLYTM AUX1:R5 - Real

Variable Optional - Countdown Timer for Delay in seconds.

LA

BTMRH AUX1:R6 - Real

Variable Optional - Bypass Countdown Timer (hrs)

LA

AALRT G6 - Integer Variable Optional - Alarms Conditions Set by algorithm

LX

5.7 LSAVTR

94 OW331_47

NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


ANTRP Y3 - Byte Variable Optional - Actual Votes Needed to Trip

LA

BYP1 C0 - Integer Selectable Optional 0 Voting Bypass for Input 1 0=No 1=Yes

-


-


-


-


-


-


-


-


-

BYP10 YT - Integer Selectable Optional 0 Voting Bypass for Input 10 0=No 1=Yes

-

BYP11 D0 - Integer Selectable Optional 0 Voting Bypass for Input 11 0=No 1=Yes

-

5.7 LSAVTR

OW331_47 95

NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


BYP12 YQ - Integer

Selectable Optional 0 Voting Bypass for Input 12 0=No 1=Yes

-


-

BYP14 YP - Integer Selectable Optional 0 Voting Bypass for Input 14 0=No 1=Yes

-


-


-

BOP1 G0 - Integer Bit 0

Tunable Required 0 Bypass Opt: MaintBypRed 0=False 1=True

-


Tunable Required 0 Bypass Opt: MulBypAllowed 0=False 1=True

-


Tunable Required 0 Bypass Opt: IndicateOnly 0=False 1=True

-


Tunable Required 0 Bypass Opt: ReArmAllowed 0=False 1=True

-


Tunable Required 0 Bypass Opt: BypExpires 0=False 1=True

-


Tunable Required 0 Bypass Opt: ReminderApplies 0=False 1=True

-


Tunable Required 0 Bypass Opt: BypDurEvent 0=False 1=True

-

5.7 LSAVTR

96 OW331_47

NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Tunable Required 0 Bypass Opt: PermitNotReq 0=False 1=True

-


Tunable Required 0 Bypass Opt: BypPerVisible 0=False 1=True

-

BPERM X2 - Byte Tunable Required 0 Permit Input Bypass 0=No 1=Yes

-

BTOUT S8 - Real Tunable Required 0.0 Input Bypass Reset Timeout (sec)

-

BTMR S9 - Real Alg Init Required 0.0 Bypass Countdown Timer (sec)

-

DTYPE X3 - Byte Tunable Required 1 Input Detection Type 1=GreaterThan 2=LessThan

-

DVHYS T1 - Real Tunable Required 0 Input Range Limit Deadband

-

DVLIM T2 - Real Tunable Required 0 Input Value Range Limit

-

TPSC T3 - Real Tunable Required 100 Input Scale: Top -

BTSC T4 - Real Tunable Required 0.0 Input Scale: Bottom -

SCDML Y5 - Byte Tunable Required 1 Input Scale: Decimal Places

-

NDLY T5 - Real Tunable Required 0 Output Reset Delay (sec)

-

N2TRP X4 - Byte Tunable Required 2 Votes Needed to Trip -

PTLIM T6 - Real Tunable Required 80 Pre-Trip Limit Value -

RMTIM T7 - Real Tunable Required 0 Reminder Alarm Duration (sec)

-

ROP1 G1 - Integer Bit 0

Tunable Required 0 Report Opt: NoRollUp 0=False 1=True

-


Tunable Required 0 Report Opt: NoEventRecords 0=False 1=True

-

STM T8 - Real Tunable Required 0 Process Stabilization Time (sec)

-

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


STUP X5 - Byte Tunable Required 0 Inhibit Startup Trip Detection 0=No 1=Yes

-

SUTM T9 - Real Tunable Required 0 Startup Inhibit Duration (sec)

-

SOPT G2 - Integer Tunable Required 0 Status Options if Bad Input 0=Always Use Value 1=Will Not Vote if Bad 2=Vote to Trip if Bad

-

TRDLY U1 - Real Tunable Required 0 Trip Delay (sec) -

TRHYS U2 - Real Tunable Required 0.5 Trip Limit Deadband -

TRLIM U3 - Real Tunable Required 90 Voted-to-Trip Limit Value

-

DI1 - Data Init. Optional VOTER1 Description of Voter 1.

For Control Builder/Signal Diagram application use only.

-



-



-



-



-



-

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N




-



-



-



-



-



-



-



-

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N




-



-

AALRT

The following table shows the alerts that can appear for an LSAVTR algorithm, an explanation of each alert and the bit position of each alert.

BI T VAL U E

EX P L AN AT I O N

BI T PO SI T I O N

Trip Active Inactive when OUT is in the normal operating state, active when OUT is in the trip state.

0

Pre-Trip Active Inactive when POUTD is in the normal operating state, active when POUT is in the trip state.

1

Bypass Active Active when there is a maintenance bypass on any input (any BYPx parameter is True).

2

Startup Override Active Active whenever the startup bypass is active. 3

Deviation Limit Exceeded Active when the difference between the highest and lowest non-bypassed INn value exceeds DVLIM. Forced inactive when DVLIM is 0.0.

4

Expiration Reminder Active when either a maintenance bypass or a startup bypass is about to expire.

5

Bypassed Input Pre-Tripped Active if one or more bypassed inputs have exceeded the pre-trip limit.

6

Bypassed Input Tripped Active if one or more bypassed inputs have exceeded the trip limit.

7

Input Bad Active if any input has bad status. 8

5.8 LSBDE

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5.8 LSBDE

Description

The LSBDE algorithm generates a True (1) digital output when the digital input makes a positive (False-to-True) or a negative (True-to-False) transition since the last execution of the algorithm. If there has been no transition, the digital output of the algorithm is False (0).

The LSBDE algorithm supports signal status propagation.

IN is the digital input signal and status.

OUT is the digital output signal and status.

Functional Symbol

Algorithm Execution

The Bi-directional Edge Trigger algorithm examines the input value, compares it to the previous input value, and sets the output True for one scan period when the input has changed. Otherwise, the output is False. The status of the output value is set to the status of the input value.

The following figure illustrates how the Bi-directional Edge Trigger algorithm responds to a change in input:

Figure 32: LSBDE algorithm execution example

5.8 LSBDE

OW331_47 101

Status Handling

The output status is set to the input status.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


IN - Variable Required - Input LD


5.9 LSBFI

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5.9 LSBFI

Description

The Logic Solver Boolean Fan Input (LSBFI) algorithm generates a digital output based on the weighted binary sum, binary coded decimal (BCD) representation, transition state, or logical OR of one to 16 digital inputs. The algorithm supports signal status propagation.

RST (Reset First Weighted Output) is the input that, when True (1), clears FOUT (First Binary Weighted Output) and activates the trap condition after all the inputs go False.


OUTI is the unsigned 32-bit binary weighted output value that represents the bit combination of the inputs (INx).

OUT is the output value that represents the logical OR of the inputs (INx).

FOUT is the binary weighted output of the digital input values when one or more inputs is set after RST is set.

Functional Symbol

5.9 LSBFI

OW331_47 103

Algorithm Execution

The Boolean Fan Input algorithm examines the digital input values at each algorithm execution. The OUTI output is set to the sum of the bit values of the True inputs (IN1 is weighted as 1, IN2 as 2, IN3 as 4, IN4 as 8, and so on). The status of OUTI is set to the worst status among the inputs.

When FOUT indicates a trap has not yet occurred (its value is False[0]) and one or more of the inputs have become True, a trap condition is flagged and held by copying the value of OUTI to FOUT. Thereafter, the FOUT value updates when the INx values transition from all False (0) to one or more True (1). The status of FOUT is equal to the status of OUTI when the trap occurred. The value of OUT is the logical OR of the digital inputs. OUT status is set to the worst status among the inputs.

Note: Once the FOUT output is reset, the Boolean Fan Input algorithm does not set it again until all of the INx values return to the False (0) state.

To support thumbwheel switch interfaces, the Boolean Fan Input algorithm uses a parameter to store the binary coded decimal (BCD) representation of the digital inputs. The first four digital inputs are used to construct the BCD ones digit. (Within these first four bits, the first input is the least-significant bit.) The remaining sets of four inputs indicate the BCD tens, hundreds, and thousands digits. When the four bits representing a digit are greater than nine, the digit is limited to nine.

The following figure is an example of Boolean Fan Input algorithm execution for OUTI = 5510. The result is BCD = 1586 and OUT = True.

Figure 33: LSBFI algorithm execution example

Status Handling

The OUTI and OUT statuses are set to the worst status among the inputs. The FOUT status is the worst status among the inputs when the FOUT value is written. The FOUT status is reset when the FOUT value is cleared.

5.9 LSBFI

104 OW331_47


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


NOFIN Y0 - Byte

--

Required 2

Number of Inputs (automatically incremented by system)

-

















RST - Variable Required - Reset First Weighted Output LD

FOUT - Variable Required - First Binary Weighted Output LA

BCD - Variable Optional - BCD Representation of Inputs LA

OUT - Variable Optional - Logical Output LD

OUTI - Variable Optional - Binary Weighted Output

LA

ATRAP X1 - Byte Tunable Required 1 Enable First-Out Trap 0=No 1=Yes

-

5.10 LSBFO

OW331_47 105

5.10 LSBFO

Description

The Logic Solver Boolean Fan Output (LSBFO) algorithm decodes a binary weighted input to individual bits and generates a digital output value for each bit. The algorithm supports signal status propagation.

IN is the unsigned 32-bit binary weighted input value and status.

OUT1 through OUTx are the digital output values and statuses (as many as 16 outputs) that represent the bit of the input.

Functional Symbol

Algorithm Execution

The number of outputs to the LSBFO algorithm is an extensible parameter. The algorithm default is two outputs. Use the Control Builder (see Ovation Control Builder User Guide) to add additional output pins.

The LSBFO algorithm treats the unsigned 32-bit input as a binary weighted value. The individual bits that comprise this value are translated to the algorithm's digital outputs.

The first digital output represents the least-significant bit of the translated input value. The second digital output is the next least-significant bit, and so on. The status of the input (IN) is passed to the statuses of the digital outputs (OUTx).

The following is an example of Boolean Fan Output algorithm execution for IN = 5153.

5.10 LSBFO

106 OW331_47

Status Handling

The statuses of the algorithm outputs (OUTx) are set equal to the status of the algorithm input (IN).


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


NOFOT Y0 - Byte Data Init Required 2 Number of Outputs -

IN - Variable Required - Binary Weighted Input

LA, LD, LP

OUT1 - Variable Optional - Output 1 LD
















5.11 LSCALC

OW331_47 107

5.11 LSCALC

Description

The Logic Solver Calculation/Logic (LSCALC) algorithm evaluates an expression you define to determine the algorithm's outputs. You can use mathematical functions, logical operators, constants, and parameter references in the expression.

IN1 through INx are the inputs to the algorithm (as many as 16 inputs).

OUT1 through OUTx are the algorithm outputs (as many as 16 outputs).

Functional Symbol

5.11 LSCALC

108 OW331_47

Algorithm Execution

The LSCALC algorithm uses as many as 16 inputs and 16 outputs to evaluate its contained expression. In addition, the expression evaluator uses constants and module parameter references that you specify to evaluate the expression. Expressions can only reference parameters that are internal to the SIS module in which the LSCALC block is located. External references from LSCALC algorithm expressions are not allowed. The calculated values are assigned to internal module references or algorithm outputs for use as parameters or inputs to the control strategy in other algorithms.

Expressions

Expressions are structured text in a specific syntax and are made up of operands, operators, functions, constants, and keywords. You write expressions using the LSCALC editor window (see Ovation Control Builder User Guide).

Note: The values of temporary variables in expressions are not preserved on download or restored on restart. Temporary variables start with a value of 0 (zero) on the first scan after a download or restart.

Status Handling

The algorithm's outputs are initialized to Bad. You must explicitly set the status of outputs by writing to the .ST field of an OUTx parameter. The .ST field is not automatically written when the .CV field of an OUTx parameter is written.

If the LSCALC algorithm executes a divide by zero expression, the only effect is that status of the output is set to BAD.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


AUX1 G1 - SID Data Init Required - Auxilary record 1 LC

NOFIN X1 - Byte Data Init. Required 1 Number of Inputs (automatically incremented by system)

-

NOFOT Y0 - Byte Data Init Required 1 Number of Outputs -

LCKD - Data Init. Required 0 Program Edits: 0 = Unlocked 1 = Locked

-

NOANL - Data Init. Required 0 Number of analog constants

-

AC01 - Data Init. Required 0.000000 Analog Constant 1 $(AC1)

-


-


-

5.11 LSCALC

OW331_47 109

NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



-


-


-


-


-


-


-


-


-


-


-


-


-

NODIG - Data Init. Required 0 Number of digital constants

-

DC01 - Data Init. Required 0 Digital Constant 1 $(DC1) 0 = False 1 = True

-


-


-


-

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



-


-


-


-


-


-


-


-


-


-


-

5.11 LSCALC

OW331_47 111

NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



-

IN1 R1 - Real Variable Optional - Input 1 LX









IN10 S1 - Real Variable Optional - Input 9 LX







OUT1 AUX1:R1 - Real Variable Required - Output 1 LA

OUT2 AUX1:R2 - Real Variable Optional - Output 2 LA








OUT10 AUX1:S1 - Real Variable Optional - Output 10 LA







5.11 LSCALC

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


BLERR G0 - Integer Variable Optional - Block Error Status

32 = Memory Failure 64 = Output Failure8192 = Config. Error

LA, LD, LP

5.12 LSCEM

OW331_47 113

5.12 LSCEM

Description

Use the Logic Solver Cause and Effect Matrix (LSCEM) algorithm to define interlock and permissive logic that associates as many as 16 inputs (CSx Input Cause parameters) and 16 outputs (EFFx Output Effect parameters). Use the algorithm's MATRX parameter to identify one or more causes that cause each effect to trip. When a CSx becomes active, all effects associated with that CSx also trip.

An LSCEM algorithm provides the logic for one or more safety instrumented functions (SIF). CSx inputs are typically connected from upstream voter algorithms, but may come from any source indicating either an active (0) or inactive (1) process trip condition. The EFFx outputs are typically connected to downstream output algorithms.

Because the Logic Solver is a de-energize to trip environment, the Normal operating value of EFFx parameters is 1 and the Tripped value is 0.

By default, the algorithm has four CSx inputs and one EFFx output. In addition, you can use the DCx and DEx parameters to label causes and effects.

Functional Symbol

5.12 LSCEM

114 OW331_47

Algorithm Execution

Each EFFx output has a corresponding STAx (Current State of Effect) parameter. EFFx can be either 1 (Normal) or 0 (Tripped). STAx can have one of six values shown in the following figure. The arrows in the figure show the possible transitions between state values during normal operation.

Figure 34: State Transition diagram for STAx parameters

The values of STAx depend on whether EFFx is Tripped or Normal. The following table shows the combinations that can occur.

EFFX STAX

Normal Normal

Trip Initiated-Delayed

Tripped

Waiting for Reset Permit

Ready to Reset

Tripped

Waiting to Start Permit

5.12 LSCEM

OW331_47 115

After an initial download or a restart of the Logic Solver, the initial value of every EFFx is Tripped. An effect remains Tripped as long as any causes associated with that effect are tripped. After all associated causes clear the effect become Normal.

The default behavior of the algorithm is for EFFx output values to be a function of the value and status of the CSx inputs. EFFx Trips when one or more CSx associated with it is active.

You can modify this behavior with the LSCEM algorithm's parameters in a number of ways:

Use DTMx (Trip Delay for Effect) to set a delay time for EFFx to transition to Tripped. Use RPTx (Reset Permit) to require an operator reset to transition EFFx to Normal. RPTx can

be set from process feedback or it could be a manual operator reset, such as from a key switch.

Use SPTx (Start Permit) to force STAx to Waiting for Start Permit, which prevents EFFx from becoming Normal unless SPTx is True.

Use FPRMT (Permit Force Effects) to allow forcing of effects. Use FOPx (Force Option) to allow forcing effects without FPRMT being True. Use FOPx to allow forcing multiple effects simultaneously. Use FEFx (Force Effect) to set EFFx to Tripped or Normal.

Note: Emerson recommends that you use the FEFx parameters to manipulate final elements only when the process is not running.

Use CMASK (Cause Mask) to prevent selected causes from becoming active.

If all you require is simple, time-based sequencing, use DTMx (Trip Delay for Effect) to prevent EFFx from going directly to Tripped when an associated cause becomes inactive. While DTMx is greater than 0 (zero), STAx (Current State) is Trip Initiated - Delayed, which keeps EFFxNormal.

To require an operator reset before an effect can return to Normal, use RRSx (Require Reset for Effect), RPTx (Reset Permit), and RSTx (Reset). When RRSx is True, EFFx remains Tripped when an associated cause is active. How STAx transitions depends on RPTx.

If RPTx is True (the default value), STAx transitions from "Tripped directly" to "Ready to Reset." Configure RPTx to False to make STAx transition from "Tripped" to "Waiting for Reset Permit." The reset permit can be written from process feedback or set by an operator from a key switch or other hardware device. When RPTx becomes True, STAx transitions to "Ready to Reset." From here, setting RSTx to True transitions STAx and EFFx to Normal.

Use SPTx (Start Permit) in a similar way to require permission to transition STAx from "Waiting for Start Permit." The default value of SPTx is True, which allows the transition. If SPTx is False and associated causes are cleared, STAx transitions from "Tripped" to "Waiting for Start Permit." To move STAx and EFFx to Normal, set SPTx to True.

Use a combination of FPRMT, FOPx, and FEFx to force EFFx to a desired value. To force effects you must first either set FPRMT to True, or select the FOPx option "Force permit is not required to force Effects." Changing FPRMT from True to False removes current forces.

The parameter LTRIP is True when:

FPRMT is required to force an Effect (FOPx option Force permit is not required to force Effects is not selected).

ACSx (Active Causes for Effect) is non-zero. FEFx is Force Normal.

5.12 LSCEM

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If LTRIP (Latent Trip Indicator) is True, setting FPRMT to False trips Effects that have been forced to Normal.

Setting FEFx to Force Trip immediately transitions EFFx to Tripped even if DTMx is configured. Setting FEFx to Force Normal immediately transitions EFFx to Normal, regardless of any configured recovery strategy. If STAx is Trip Initiated-Delayed, setting FEFx to Force Normal returns STATEn to Normal.

You can manipulate FEFx from runtime interfaces. Manipulating FEFx from within a module is not likely to be useful. Use the FOPx option "Forcing of multiple Effects is allowed" to set whether multiple effects can be forced at the same time.

FOPx includes an additional option: Force permit control should be visible in operator interface. Select this option if your force effect control is in an operator display. Do not select this option if you are using a key switch or other manual means to force effects.

Manipulate the parameter CMASK to prevent one or more causes from becoming active under certain process conditions. Setting a bit in CMASK to True prevents the corresponding CSx from tripping any associated effects. If after an effect is tripped CMASK masks the causes that tripped that effect, STAx transitions out of Tripped. The state it transitions to depends on the configuration of the algorithm parameters FEFx, SPTx, RRSx, and RPTx. Manipulate CMASK using a Calc/Logic algorithm based on process conditions, for example, the current batch phase. Do not manipulate CMASK directly from runtime interfaces. To bypass process conditions use upstream voter algorithms instead.

The OVRx (High Priority Override) parameter indicates if EFFx is being overridden. The OVRx values are:

None. Forced to Tripped. Forced to Normal. All associated Causes masked.

ACSx indicates the currently active causes that are associated with EFFx that are not masked in CMASK. FOTx indicates the cause or causes that first tripped EFFx. If additional causes become active, FOTx does not change. FOTx retains its value until EFFx returns to Normal.

For example, if CS2 becomes active and EFF1 trips, ACS1 and FOT1 are both set to 2. If CS3 (which is also associated with EFF1) subsequently becomes active, FOT1 remains 2 and ACS1 becomes 6 (bits 2 and 3 of ACS1 are set).

The following table summarizes the state-dependant conditions necessary to transition EFFECTx value between Tripped and Normal.

ST AT E-D E P E N D E N T CO ND I T I O N S RE Q UI R E D T O TR AN S I T I O N EFFX RRSX VAL U E

FR OM TRIP PED TO NO RM AL FR OM NO RM AL T O TRI P PE D

False (All associated non-masked causes are inactive and SPTx = True) or FEFx = Force Normal

Any associated non-masked cause is active or FEFx = Force Trip or SOPT is set to Trip if Bad and any CSx status is Bad.

5.12 LSCEM

OW331_47 117

ST AT E-D E P E N D E N T CO ND I T I O N S RE Q UI R E D T O TR AN S I T I O N EFFX RRSX VAL U E

FR OM TRIP PED TO NO RM AL FR OM NO RM AL T O TRI P PE D

True (All associated non-masked causes are inactive and RPTx = True and RSTx = True and SPTx = True) or FEFx = Force Normal

Any associated non-masked cause is active or FEFx = Force Trip or SOPT is set to Trip if Bad and any CSx status is Bad.

The following descriptions and tables explain each state and the conditions necessary to transition to other allowable states. Note that the value of the RSTx parameter is set to False at the end of every execution independent of the current value of STAx.

STAx: Tripped

If STAx is Tripped, EFFx is also Tripped. STAx remains Tripped as long as one or more associated non-masked causes are active and FEFx is not Force Normal or FEFx is Force Trip.

EFFx transitions from Tripped when all the associated non-masked causes are inactive. If an operator reset is not required and SPTx is True, STAx is set to Normal. If SPTx is False, STAx moves to Waiting for Start Permit. If an operator reset is required and RPTx is True, STAx becomes Ready to Reset. If RPTx is False, STAx becomes Waiting for Reset Permit.

If FEFx is Force Normal, STAx changes to Normal regardless of the value of SPTx or RPTx.

The following table summarizes the possible changes STAx can make from Tripped.

TO TR AN S I T I O N STAX TO. . . RE Q UI RE S T HE FO L L O WI NG CO N DI T I O NS

Waiting for Reset Permit ACSx = 0 and FEFx = No Force and RRSx = True and RPTx = False

Ready to Reset ACSx = 0 and FEFx = No Force and RRSx = True and RPTx = True

Waiting for Start Permit ACSx = 0 and FEFx = No Force and RRSx = False and SPTx = False

Normal ACSx = 0 and FEFx = No Force and RRSx = False and SPTx = True or FEFx = Force Normal

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STAx: Waiting for Reset Permit

While STAx is Waiting for Reset Permit, EFFx is set to Tripped. STAx can transition to this state from Tripped or Ready to Reset if RRSx is True. If RRSx becomes False while STAx is Waiting for Reset Permit, STAx does not change until a reset occurs.

STAx changes back to Tripped if an associated non-masked cause becomes active or FEFx is Force Trip.

STAx changes to Ready to Reset if RPTx becomes True.

If FEFx is Force Normal, STAx changes to Normal regardless of the current values of SPTx and RPTx.

The following table summarizes the possible changes from Waiting for Reset Permit.


Tripped ACSx is not equal to 0 or FEFx = Force Trip or SOPT is set to Trip if Bad and any CSx status is Bad.

Ready to Reset RPTx = True

Normal FEFx = Force Normal

STAx: Ready to Reset

STAx can transition to Ready to Reset from Tripped or Waiting for Reset Permit. EFFx is Tripped when STAx is Ready to Reset.

To reach this state RRSx must be True. If RRSx becomes False while STAx is Ready to Reset, the STAx does not change until a reset occurs.

If an associated non-masked cause becomes active or FEFx is Force Trip, STAx changes to Tripped. If RPTx becomes False, STAx changes back to Waiting for Reset Permit.

If SPTx is True, the STAx changes to Normal when RSTx is True. If SPTx is False, RSTx becoming True causes STAx to change to Waiting for Start Permit.

If FEFx is Force Normal, STAx changes to Normal regardless of the values of SPTx and RSTx.

The following table summarizes the possible changes of STA,i>n from Ready to Reset.



Waiting for Reset Permit RPTx = False

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Waiting for Start Permit RSTx = True and SPTx = False

Normal (RSTx = True and SPTx = True) or FEFx = Force Normal

STAx: Waiting for Start Permit

STAx can change from Tripped or Ready to Reset to Waiting for Reset Permit. EFFx is Tripped when STAx is Waiting for Start Permit.

If an associated non-masked cause becomes active or FEFx is Force Trip, STAx changes to Tripped.

If SPTx is True, STAx changes to Normal.

If FEFx is Force Normal, STAx changes to Normal regardless of the current value of STAx.

The following table summarizes the possible changes of STAx from Waiting for Start Permit.



Normal SPTx = True or FEFx = Force Normal

STATEn: Normal

EFFx is Normal when STAx is Normal.

STAx changes when a trip is initiated, that is, when one or more non-masked causes associated with EFFx become active and FEFx is not Force Normal or FEFx is Force Trip. If EFFx is not being sequenced with other effects, STAx becomes Tripped immediately. Use DTMx to set how long to delay the transition to Tripped. If DTMx is non-zero STAx changes to Trip Initiated-Delayed. If FEFx is Force Trip, STAx becomes Tripped immediately.

The following table summarizes the possible changes from Normal.


Tripped ACSx is not equal to 0 and FEFx is not equal to Force Normal and DTMx = 0 or

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FEFx = Force Trip or SOPT is set to Trip if Bad and any CSx status is Bad.

Trip Initiated - Delayed ACSx is not equal to 0 and FEFx is not equal to Force Normal and DTMx > 0or SOPT is set to Trip if Bad and any CSx status is Bad.

STAx: Trip Initiated - Delayed

When STAxs Trip is Initiated - Delayed the trip condition has occurred, but EFFx continues to be Normal until DTMx seconds have elapsed.

The timer DTRx (Trip Delay Timer for Effect) decrements from DTMx each scan based on the algorithm's scan rate. The timer continues to count down even if no causes remain active.

When DTRx reaches zero, STAx changes to Tripped even if there are no active causes. If FEFx becomes Force Trip while DTRx is still decrementing, STAx changes immediately to Tripped.

Setting FEFx to Force Normal while DTRx is decrementing prevents EFFx from evolving to Tripped and changes STAx back to Normal.

The following table summarizes the possible changes from Trip Initiated-Delayed.


Tripped FEFx = Force Trip or DTRx = 0 or SOPT is set to Trip if Bad and any CSx status is Bad.

Normal FEFx = Force Normal

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Status Handling

The status of the CSx inputs influences algorithm behavior based on how the SOPT (Status Options if Bad Input) parameter is configured. The value of SOPT impacts the calculation of ACSx. The status of the EFFx outputs is based on the status of the associated causes and is not affected by the value of SOPT.

When SOPT is "Always Use Value" (the default option), Bad status on an associated cause has no impact on the value of ACSx. However, a sensor failure could cause an immediate shutdown as a result of the process value changing. Another option for SOPT is "Use Last Good Value if Bad," which prevents the transition of an associated cause to bad status from initiating a shutdown, because the value used to calculate ACSx is the value the last time the status was Good. This allows time for repair. The third option for SOPT is "Trip if Bad." If this option is set, a Bad status on a cause input trips any associated effect.

The status of the effect outputs is set to Bad if any unmasked associated cause has Bad status and the effect is not forced to Normal or Tripped; otherwise, it is set to GoodNonCascade NonSpecific.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


CMASK F4 - Integer Selectable Optional 0 Cause Mask LP

FPRMT X1 - Byte Selectable Optional 0 Permit Force Effects

0 - False

1 - True

LD

AUX1 G0 - SID Data Init Required - Auxiliary Record 1 LC

NOCS Y0 - Byte Data Init Required 1 Number of Causes -

NOEFF Y2 - Byte Data Init Required 1 Number of Effects -

DTM1 R1 - Real Tunable Required 0.0 Trip Delay for Effect 1 (sec) -









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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


DTM10 S1 - Real Tunable Required 0.0 Trip Delay for Effect 10 (sec) -







RRS1 X6 - Byte

Bit 0

Tunable Required 1 Require Reset for Effect 1

0 - False

1 - True

-

RRS2 X6 - Byte

Bit 1


0 - False

1 - True

-

RRS3 X6 - Byte

Bit 2


0 - False

1 - True

-

RRS4 X6 - Byte

Bit 3


0 - False

1 - True

-

RRS5 X6 - Byte

Bit 4


0 - False

1 - True

-

RRS6 X6 - Byte

Bit 5


0 - False

1 - True

-

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


RRS7 X6 - Byte

Bit 6


0 - False

1 - True

-

RRS8 X6 - Byte

Bit 7


0 - False

1 - True

-

RRS9 X7 - Byte

Bit 0


0 - False

1 - True

-

RRS10 X7 - Byte

Bit 1


0 - False

1 - True

-

RRS11 X7 - Byte

Bit 2


0 - False

1 - True

-

RRS12 X7 - Byte

Bit 3


0 - False

1 - True

-

RRS13 X7 - Byte

Bit 4


0 - False

1 - True

-

RRS14 X7 - Byte

Bit 5


0 - False

1 - True

-

RRS15 X7 - Byte

Bit 6


0 - False

1 - True

-

RRS16 X7 - Byte

Bit 7


0 - False

1 - True

-

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


FOP1 X4 - Byte

Bit 0

Tunable Required 0 Force Opt: MulForceAllowed

0 - No

1 - Yes

-

FOP2 X4 - Byte

Bit 1

Tunable Required 0 Force Opt: PermitNotReq

0 - No

1 - Yes

-

FOP3 X4 - Byte

Bit 2

Tunable Required 0 Force Opt: ForcePermitVisible

0 - No

1 - Yes

-

ROP1 X5 - Byte

Bit 0

Tunable Required 0 Report Opt: NoRollUp

0 - False

1 - True

-

ROP2 X5 - Byte

Bit 1

Tunable Required 0 Report Opt: NoEventRecords

0 - False

1 - True

-

SOPT X3 - Byte Tunable Required 3 Status Options if Bad Input

1 - Always Use Value

2 - Use Last Good Value if Bad

3 - Trip if Bad

-

CS1 X8 - Byte

Bit 0

AUX2:G0 - SID

Variable Required - Input Cause 1 LD

CS2 X8 - Byte

Bit 1

AUX2:G1 - SID

Variable Optional - Input Cause 2 LD

CS3 X8 - Byte

Bit 2

AUX2:G2 - SID


CS4 X8 - Byte

Bit 3

AUX2:G3 - SID


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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


CS5 X8 - Byte

Bit 4

AUX2:G4 - SID


CS6 X8 - Byte

Bit 5

AUX2:G5 - SID


CS7 X8 - Byte

Bit 6

AUX2:G6 - SID


CS8 X8 - Byte

Bit 7

AUX2:G7 - SID


CS9 X9 - Byte

Bit 0

AUX2:G8 - SID


CS10 X9 - Byte

Bit 1

AUX2:G9 - SID


CS11 X9 - Byte

Bit 2

AUX2:B0 - SID


CS12 X9 - Byte

Bit 3

AUX2:B1 - SID


CS13 X9 - Byte

Bit 4

AUX2:B2 - SID


CS14 X9 - Byte

Bit 5

AUX2:YU - SID


CS15 X9 - Byte

Bit 6

AUX2:B4 - SID


CS16 X9 - Byte

Bit 7

AUX2:B5 - SID


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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


EFF1 AUX1:YC - Integer

Bit 0

AUX2:B6 - SID

Variable Required - Output Effect 1 LD


Bit 1

AUX2:B7 - SID

Variable Optional - Output Effect 2 LD


Bit 2

AUX2:B8 - SID



Bit 3

AUX2:B9 - SID



Bit 4

AUX2:C0 - SID



Bit 5

AUX2:C1 - SID



Bit 6

AUX2:C2 - SID



Bit 7

AUX2:C3 - SID



Bit 8

AUX2:C4 - SID



Bit 9

AUX2:C5 - SID


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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Bit 10

AUX2:C6 - SID



Bit 11

AUX2:C7 - SID



Bit 12

AUX2:C8 - SID



Bit 13

AUX2:YT - SID



Bit 14

AUX2:D0 - SID



Bit 15

AUX2:YQ - SID


FOT1 AUX1:B6 - Integer

Variable Optional - First Causes to Trip Effect 1 LP







FOT5 AUX1:C0 - Integer








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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N












FOT14 AUX1:YT - Integer


FOT15 AUX1:D0 - Integer


FOT16 AUX1:YQ - Integer


OVR1 AUX1:E2 - Integer

Bits 0-3

Variable Optional - High Priority Override Effect 1

0 - None

3 - Forced to Trip

2 - Forced to Normal

1 - All associated Causes masked

LA


Bits 4-7


0 - None

3 - Forced to Trip



LA


Bits 8-11


0 - None

3 - Forced to Trip



LA

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Bits 12-15


0 - None

3 - Forced to Trip



LA


Bits 16-19


0 - None

3 - Forced to Trip



LA


Bits 20-23


0 - None

3 - Forced to Trip



LA


Bits 24-27


0 - None

3 - Forced to Trip



LA


Bits 28-31


0 - None

3 - Forced to Trip



LA

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Bits 0-3


0 - None

3 - Forced to Trip



LA


Bits 4-7


0 - None

3 - Forced to Trip



LA


Bits 8-11


0 - None

3 - Forced to Trip



LA


Bits 12-15


0 - None

3 - Forced to Trip



LA


Bits 16-19


0 - None

3 - Forced to Trip



LA

5.12 LSCEM

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Bits 20-23


0 - None

3 - Forced to Trip



LA


Bits 24-27


0 - None

3 - Forced to Trip



LA


Bits 28-31


0 - None

3 - Forced to Trip



LA

STA1 AUX1:YM - Integer

Bits 0-3

Variable Optional - Current State of Effect 1

5 - Normal

6 - Trip Initiated-Delayed

1 - Tripped

2 - Waiting for Reset Permit

3 - Ready to Reset

4 - Waiting for Start Permit

LA

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Bits 4-7


5 - Normal


1 - Tripped


3 - Ready to Reset


LA


Bits 8-11


5 - Normal


1 - Tripped


3 - Ready to Reset


LA


Bits 12-15


5 - Normal


1 - Tripped


3 - Ready to Reset


LA

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Bits 16-19


5 - Normal


1 - Tripped


3 - Ready to Reset


LA


Bits 20-23


5 - Normal


1 - Tripped


3 - Ready to Reset


LA


Bits 24-27


5 - Normal


1 - Tripped


3 - Ready to Reset


LA

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Bits 28-31


5 - Normal


1 - Tripped


3 - Ready to Reset


LA

STA9 AUX1:YL - Integer

Bits 0-3


5 - Normal


1 - Tripped


3 - Ready to Reset


LA


Bits 4-7


5 - Normal


1 - Tripped


3 - Ready to Reset


LA

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Bits 8-11


5 - Normal


1 - Tripped


3 - Ready to Reset


LA


Bits 12-15


5 - Normal


1 - Tripped


3 - Ready to Reset


LA


Bits 16-19


5 - Normal


1 - Tripped


3 - Ready to Reset


LA

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Bits 20-23


5 - Normal


1 - Tripped


3 - Ready to Reset


LA


Bits 24-27


5 - Normal


1 - Tripped


3 - Ready to Reset


LA


Bits 28-31


5 - Normal


1 - Tripped


3 - Ready to Reset


LA

ACS1 AUX1:D2 - Integer

Bits 0-15

Variable Optional - Active Causes for Effect 1

LP


Bits 16-31


LP

ACS3 AUX1:YP - Integer

Bits 0-15


LP

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OW331_47 137

NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


ACS4 AUX1:YP - Integer

Bits 16-31


LP


Bits 0-15


LP


Bits 16-31


LP


Bits 0-15


LP


Bits 16-31


LP


Bits 0-15


LP


Bits 16-31


LP

ACS11 AUX1:YN - Integer

Bits 0-15


LP

ACS12 AUX1:YN - Integer

Bits 16-31


LP


Bits 0-15


LP


Bits 16-31


LP


Bits 0-15


LP


Bits 16-31


LP

DTR1 AUX1:R1 - Real

Variable Optional - Trip Delay Timer for Effect 1

LA

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


DTR2 AUX1:R2 - Real


LA

DTR3 AUX1:R3 - Real


LA

DTR4 AUX1:R4 - Real


LA

DTR5 AUX1:R5 - Real


LA

DTR6 AUX1:R6 - Real


LA

DTR7 AUX1:R7 - Real


LA

DTR8 AUX1:R8 - Real


LA

DTR9 AUX1:R9 - Real


LA

DTR10 AUX1:S1 - Real


LA



LA



LA



LA



LA



LA



LA

CALRT AUX1:E8 - Integer

Variable Optional - Alarms Conditions Set by Block

1 - An Effect is forced to Trip or Normal

2 - An Effect has a non-zero FIRST_OUT

LTRIP X2 - Byte Variable Optional - Latent Trip Indicator

RPT1 G2 - Integer Selectable Optional 1 Reset Permit 1

0 - False

1 - True

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OW331_47 139

NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



0 - False

1 - True


0 - False

1 - True


0 - False

1 - True


0 - False

1 - True


0 - False

1 - True


0 - False

1 - True


0 - False

1 - True

RPT9 B0 - Integer Selectable Optional 1 Reset Permit 9

0 - False

1 - True


0 - False

1 - True


0 - False

1 - True

RPT12 YU - Integer Selectable Optional 1 Reset Permit 12

0 - False

1 - True


0 - False

1 - True

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



0 - False

1 - True


0 - False

1 - True


0 - False

1 - True

SPT1 D8 - Integer Selectable Optional 1 Start Permit 1

0 - False

1 - True

LD

SPT2 D9 - Integer Selectable Optional 1 Start Permit 2

0 - False

1 - True

LD

SPT3 YM - Integer Selectable Optional 1 Start Permit 3

0 - False

1 - True

LD

SPT4 YL - Integer Selectable Optional 1 Start Permit 4

0 - False

1 - True

LD

SPT5 E2 - Integer Selectable Optional 1 Start Permit 5

0 - False

1 - True

LD


0 - False

1 - True

LD


0 - False

1 - True

LD

SPT8 YC - Integer Selectable Optional 1 Start Permit 8

0 - False

1 - True

LD

SPT9 Y9 - Integer Selectable Optional 1 Start Permit 9

0 - False

1 - True

LD

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



0 - False

1 - True

LD


0 - False

1 - True

LD


0 - False

1 - True

LD


0 - False

1 - True

LD


0 - False

1 - True

LD

SPT15 XY - Integer Selectable Optional 1 Start Permit 15

0 - False

1 - True

LD

SPT16 XW - Integer Selectable Optional 1 Start Permit 16

0 - False

1 - True

LD

MTR1 AUX1:G0 - Integer

Data Init Required 0 CEM Matrix Column 1; Parameter value visible in LC record only

-



-



-



-



-



-

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142 OW331_47

NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N




-



-



-



-

MTR11 AUX1:B0 - Integer


-



-



-

MTR14 AUX1:YU - Integer


-



-



-

RST1 B8 - Integer Selectable Optional 0 Reset 1

0 - False

1 - True

LD

RST2 B9 - Integer Selectable Optional 0 Reset 2

0 - False

1 - True

LD

RST3 C0 - Integer Selectable Optional 0 Reset 3

0 - False

1 - True

LD

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



0 - False

1 - True

LD


0 - False

1 - True

LD


0 - False

1 - True

LD


0 - False

1 - True

LD


0 - False

1 - True

LD


0 - False

1 - True

LD


0 - False

1 - True

LD


0 - False

1 - True

LD

RST12 YT - Integer Selectable Optional 0 Reset 12

0 - False

1 - True

LD

RST13 D0 - Integer Selectable Optional 0 Reset 13

0 - False

1 - True

LD

RST14 YQ - Integer Selectable Optional 0 Reset 14

0 - False

1 - True

LD

RST15 D2 - Integer Selectable Optional 0 Reset 15

0 - False

1 - True

LD

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


RST16 YP - Integer Selectable Optional 0 Reset 16

0 - False

1 - True

LD

AUX2 G1 - SID Data Init Required - Auxiliary Record 2 LC

CALRT

The following table shows the alerts that can appear for an LSCEM algorithm, an explanation of each alert, and the bit position of each alert.

BI T VAL U E EX P L AN AT I O N BI T PO SI T I ON

An Effect is forced to Trip or Normal

Active when any effect is being forced, that is, any FEFx parameter is Force Trip or Force Normal.

0

An Effect has a non-zero FOT (First Causes to Trip Effect)

Active when there is a non-zero FOTx. 1

5.13 LSCMP

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5.13 LSCMP

Description

The Logic Solver Comparator (LSCMP) algorithm compares two values (DSCV and CMPV1 - Input and First Comparative Value respectively) and sets a Boolean output for each of the following comparisons: LT (Less Than), GT (Greater Than), EQ (Equal To), NEQ (Not Equal).

Additionally, the LSCMP algorithm compares the DSCV against the range defined by CMPV2 and CMPV1 to determine the Boolean output, INRGE (In-Range Comparison Output).

Functional Symbol

Algorithm Execution

The LSCMP algorithm has two algorithm calculations; the comparison calculation and the status propagation.

Comparison Calculation

The LSCMP algorithm compares the DSCV input with the CMPV1 input, the primary comparison value. Based on the relationship between DSCV and CMPV1, the LT, GT, EQ, and NEQ outputs are set to 0 (False) or 1 (True). A secondary comparison determines if DSCV is within the range of CMPV1 to CMPV2. If DSCV is within this range, then the INRGE output is set to 1 (True), otherwise 0 (False).

Status Propagation

Bad status on any of the input values propagates to the output. If the DSCV has a bad status, all outputs reflect this bad status. If DSCV has good status but CMPV1 or CMPV2 has bad status, then the outputs associated with the bad input are also set to bad. The status calculation is totally independent of the comparison calculations.

The following table shows an example of the LSCMP algorithm outputs based on different input values.

Sample LSCMP algorithm outputs

PAR AM E T E R EX AM P L E 1 EX AM P L E 2 EX AM P L E 3

DSCV 2.25 -233.0 37.5

CMPV1 15.0 -200.0 37.5

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146 OW331_47

PAR AM E T E R EX AM P L E 1 EX AM P L E 2 EX AM P L E 3

CMPV2 1.0 0.0 10.0

LT 1 1 0

GT 0 0 0

EQ 0 0 1

NEQ 1 1 0

INRGE 1 0 1

Status Handling

Status of each output is set to the worst status of the inputs for each output, except that Uncertain status is treated as Good for determining status.

For example, if the status on CMPV1 is bad, the statuses on LT, GT, EQ, and NEQ are all set to BAD. Also, if the status on CMPV1 or CMPV2 is BAD, then the status on INRGE is BAD.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


DSCV - Variable Required - Input LA

CMPV1 T1 - Real Variable Optional 0 First Comparative Value

LA

CMPV2 T2 - Real Variable Optional 0 Second Comparative Value

LA

EQ - Variable Optional - Equal Comparison Output

LD

GT - Variable Optional - Greater Than Comparison Output

LD

INRGE - Variable Optional - In-Range Comparison Output

LD

LT - Variable Optional - Less Than Comparison Output

LD

NEQ - Variable Optional - Not Equal Comparison Output

LD

5.14 LSDI

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5.14 LSDI

Description

The Logic Solver Digital Input (LSDI) algorithm accesses a single digital input from a two-state field device and makes the processed physical input available to other algorithms. You can configure inversion on the input value.

The LSDI algorithm supports signal status propagation.

The input can come from a local input channel on the Logic Solver or from input channel data sent across the SIS Net from another Logic Solver.

The LSDI algorithm does not support mode and does not have alarms.

Functional Symbol

5.14 LSDI

148 OW331_47

Algorithm Execution

The LSDI algorithm accesses a single digital input from a two-state field device and makes the processed physical input available to other algorithms. You can configure inversion on the input value.

After calculation, the process variable (PVD) is copied to the output (OUT).

I/O Selection

When you configure the Digital Input algorithm, you select the input channel associated with the digital measurement by configuring the Ovation point. You select the point and the parameter the Digital Input algorithm accesses on that channel. Note that points can be specified for channels directly attached to this Logic Solver or channels attached to Logic Solvers that reside in the same SIS Data Server.

When you select Digital Input Channel for the channel type, the only selectable channel parameter is:

FVALD – The last discrete value with status reported by the channel.

Field Value Processing

You can select the Invert input option (IOP1) to process FVALD:

Invert

When Invert is selected a NOT is performed on FVALD and the resulting value is copied to PVD and OUT.

Status Handling

Under normal conditions, a GOOD status is passed through to OUT.

When the status becomes Bad on the input channel, FVALD, PVD, and OUT are set to Bad status and the BLERR parameter shows Bad PV. Status becomes Bad when line fault detection is enabled and a line fault has been detected.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


OUT X5 - Byte Variable Required - Discrete Output with Status

LD

PVD X6 - Byte Variable Optional - Discrete Output Value Only

LD

FVALD X7 - Byte Variable Optional - Hardware Channel Value

LD

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


BLERR G1 - Integer Variable Optional - Block Error Status 256 - Input Failure/Bad PV

4096 - Simulate Active

LX

IOP1 G0 - Integer Bit 0

Data Init. Required 0 IO Opt: Invert Input.

This parameter is copied from the channel configuration and can't be changed in algorithm configuration. 0 - No 1 - Yes

-

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5.15 LSDO

Description

The LSDO algorithm drives a Logic Solver output channel (for example, a Digital Output channel) to manipulate a solenoid or other final element. In a typical application, the algorithm's input is from an output of a Logic Solver Cause and Effect Matrix (LSCEM) algorithm.

Functional Overview

The following algorithm diagram shows a simple application that uses the LSDO algorithm to operate a solenoid valve.

Figure 35: Simple LSDO application diagram

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OW331_47 151

In this example, the input to the Logic Solver Digital Output algorithm is an effect output from a Cause and Effect Matrix algorithm. During normal operation the effect output's value is 1. When the inputs to the Cause and Effect Matrix algorithm indicate a hazardous condition exists, the effect output is set to 0 (zero). This, in turn, trips the output of the Digital Output algorithm, driving the associated Logic Solver channel to close the valve.

The Logic Solver Digital Input algorithm is wired to a limit switch or other indicator to confirm that the valve closes. If the valve does not close, the PV input to the Digital Output algorithm from the Digital Input algorithm eventually sets a fault state in the Digital Output algorithm.

This simple example does not illustrate a number of configurable functions the algorithm supports:

Options for detecting a fault state. Timers to delay sending a signal to close the valve or set the fault state. Requiring permission before resetting the algorithm to normal operation after being tripped.

Functional Symbol

Algorithm Execution

Because the Logic Solver is a De-energized to Trip environment the normal operating value of the output is On (1) and the tripped value is Off (0).

To use the LSDO algorithm in a safety shutdown application, assign IOOUT to a Logic Solver Digital Output channel connected to a valve controller. Typically, the CASND input of the LSDO algorithm would be wired from an EFFECT output of an upstream LSCEM algorithm. Default LSDO algorithm behavior passes the value of CASND to OUTD.

You can wire feedback from the final element to the RDBK input parameter of the LSDO algorithm. This input would typically be wired from an LSDI algorithm representing a limit switch. The RDBK value becomes the PVD of the LSDO algorithm. If the configurable time CTTM expires before PVD confirms the off state, the DALRT Failed to confirm after trip command becomes True. If RDBK is not wired, PVD has the same value as OUTD, so confirmation is immediate.

Fault State Detection

The LSDO algorithm enters a fault state when any of three conditions is detected and a corresponding option has been selected for the detected condition. When the fault state is active, the algorithm forces OUTD to Off, sets the Fault State Active bit in BLERR, and sets FSTAT to Active. The FOPx options are selected by default and include:

Enable detection based on CASND status. If the status of CASND becomes Bad, FTMR begins incrementing from 0.0. If the status remains Bad for FTIM seconds, OUTD is forced to Off (0). FTMR continues to increment while the status of CASND is Bad. The fault state condition clears immediately when the status transitions away from Bad.

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Enable detection based on output channel status. OUTD is forced to Off if the Logic Solver detects a short or open in the field wiring (status of OUTD is Bad SensorFailure LowLimited) while OUTD is being commanded On. The LSDO algorithm reacts to this status by forcing the output Off to track the state of the final element. Note that FTIM has no effect when the fault state is a result of OUTD status.

Note: If you use this option, you must also require a reset, either in this algorithm or in an upstream LSCEM algorithm, because an active fault state condition clears when the algorithm drives the output Off. Requiring a reset prevents the algorithm from driving the output back to On during the next scan.

Enable detection based on PVD value. OUTD is forced to 0 based on feedback from the final element wired into RDBK. The final element is confirmed Off (PVD is 0) while OUTD is commanded On. Use this option to force the output Off if a failure of the final element is not detected by a Logic Solver diagnostic. RDBK should be wired when using this option; otherwise, PVD has the same value as OUTD. Note that FTIM has no effect when the fault state is a result of the value of PVD.

Note: If you use this option, you must also require a reset, either in this algorithm or in an upstream LSCEM algorithm, because an active fault state condition clears when the algorithm drives the output Off. Requiring a reset prevents the algorithm from driving the output back to On during the next scan.

FTMR is a writeable parameter. Be advised that writing to FTMR can cause the state of OUTD to change depending on the value written.

Determining the Value of OUTD and Writing the Output Channel Value

The following figure is the state transition diagram for OSTAT. When OSTAT is Off or Off - Ready to Reset, the value of OUTD is Off (0) and the Logic Solver channel defined by IOOUT is written to Off. When OSTAT is On, OUTD is On (1) and IOOUT is written to On.

Figure 36: OSTAT Transition diagram

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Note: To require a manual reset to transition OUTD to On (1), Emerson recommends that you configure this in an upstream LSCEM algorithm, not the LSDO algorithm. The LSCEM algorithm has a number of features that enhance the reset logic. The ability to require resets in the LSDO algorithm (using the RQRST parameter) is provided if you do not have voter and LSCEM algorithms to implement shutdown logic.

If you set the LSDO algorithm's RQRST parameter to True, any transition of OUTD to Off (0) causes OUTD to remain Off until all of the following conditions are met:

CASND equals 1. FSTAT is not active. RST is True.

RST should be changed to True using a button on a faceplate or process display. The algorithm changes RST back to False. Do not expose RST as an input on the algorithm and wire to it. If you need to reset an LSDO algorithm from SIS module logic, use an LSCALC algorithm to do a conditional assignment to RST.

When OSTAT is Off or Off - Ready to Reset, the value of OUTD is 0 and the channel on this Logic Solver defined by IOOUT is written to Off.

When OSTAT is On, OUTD is 1 and the channel is written to On.

Determining the Value of PVD

PVD normally gets its value from RDBK. If the status of RDBK is bad quality, PVD has the same value as OUTD. Use the invert input option in the upstream LSDI algorithm if you are using a closed limit switch.

Determining the Value of DALRT

The DALRT parameter reports two alarm conditions set by the algorithm (inactive = 0, active = 1):

Failed to confirm after trip command. The device fails to confirm after being commanded to trip. On any transition of OUTD to Off, the algorithm starts a confirmation timer. If the value of PVD is not 0 within CTTM seconds, the alert Failed to confirm after trip command becomes True. The alert clears when OUTD transitions to On (1).

Confirm lost while commanded On. The device confirms Off while it is being commanded On. When OSTAT is On and PVD has transitioned to 1, the condition is detected if PVD becomes 0, for example if the device has a failure that causes it to confirm in the Off state. The alert clears on the next transition of OSTAT to On.

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Event Generation

The LSDO algorithm generates an event record when any of the following conditions become active and the ROPx option "Event records are not generated" is not selected:

The algorithm has set DALRT Failed to confirm following a command to trip. The event record shows the path to the LSDO algorithm and the Failed to confirm after trip command text string along with the time of occurrence.

The algorithm has set DALRT Confirm lost while commanded On. The event record shows the path to the LSDO algorithm and the text Confirm lost while commanded On along with the time of occurrence.

The command to trip was successful and RDBK has been wired. The event record shows the path to the LSDO algorithm and the text Successful confirmation following a command to trip along with the time of occurrence.

Alarm Detection

You can configure alarms to reference bits in DALRT and BLERR. You can reference these alarm conditions upstream of the LSDO algorithm when required.

The Failed to confirm after trip command alert in DALRT propagates to the module parameter SIF_ERRORS when the ROPx option "Alarm conditions do not roll up to module level" is not selected.

Status Handling

Status is considered in the detection of the fault state.

The status of OUTD is normally GoodNonCascade NonSpecific NotLimited. If the fault state is active, the status is set to GoodCascade FaultStateActive NotLimited. If the status on the output channel is Bad, the status of OUTD is set to Bad. Bad SensorFailure LowLimited indicates an open or short circuit has been detected. Bad DeviceFailure NotLimited indicates a channel error.

The status of PVD is that of RDBK unless its status is Bad NotConnected, in which case the status of PVD is the same as OUTD.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N

MI N. POI NT RE C.

CASND - Variable Required - Input LD

RDBK - Variable Optional - Actual Element Feedback Input LD

IOOUT - Data Init Required CHxx Digital IO Output Channel -

PVD - Variable Optional - Readback Value LD

OSTAT - Variable Optional - Output Current State LA

CTTMR - Variable

Optional - Feedback Confirm Timer

LA

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N

MI N. POI NT RE C.

FTMRH - Variable Optional - Fault Detection Timer (hrs) LA

BLERR - Variable Optional - Block Error Status LX

FSTAT - Variable Optional - Fault State Status LA

DALRT - Variable Optional - Alarm Conditions Set by Block LX

OUTD X9 - Byte Alg Init Optional 0 Output Value -

FOP1 G0 - Integer Bit 0

Tunable Optional 1 FState Opt: Undefined Opt 1 0=No 1=Yes

-


Tunable Required 1 FState Opt: FaultDetectbyCASND 0=No 1=Yes

-


Tunable Required 1 FState Opt: FaultDetectbyOUTD 0=No 1=Yes

-


Tunable Required 1 FState Opt: FaultDetectbyPVD 0=No 1=Yes

-

FTIM R4 - Real Tunable Required 300 Fault Detection Delay Time (sec)

-

FTMR R5 - Real Tunable Required 0 Fault Detection Timer (sec)

-

CTTM R1 - Real Tunable Required 5 Output Feedback Time (sec)

-



-


Tunable Required 0 Report Opt:NoEventRecords 0=False 1=True

-

RQRST X7 - Byte Tunable Required 0 Require Reset 0=False 1=True

-

RST X8 - Byte Tunable Required 0 Reset 0=False 1=True

-

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DALRT

The following table shows the alerts that can appear for an LSDO algorithm and the bit position of each alert.

BI T VAL U E BI T PO SI T I ON

Failed to confirm after trip command. 0

Confirm lost while commanded On. 1

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5.16 LSDVC

Description

The Logic Solver Digital Valve Controller (LSDVC) algorithm provides an interface to the Fisher Controls DVC6000ESD digital valve controller for safety shutdown applications. The algorithm's output is assigned to a HART Two-state Output Channel on a Logic Solver. In a typical application the algorithm's input is from an output of a Cause And Effect Matrix (LSCEM) algorithm.

Functional Overview

The LSDVC algorithm contains all of the parameters found in the Digital Output (LSDO) algorithm. In addition, the LSDVC algorithm performs automatic and manual partial stroke testing on the associated valve.

The following algorithm diagram shows a simple application that uses the LSDVC algorithm to operate a DVC6000ESD digital valve controller.

Figure 37: Simple LSDVC application diagram

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In this example, the input to the Digital Valve Controller algorithm is an effect output from a Cause and Effect Matrix algorithm. During normal operation, the effect output's value is 1. When the inputs to the Cause and Effect Matrix algorithm indicate a hazardous condition exists, the effect output is set to 0 (zero). This, in turn, trips the output of the Digital Valve Controller algorithm, driving the associated Logic Solver HART Two-state Output Channel to the configured off-current value, which closes the valve.

The Digital Input algorithm is wired to a limit switch or other indicator to confirm that the valve closes. If the valve does not close, the PV input to the Digital Valve Controller algorithm from the Digital Input algorithm eventually sets a fault state in the Digital Valve Controller algorithm.

This simple example does not illustrate a number of configurable functions the algorithm supports:

Options for detecting a fault state. Timers to delay sending a signal to close the valve or set the fault state. Requiring permission before resetting the algorithm to normal operation after being tripped. A number of features that support partial stroke testing.

Functional Symbol

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Algorithm Execution

Because the Logic Solver is a De-energized to Trip environment, the normal operating value of the output is On (1) and the tripped value is Off (0).

To use the LSDVC algorithm in a safety shutdown application, assign IOOUT to a Logic Solver HART Two-state Output Channel connected to a Fisher Controls DVC6000ESD digital valve controller. Typically, the CASND input of the LSDVC algorithm would be wired from an EFFECT output of an upstream LSCEM algorithm. Default LSDVC algorithm behavior passes the value of CASND to OUT.

You can wire feedback from the DVC6000ESD to the RDBK input parameter of the LSDVC algorithm. This input would typically be wired from an LSDI algorithm representing a limit switch. The RDBK value becomes the PVD of the LSDVC algorithm. If the configurable time CTTM expires before PVD confirms the off state, the "DALRT Failed to confirm after trip" command becomes True. If RDBK is not wired, PVD has the same value as OUT, so confirmation is immediate.

Fault State Detection

The LSDVC algorithm enters a fault state when any of three conditions is detected and a corresponding option has been selected for the detected condition. When the fault state is active, the algorithm forces OUT to Off, sets the Fault State Active bit in BLERR, and sets FSTAT to Active. The FOPx options are selected by default and include:

Enable detection based on CASND status. If the status of CASND becomes Bad, FTMR begins incrementing from 0.0. If the status remains Bad for FTIM seconds, OUT is forced to 0 (zero). FTMR continues to increment while the status of CASND is Bad. The fault state condition clears immediately when the status transitions away from Bad.

Enable detection based on output channel status. OUT is forced to Off if the Logic Solver detects a short or open in the field wiring (status of OUT is bad quality) while OUT is being commanded On. The LSDVC algorithm reacts to this status by forcing the output Off to track the state of the DVC6000ESD. Note that FTIM has no effect when the fault state is a result of OUT status.

Note: If you use this option you must also require a reset, either in this algorithm or in an upstream LSCEM algorithm, because an active fault state condition clears when the algorithm drives the output Off. Requiring a reset prevents the algorithm from driving the output back to On during the next scan.

Enable detection based on PVD value. OUT is forced to 0 based on feedback from the final element wired into RDBK. The final element is confirmed Off (PVD is 0) while OUT is commanded On. Use this option to force the output off if a failure of the final element is not detected by a Logic Solver diagnostic. RDBK should be wired when using this option; otherwise, PVD has the same value as OUT. Note that FTIM has no effect when the fault state is a result of the value of PVD.

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Note: If you use this option you must also require a reset, either in this algorithm or in an upstream LSCEM algorithm, because an active fault state condition clears when the algorithm drives the output Off. Requiring a reset prevents the algorithm from driving the output back to On during the next scan.

FTMR is a writeable parameter. Be advised that writing to FTMR can cause the state of OUT to change depending on the value written.

Determining the value of OUT and writing the output channel value

The following figure is the state transition diagram for OSTAT. When OSTAT is Off or Off - Ready to Reset, the value of OUT is Off (0) and the Logic Solver channel defined by IOOUT is written to Off. When OSTAT is On, OUT is On and IOOUT is written to On.

Figure 38: OSTAT Transition diagram

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Note: To require a manual reset to transition OUT to On (1), Emerson recommends that you configure this in an upstream LSCEM algorithm, not the LSDVC algorithm. The LSCEM algorithm has a number of features that enhance the reset logic. The ability to require resets in the LSDVC algorithm (using the RQRST parameter) is provided if you do not have voter and LSCEM algorithms to implement shutdown logic.

If you set the LSDVC algorithm's RQRST parameter to True, any transition of OUT to Off (0) causes OUT to remain Off until all of the following conditions are met:

CASND equals 1. FSTAT is not active. RST is True.

RST should be changed to True using a button on a faceplate or process display. The algorithm changes RST back to False. Do not expose RST as an input on the algorithm and wire to it. If you need to reset an LSDVC algorithm from SIS module logic, use an LSCALC algorithm to do a conditional assignment to RST.

When RQRST is False, OUT's value is based on the value of CASND unless the fault state is active.

When OSTAT is Off or Off - Ready to Reset, the value of OUT is Off and the channel on this Logic Solver defined by IOOUT is written to Off. This results in the configured OFCUR value (0 or 4 mA) being sent to the Logic Solver's HART Two-state Output Channel defined in IOOUT.

When OSTAT is On, OUT is On and the channel is written to On. This results in 20 mA being sent to the Logic Solver's HART Two-state Output Channel.

Determining the value of PVD

PVD normally gets its value from RDBK. If the status of RDBK is BadNotConnected, PVD has the same value as OUT. Use the invert input option in the upstream LSDI algorithm if you are using a closed limit switch.

Determining the value of DALRT

The DALRT parameter reports two alarm conditions set by the algorithm (inactive = 0, active = 1):

Failed to confirm after trip command. The device fails to confirm after being commanded to trip. On any transition of OUT to Off, the algorithm starts a confirmation timer. If the value of PVD is not 0 within CTTM seconds, the alert Failed to confirm after trip command becomes True. The alert clears when OUT transitions to On (1).

Confirm lost while commanded On. The device confirms Off while it is being commanded On. When OSTAT is On and PVD has transitioned to 1, the condition is detected if PVD becomes 0, for example if the device has a failure that causes it to confirm in the Off state. The alert clears on the next transition of OSTAT to On.

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Partial stroke testing

Perform partial stroke testing of a DVC6000ESD in one of the following ways:

Initiate a test from a workstation using the SIS Operate or Control Studio Online/Debug by a secure write to the PSSRT parameter in the LSDVC algorithm.

Use a Calc algorithm in an SIS module to initiate a test by conditionally writing the PSSRT parameter in the LSDVC algorithm.

Configure the LSDVC algorithm to periodically initiate the test based on the algorithm's PSPT parameter.

Note: Do not attempt to initiate consecutive partial stroke tests from the logic unless you verify that each test completes before initiating the next. Otherwise, the first test succeeds and subsequent tests fail or are denied until the first test completes.

The partial stroke testing facility in the LSDVC algorithm is in one of three states as indicated in the PST_STATE parameter, whose state transition diagram is shown in the following figure.

Figure 39: PSSTA Transition diagram

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The partial stroke testing state is Idle when the algorithm has not been configured to initiate tests periodically, that is, PSPT is zero hours, and the algorithm is waiting for a manual test to be initiated by PSSRT.

The state is Armed when PSPT is greater than zero and PSNTR is timing down. A test starts when PSNTR reaches zero (times out), or if prior to timing out, a manual test is started.

The state transitions to PST in Progress when a test is started from Idle or Armed. The algorithm sends a request to the IO subsystem to initiate a partial stroke test. The algorithm generates an event based on whether the test was successful, failed, or denied. The state then transitions to Armed or Idle based on the value of PSPT.

A partial stroke test can fail for a number of reasons:

The DVC6000ESD returns a test failed response. The Logic Solver I/O processor is not in the Ready state when the algorithm requests a test. The Logic Solver I/O processor goes to the NoComm state after the test is initiated. The Logic Solver control subsystem does not get a response from the Logic Solver I/O

processor for 180 seconds while PSSTA is PST In Progress.

When a partial stroke test fails, the algorithm sets the PSALR Test failed. The alert remains set until the next time PSSTA is PST in Progress.

The partial stroke test can be denied by the DVC6000ESD when it is in some modes of operation; for example, it is being calibrated or a test has been initiated from Valve link, or the connected HART device does not support partial stroke testing. When a test is denied, the algorithm sets the PSALR Test Denied, where it remains set until the next time PSSTA is PST in Progress.

When PSSTA is Armed or Idle, the algorithm compares the elapsed time since the last successful test (PSSNT) to the maximum allowed time between successful tests (PSRIN) and sets the PSALR No successful test in the required interval if the time has been exceeded (unless the required interval is zero). PSSNT is set to zero after a test succeeds. PSSNT does not begin incrementing after an initial download of the Logic Solver until a successful test has occurred.

A transition can occur between Idle and Armed when PSPT is written in runtime, or on the first scan after a download if PSPT has changed. When the state is Idle, changing PSPT to a value greater than zero causes the state to change to Armed and PSNTR to be initialized. When the state is Armed, writing PSPT to zero changes the state to Idle. When Armed, a greater than zero write to PSPT changes PSNTR to the value written to PSPT if that value is less than the current value of PSNTR. PSNTR is decremented when the state is Armed.

When a download of the Logic Solver occurs where there is an existing configuration running, the current state and timer values are copied from running LSDVC algorithms to retain the values.

Event Generation

The LSDVC algorithm generates an event record when any of the following conditions become active and the ROPx option "Event records are not generated" is not selected:

The algorithm has set DALRT Failed to confirm following a command to trip. The event record shows the path to the LSDVC algorithm and the "Failed to confirm after trip" command text string along with the time of occurrence.

The algorithm has set DALRT to "Confirm lost while commanded On." The event record shows the path to the LSDVC algorithm and the text "Confirm lost while commanded On" along with the time of occurrence.

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The command to trip was successful and RDBK has been wired. The event record shows the path to the LSDVC algorithm and the text "Successful confirmation following a command to trip" along with the time of occurrence.

The algorithm has set PSALR Test failed. The event record shows the path to the LSDVC algorithm and the text string "Partial stroke test failed" along with the time of occurrence.

The algorithm has set PSALR Test denied. The event record shows the path to the LSDVC algorithm and the text string "Partial stroke test denied" along with the time of occurrence.

The algorithm has set PSALR No successful test in the required interval. The event record shows the path to the LSDVC algorithm and the text string "Partial stroke test past due" along with the time of occurrence.

The partial stroke test is successful. The event record shows the path to the LSDVC algorithm and the text "Successful partial stroke test" along with the time of occurrence.

Status Handling

Status is considered in the detection of the fault state.

The status of OUT is normally GoodNonCascade NonSpecific NotLimited. If the fault state is active, the status is set to GoodCascade FaultStateActive NotLimited. If the status on the output channel is Bad, the status of OUT is set to Bad. Bad SensorFailure LowLimited indicates an open or short circuit has been detected. Bad DeviceFailure NotLimited indicates a channel error.

The status of PVD is that of RDBK unless its status is Bad NotConnected, in which case the status of PVD is the same as OUT.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N

MI N POI NT RE C O R D

CASND X1 - Byte Variable Required - Input LD

RDBK X2 - Byte Variable Optional - Actual Element Feedback Input

LD

IOOUT - Data Init. Required CHxx HART 2-State I/O Output Channel

-

PVD X3 - Byte Variable Optional - Readback Value LD

OSTAT Y2 - Byte Variable Optional - Output Current State 0 = Off 1 = Off - Ready to Reset

2 = On

LA

BLERR G2 - Integer Variable Optional - Block Error Status 128 = Output Failure

256 = Input Failure/ Bad PV

1024 = Fault State is Active

LX

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


FSTAT X5 - Byte Variable Optional - Fault State Status 0 = Not Active 1 = Active

LA

DALRT G3 - Integer Variable Optional - Alarm Conditions Set by Block

1 = Failed to Confirm after trip command

2 = Confirm lost while commanded On

LX

CTTMR R2 - Real Variable Optional - Feedback Confirm Timer

LA

FTMRH R3 - Real Variable Optional - Fault Detection Timer (Hours)

LA

PSSTA Y3 - Byte Variable Optional - PST State LA

PSALR G4 - Integer Variable Optional - PST Alerts LX

PSNTR S1 - Real Variable Optional - Periodic PST Timer LA

PSSNT S2 - Real Variable Optional - Last Success PST Elapsed Time

LA

OUT X9 - Byte Alg. Init. Optional 0 Output Value -

CTTM R1 - Real Tunable Required 5 Output Feedback Time (sec)

-

FOP2 G0 - Integer Bits 1

Tunable Required 1 FState Opt: FaultDetectbyCASND 0=No 1=Yes

-


Tunable Required 1 FState Opt: FaultDetectbyOUTD 0=No 1=Yes

-


Tunable Required 1 FState Opt: FaultDetectbyPVD 0=No 1=Yes

-

FTIM R4 - Real Tunable Required 300 Fault Detection Delay Time (sec)

-

FTMR R5 - Real Variable Required 0 Fault Detection Timer (sec)

-

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


ROP1 G1 - Integer Bits 0


-

ROP2 G1 - Integer Bits 1


-

OFCUR X6 - Byte Tunable Required 0 Valve Controller Off Current 0=0 milliamps 1=4 milliamps

-

RST X7 - Byte Bit 0

Tunable Required 0 Reset 0=False 1=True

-

RQRST X8 - Byte Bit 0

Tunable Required 0 Require Reset 0=False 1=True

-

PSSRT X4 - Byte Bit 0

Tunable Required 0 Start On-Demand PST 0=False 1=True

-

PSRIN R8 - Real Tunable Required 0 Required PST Interval (hrs)

-

PSPT R7 - Real Tunable Required 0 Periodic PST Time (hrs)

-

DALRT



Failed to confirm after trip command. 0

Confirm lost while commanded On. 1

PSALR



Last test denied. 0

No successful test in the required interval. 1

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Last test failed. 2

Using output algorithms with the DVC6000ESD

The LSDVC algorithm provides an interface to the DVC6000ESD for safety shutdown and for partial stroke testing. The HART Two-state Output Channel provides the control signal and the HART communications path to the digital valve controller. You can configure the output channel to have an OFCUR of 0 mA or 4 mA. The control signal can command the valve controller to the tripped state regardless of the configured OFCUR value. Using an OFCUR value of 4 mA allows HART communication between the Logic Solver and the valve controller whether the valve controller is in the normal or the trip state. When the OFCUR is 0 mA, the power is removed entirely when the LSDVC algorithm drives the channel Off.

CAUTION: Emerson recommends keeping the travel cutoffs in the DVC6000ESD (Travel Cutoff High and Travel Cutoff Low) at their default value of 50%. Do not set Travel Cutoff Low below 15% or set Travel Cutoff High above 85%.

Implementation Example

Outfit the valve with a solenoid as shown in the figure below. Use two output channels on the Logic Solver, one configured as a Digital Output Channel and

one as HART Two-state Output Channel. Set the OFCUR parameter to 4 mA. Use two output algorithms in the SIS module, one LSDO and one LSDVC. Wire the EFFECTn output from the LSCEM algorithm to the CASND input on both algorithms.

Figure 40: Example implementation

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An advantage of this implementation is HART communication is active whether the valve is in the normal or trip state.

Alternate Implementation

The DVC6000ESD is not outfitted with a solenoid valve. Use a single output channel configured as HART Two-state Output Channel. Set the OFCUR parameter to 0 mA. Use one output algorithm, an LSDVC algorithm, in the SIS module Wire the EFFECTx output from the LSCEM algorithm to the CASND input of the LSDVC

algorithm.

Figure 41: Alternate implementation

An advantage of this implementation is that only one output channel is required. The disadvantage is not having HART communication when the DVC6000ESD is in the shutdown state.

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5.17 LSDVTR

Description

The Logic Solver Digital Voter (LSDVTR) algorithm provides a digital voter function for safety instrumented functions. A voter algorithm monitors a number of input values and determines if there are enough votes to trip. The LSDVTR algorithm monitors as many as 16 digital inputs. If a configured number of the inputs vote to trip, the algorithm trips and sets the output of the algorithm to 0 (zero).

For example, a process shutdown might be required if a tank exceeds a certain temperature. Three temperature sensors are installed in the tank and a digital voter algorithm is configured to monitor the sensors and trip if two of the three transmitters detect a high temperature.

Because the Logic Solver is a De-energized to Trip environment, the normal operating value of the output is 1 (On) and the tripped value is 0 (Off).

Functional Symbol

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Algorithm Execution

The LSDVTR algorithm has one or more digital inputs with status and one digital output with status. The algorithm examines each input to determine whether that input is a vote to trip the output (change it from the normal operating value to the tripped value).

Basic Algorithm Operation

Voting in the Digital Voter function algorithm is an M out of N function, that is, M inputs of the total N inputs must vote to trip. For example, the algorithm can be configured as a 2 out of 3 voter, where two of the three inputs must vote to trip before the output is tripped. The output of the algorithm is typically wired to an LSCEM (Cause and Effect Matrix) algorithm, which interprets the value as either a safe or dangerous process state.

The LSDVTR algorithm has three inputs by default. The number of inputs is extensible from 1 to 16. The M value corresponds to the parameter N2TRP (default value is 2). Common voting schemes include 2 out of 3, 1 out of 2, and 2 out of 2. Other features of the algorithm make it useful for single transmitter applications as a 1 out of 1 voter.

A vote to trip must remain a vote to trip for a configured time (TRDLY) before the output changes to tripped. When the vote to trip clears, it must remain clear for NDLY before the output changes to the normal state. The default for both delays is 0.0 seconds. The trip voting function has the status parameter TRSTS that indicates the status of the trip vote.

For example, the possible values for TRSTS are:

Normal Tripped Voted to Trip, Delayed Voted Normal, Delayed. Trip Inhibited (when applicable)

Startup and Maintenance BYPx Options

It is often necessary to force a voter algorithm's output to remain at the Normal value during plant startup to prevent a trip caused by inputs that have not stabilized at their normal operating values. You may also want to bypass inputs to allow for sensor maintenance. By default, you can bypass only one input of the algorithm at a time. The bypassed input cannot vote to trip.

The following sections explain how to use the BOPx options to implement startup and maintenance bypasses.

Bypassing Inputs

If you have voter algorithms with 1 out of 2 or 1 out of 1 voting schemes you may want the ability to bypass inputs to allow for maintenance. Voters that require multiple votes to trip can benefit from bypass functions as well, resulting in more predictable behavior during transmitter maintenance. Default algorithm behavior requires that BPERM be true to bypass inputs. You can configure BPERM to be set by a display button or physical switch (digital input to the SIS module).

If your application does not require permission before inputs can be bypassed you can select the BOPx option "Bypass permit is not required to bypass."

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Reducing the Number to Trip

By default, a algorithm configured as an M out of N voter becomes an M out of (N-1) algorithm (a 2 out of 3 voter becomes a 2 out of 2 voter) when an input is bypassed because the bypassed input cannot vote to trip. Selecting the BOPx option "A maintenance bypass reduces the number to trip" causes an M out of N voter to become an (M-1) out of (N-1) voter (reduces the number required to trip by one when an input is bypassed).

The following table shows the effect the BOPx option "A maintenance bypass reduces the number to trip" has on the actual number to trip (ANTRP) for several voting schemes. Note that in no case is ANTRP less than one.

BOPX OP TI ON - A M AI N T E N AN C E B Y P AS S RE D U C E S T H E N UM BE R T O T R I P .

CO N FI G U RE D VO TI N G SC H E M E

TH E O P TI O N I S N O T S E LE CT E D. (US E S CO N FI G U R E D N2TRP

TH E O P TI O N I S S E L E C TE D. (RE D U CE S ANTRP)


2 out of 2 Trip Inhibited 1 out of 1


1 out of 1 Trip Inhibited Trip Inhibited



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Allowing Multiple Bypasses

If your application requires, you can enable bypassing multiple inputs simultaneously by selecting the BOPx option "Multiple maintenance bypasses are allowed."

If multiple bypasses are set, deselecting the BOPx option "Multiple maintenance bypasses are allowed" prevents further bypasses being set but existing bypasses remain set. Additional bypasses cannot be set until all existing bypasses are cleared.

Maintenance Bypass Timeout

You can configure a maintenance bypass to be active for a finite time using BTOUT. Its default value is 0.0 seconds, which means no timeout is applied (maintenance bypasses remain active until BYPx parameters become False, either by changing True BYPx parameters to False or changing BPERM to False).

When BTOUT is non-zero, BTMR is preset to BTOUT seconds when the first BYPx parameter becomes True (not when BPERM becomes True). Each module scan thereafter BTMR is decremented until it times out (unless all BYPx parameters become False, in which case the algorithm resets BTMR to 0.0).

BTMR is common to all inputs. The value of BTMR does not change when a second BYPx parameter is changed to True (if multiple bypasses are allowed). When BTMR times out, the algorithm default behavior changes all True BYPx parameters to False. If you use bypass timeouts, do not expose BYPx parameters as algorithm inputs and wire to them. Doing so will prevent the algorithm from removing bypasses upon timeout. If you need to manipulate BYPx parameters from SIS module logic, use an LSCALC algorithm to conditionally assign them.

Optionally, you can use the bypass timer for indication only by selecting the BOPx option "Maintenance bypass timeout is for indication only." This causes the timeout of BTMR to activate a notification alarm (DALRT Expiration Reminder), but does not undo bypasses.

Bypass Timeout Reminder

You can configure the algorithm to remind operators that a bypass timeout is imminent. By default, the algorithm does not notify. There are two ways you can cause a notification:

For bypasses with a configured timeout, you can cause notification in advance of the timeout by setting RMTIM to a non-zero value. When BTMR is non-zero but less than or equal to RMTIM, the alarm condition DALRT Expiration Reminder is active. The bypass timer is re-armed only after the first bypass. However, BTMR is a writeable parameter. After notification that a timeout is about to happen, BTMR can be incremented using a display button or some other suitable technique to extend the time.

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A second approach is available when you are using the bypass timeout for indication only, that is, bypasses are not removed when BTMR expires (the BOPx option "Maintenance bypass timeout is for indication only" is selected). In this case the reminder alarm condition becomes active when BTMR times out even if RMTIM is 0.0. If RMTIM is non-zero, the reminder occurs prior to timeout. If BTMR times out, the reminder is active and remains active until all bypasses have been removed.

The following table describes the behavior of the bypass timeout and reminder function for three different configuration setups.

Maintenance Bypass Timeout and Reminder Function Behavior

BTOUT AN D BOPX CO N FI G U R AT I O N CO N DI T I O N

BTOUT = 0.0 (N O T I M EO U T)

BTOUT > 0.0 AN D T H E BOPX OP T I ON "MAI N T E N AN C E B Y P AS S T I M EO U T I S FO R I N DI C AT I O N O N L Y" I S NO T S E LE C T E D (BYPX R EM OV E D O N T I M EO U T)

BTOUT > 0.0 AN D T H E BOPX OP T I ON "MAI N T E N AN C E B Y P AS S T I M EO U T I S FO R I N DI C AT I O N O N L Y" I S S E LE C T E D (T IM EO U T F O R I N DI C AT I O N O N L Y)

BPERM changes to True

BTMR stays 0.0 BTMR stays 0.0 BTMR stays 0.0

First input is bypassed (BYPx changes to True)

BTMR stays 0.0 BTMR = BTOUT seconds and begins timing down

BTMR = BTOUT seconds and begins timing down

Second input is bypassed (assuming the BOPx option "Multiple maintenance bypasses are allowed" is selected).

BTMR stays 0.0 BTMR continues timing down

BTMR continues timing down

BTMR > RMTIM N/A No reminder No reminder

BTMR <= RMTIM No reminder Reminder alarm condition is active

Reminder alarm condition is active

Bypass timer times out

N/A The algorithm changes all BYPx parameters to False. Reminder alarm condition clears on the following scan.

Reminder alarm condition remains active until all bypasses are removed manually.

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Startup Bypass Trip Inhibit

It is often necessary to force a voter algorithm's output to remain at the Normal value during plant startup to prevent a trip caused by inputs that have not stabilized at their normal operating values. This startup bypass allows the process to reach normal operating conditions without tripping. Use the STUP parameter and associated parameters for startup bypasses. Do not use maintenance overrides for this purpose.

Timed Startup Bypass (the BOPx option "Startup bypass duration is event-based" is not selected)

On a rising edge of the STUP parameter, the algorithm forces OUT to the normal state value for a configurable length of time defined by SUTM. When the countdown timer SUTMR times out, the algorithm resumes normal trip detection. The default behavior of the algorithm is such that a subsequent rising edge of STUP does not affect the startup time while SUTMR is timing down. To avoid a pending trip on timeout, you can allow each rising edge of STUP to re-arm SUTMR (by selecting the BOPx option "Startup bypass preset is allowed while active").

A reminder becomes available to STUP bypasses by selecting the BOPx option "Reminder applies to startup bypass." When SUTMR is greater than 0.0 but less than RMTIM the reminder alarm condition (DALRT Expiration Reminder) is active. The reminder alarm condition is common to the timeout of maintenance and startup bypasses.

Another option is to have the startup timer expire when inputs have stabilized, that is, when there have not been enough votes to trip for a configurable period of time. When the BOPx option "Startup bypass expires upon stabilization" is selected, the bypass timer expires when the process stabilizes. While SUTMR is timing down, STMR times up whenever there are not enough votes to trip and resets whenever the trip votes equal or exceed the number required to trip.

If STMR reaches the configured STM, SUTMR resets to 0.0 and normal trip detection resumes. While SUTMR is timing down, the algorithm increments T2STB and stops as soon as the STMR is triggered. T2STB indicates the total number of seconds during the startup bypass until the inputs become and remain stable (assuming SUTM is sufficiently long).

STMR does not reset at the end of the startup time period, but is reset at the beginning of a startup and at any time during the startup when there are enough trip votes. T2STB is reset at the beginning of a startup bypass. STMR and T2STB are processed even when the stabilization option is not used (the BOPx option "Startup bypass expires upon stabilization" is not selected). You can use the value of T2STB to optimize the configured SUTM.

Event-Based Startup Bypass (the BOPx option "Startup bypass duration is event-based" is selected)

When the startup bypass expires based on an event rather than a fixed time period, select the BOPx option "Startup bypass duration is event based." This ends the startup bypass when the STUP parameter becomes False. STMR and T2STB are not processed. They are set to 0.0 when STUP becomes True.

Bypass Permit Control

When the BOPx option "Bypass permit control should be visible in operator interface" is selected, the algorithm faceplate contains a button which operators can use to set BPERM. Do not select this option if logic in the SIS module is writing to BPERM (for example, a keyswitch is used to permit bypassing).

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The following table summarizes the BOPx options and their effects.

BOPx parameter options

OP TI O N WH E N OP TI ON I S SE LE C T ED WH E N OP TI ON I S NO T SE LE C T E D

A maintenance bypass reduces the number to trip.

An M out of N voter becomes an (M-1) out of (N-1) voter (number required to trip by is reduced by one) when an input is bypassed.

An M out of N voter becomes an M out of (N-1) voter when an input is bypassed.

Multiple maintenance bypasses are allowed.

You can bypass multiple inputs at the same time.

Only one input can be bypassed at a time.

Maintenance bypass timeout is for indication only.

When BTMR times out DALRT Bypass Active remains set and input bypasses remain in effect.

When BTMR times out DALRT Bypass Active clears and all bypasses are cleared.

Startup bypass preset is allowed while active.

Each time STUP is set to True, SUTMR is reset to the configured value of SUTM.

SUTMR is not reset.

Startup bypass expires upon stabilization.

Startup bypass and SUTMR clear if STMR reaches STM (after there are not enough votes to trip for the configured amount of time).

Startup bypass ends when SUTMR reaches 0 (zero).

Reminder applies to startup bypass.

When SUTMR is greater than 0.0 but less than RMTIM, the DALRT Expiration Reminder is set. The reminder alarm condition is common to maintenance and startup bypass timeouts.

DALRT Expiration Reminder does not apply to startup bypass.

Startup bypass duration is event-based.

Startup bypass expires only when STUP becomes False. STMR and T2STB are not processed.

Startup bypass is time based.

Bypass permit is not required to bypass.

BPERM does not need to be set to True for inputs to be bypassed.

BPERM must be set to True for inputs to be bypassed.

Bypass permit control should be visible in operator interface.

Bypass permit controls appear in the standard LSDVTR faceplate. Do not select this option if SIS module logic writes to BPERM (for example, bypass permitting is done using a keyswitch)

Bypass permit controls do not appear in the standard LSDVTR faceplate.

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Status Handling

The status of the inputs influences algorithm behavior based on how the SOPT parameter is configured. The three choices of SOPT are:

Always Use Value — The value of the input is always used regardless of status. In this way a hardware failure does not necessarily cause a shutdown and time is allowed for repair. Detected hardware failures are indicated by standard alarms on the Logic Solver card. This is the default option.

Will Not Vote if Bad — The input value is not counted as a vote to trip if its status is Bad. Vote to Trip if Bad — The input value is counted as a vote to trip if the input status is Bad.

The following table shows how several common voting schemes degrade when a single input has bad status based on the option chosen for SOPT.

RE S U L TI NG VO TI N G SC H E M E F O R SOPT VAL U E S ORI GI N AL VOTI NG SC H E M E

AL W AY S US E VAL U E1 WI L L NO T VO T E I F

BAD VO T E TO TRI P I F BAD

2 out of 3 2 out of 3 or 1 out of 2 2 out of 2 1 out of 2

2 out of 2 2 out of 2 or 1 out of 1 Will Not Vote if Bad 1 out of 1

1 out of 2 1 out of 2 or Tripped 1 out of 1 Tripped

1 out of 1 1 out of 1 or Tripped Trip Inhibited Tripped 1 The degraded voting scheme depends on the value of the input with Bad status.

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The LSDVTR algorithm determines the status of OUT the same way no matter which status option is chosen. The status calculation is completely separate from the value calculation.

The status of OUT is Good if the number of non-bypassed inputs with Good status is greater than or equal to ANTRP or all inputs are bypassed; otherwise, the status is Bad. Uncertain status on inputs is treated as Good.

When any input has Bad status, the DALRT Input Bad becomes active.

TRSTS Indication

The TRSTS parameter indicates the state of the trip vote functions. The typical value for TRSTS is Normal, and less commonly, Tripped. As shown in the following figure, TRSTS can be delayed when TRDLY or NDLY is non-zero and a transition is occurring between normal and tripped states.

A fifth state, Trip Inhibited, occurs whenever a startup bypass is active or when it is not possible to trip because there are not enough inputs participating in voting. The latter case can occur when inputs are bypassed or when inputs have bad status and SOPT selected is Trip inhibited.

The solid lines in the figure show the common state transitions of TRSTS expected as the process value moves above and below the trip point. The dashed lines show less common state transitions.

Figure 42: State diagram for TRSTS

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


NOFIN Y0 - Byte Data Init. Required 1 Number of Inputs -

IN1 G3 - Integer Bit 0

Variable Required - Input 1 LD


Variable Optional - Input 2 LD





























OUT X1 - Byte Variable Required - Output LD

OUTNB X3 - Byte Variable Optional - Output with No Bypass

LD



LD



LD



LD

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N




LD



LD



LD



LD



LD



LD



LD



LD



LD



LD



LD



LD



LD

ANTRP X6 - Byte Variable Optional - Actual Votes Needed to Trip

LA

BTMRH R3 - Real Variable Optional - Bypass Countdown Timer (hrs)

LA

DLYTM R4 - Real Variable Optional - Countdown Timer for Delay

LA

DALRT G5 - Integer Variable Optional - Alarm Conditions Set by algorithm. 1 = Trip Active 4 = Bypass Active 8 = Startup Override Active

32 = Expiration Reminder

128 = Bypassed Input Tripped

256 = Input Bad

LX

STMR R5 - Real Variable Optional - Startup No-Vote-to-Trip Timer

LA

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


SUTMR R6 - Real Variable Optional - Startup Inhibit Timer LA

T2STB R7 - Real Variable Optional - Time to Stable LA

TRSTS X7 - Byte Variable Optional - Trip Status Indicator

0 = Normal

1 = Tripped

2 = Trip Inhibited

3 = Voted to Trip - Delayed

4 = Voted Normal - Delayed

LA

TRPVT X8 - Byte Variable Optional - Num of Inputs Voted-to-Trip

LA


Tunable Required 0 Bypass Opt: MaintBypRed 0=False 1=True

-


Tunable Required 0 Bypass Opt: MulBypAllowed 0=False 1=True

-


Tunable Required 0 Bypass Opt: IndicateOnly 0=False 1=True

-


Tunable Required 0 Bypass Opt: ReArmAllowed 0=False 1=True

-


Tunable Required 0 Bypass Opt: BypExpires 0=False 1=True

-


Tunable Required 0 Bypass Opt: ReminderApplies 0=False 1=True

-


Tunable Required 0 Bypass Opt: BypDurEvent 0=False 1=True

-


Tunable Required 0 Bypass Opt: PermitNotReq 0=False 1=True

-

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Tunable Required 0 Bypass Opt: BypPerVisible 0=False 1=True

-


LD


LD


LD


LD


LD


LD


LD


LD


LD

BYP10 YT - Integer Selectable Optional 0 Voting Bypass for Input 10 0=No 1=Yes

LD

BYP11 DO - Integer


LD

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


BYP12 YQ - Integer


LD


LD

BYP14 YP - Integer Selectable Optional 0 Voting Bypass for Input 14 0=No 1=Yes

LD


LD


LD

BPERM X2 - Byte Selectable Optional 0 Permit Input Bypass 0=No 1=Yes

LD

BTOUT R1 - Real Tunable Required 0.0 Input Bypass Reset Timeout (sec)

-

BTMR R2 - Real Data Init. Required 0.0 Bypass Countdown Timer (sec)

-

NDLY S4 - Real Tunable Required 0 Output Reset Delay (sec)

-

N2TRP X4 - Byte Tunable Required 2 Votes Needed to Trip -

DI1 - Data Init. Optional VOTER1 Description Voter 1 For Control Builder/ Signal Diagram applications use only.

-


-


-


-

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



-


-


-


-


-


-


-


-


-


-


-


-

RMTIM S5 - Real Tunable Required 0 Reminder Alarm Duration (sec)

-

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



Tunable Required 0 Report Opt: NoRollUp0=False 1=True

-



-

STM S6 - Real Tunable Required 0 Process Stabilization Time (sec)

-

STUP X5 - Byte Bit 0

Tunable Required 0 Inhibit Startup Trip Detection 0=No 1=Yes

-

SUTM S8 - Real Tunable Required 0 Startup Inhibit Duration (sec)

-

SOPT Y5 - Byte Tunable Required 0 Status Options if Bad Input 0=Always Use Value 1=Will Not Vote if Bad 2=Vote to trip if Bad

-

TRDLY T2 - Real Tunable Required 0 Trip Delay (sec) -

DALRT

The following table shows the alerts that can appear for an LSDVTR algorithm, an explanation of each alert, and the bit position of each alert.

BI T VAL U E EX P L AN AT I O N BI T PO SI T I ON

Trip Active Inactive when OUT is in the normal operating state, active when OUT is in the trip state.

0

Bypass Active Active when there is a maintenance bypass on any input (any BYPx parameter is True).

2

Startup Override Active Active whenever the startup bypass is active. 3

Expiration Reminder Active when either a maintenance bypass or a startup bypass is about to expire.

5

Bypassed Input Tripped Active if one or more bypassed inputs have exceeded the trip limit.

7

Input Bad Active if any input has bad status. 8

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5.18 LSLIM

Description

The Logic Solver Limit (LSLIM) algorithm limits an input value between two reference values. The algorithm has options that set the output to a default value or the last value if the input becomes out of range.

IN is the analog input value and status.

OUT is the analog output value and status.

LMIND is set True (1) when the input is limited to the OHLIM value. It remains True until the input is limited to the OLLIM value, at which time it is set False (0). It remains False until the input is again limited to the OHLIM value.

OUTLA is a Boolean value set True when the input is limited to the minimum value.

OUTHA is a Boolean value set True when the input is limited to the maximum value.

If the LMOPT option is CLAMP, then OUT is set to either OUT_HI_LIMIT or OUT_LO_LIMIT when there is a corresponding limit violation.

You can use other LMOPT options instead of passing the clamped value to the output. If the USE_LAST option is set then the output is set to the last output when the high or low limit is exceeded. If the USE_DEFAULT option is set then the output is set to the DEFLT parameter value.

Functional Symbol

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Algorithm Execution

The LSLIM algorithm restricts the output value between a high limit and a low limit. When IN is less than or equal to the configured minimum value (OLLIM), OUT equals OLLIM and OUTLA is set True.

When IN is greater than or equal to the configured maximum value (OHLIM), OUT equals OHLIM and OUTHA is set True.

When the value is within the limits, OUTHA and OUTLA are set False.

When IN becomes greater than or equal to OHLIM, LMIND is set True.

When IN becomes less than or equal to OLLIM, LMIND is set False.

If the LMOPT option is CLAMP, then OUT is set to either OUT_HI_LIMIT or OUT_LO_LIMIT when there is a corresponding limit violation.

You can use other LMOPT options instead of passing the clamped value to the output. If the USE_LAST option is set then the output is set to the last output when the high or low limit is exceeded. If the USE_DEFAULT option is set then the output is set to the DEFLT parameter value.

The following table shows an example of the Limit algorithm outputs when OLLIM = 5 and OHLIM = 90:

LSLIM algorithm execution example

IN OUT OUTLA OUTHA LMIND

0 5 True False False

5 5 True False False

50 50 False False Equal to the previous value

90 90 False True True

100 90 False True True

Status Handling

The statuses of the outputs (OUT, OUTHA, and OUTLA) are set to the input status. The status of LMIND is always Good.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


IN - Variable Required - Input LA

OUT - Variable Required - Output LA

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


OUTLA - Variable Optional - Low-Limited Input Status

LD

OUTHA - Variable Optional - High-Limited Input Status

LD

LMIND - Variable Optional - Hi-Low Limit Indicator

LD

OLLIM R3 - Real Tunable Required 0 Min Output Value Allowed

-

OHLIM R2 - Real Tunable Required 100 Max Output Value Allowed

-

LMOPT X1 - Byte Tunable Required 1 Limit Options 1=Clamp 2=UseLast 3=UseDefault

-

DEFLT R1 - Real Tunable Required 0 Output Default value

-

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5.19 LSMID

Description

The Logic Solver Mid Selector (LSMID) algorithm selects the mid-valued input from multiple analog signals. This algorithm selects only from those inputs that are not bad. When there is an even number of inputs, the average of the two middle valued inputs is used as the OUT value and SEL is the number of the lowest-valued input of the two that are averaged.

Functional Symbol

Algorithm Execution

This algorithm selects the mid-valued input from those inputs that are not bad from as many as 16 inputs. When the algorithm has an odd number of inputs, OUT is the value of the selected input and SEL is the number of the selected input. When the algorithm has an even number of inputs, OUT is the average of the two mid-valued inputs and SEL is the number of the lowest-valued input of the two mid-valued inputs. For example, a algorithm has the following inputs:

IN1 = 17 IN2 = 20 IN3 = 19 IN4 = 66

In this example OUT is equal to 19.5 (the average of IN2 and IN3) and SEL is 3 (IN3 is 19, the least-valued of the two mid-valued inputs).

Alarm Detection

This algorithm calculates a DVACT parameter that can be used for alarming. This parameter is True if one or more if the inputs used in the selection process is farther than DVLIM away from the middle signal. A DVHYS parameter is used when DVACT is set for calculation of when the alarm has cleared.

Status Handling

Generally (see exceptions below), when an input is selected, the statuses of OUT and SEL are set to the status of the selected input.

Quality Use And Propagation A bad input is never used.

Any input which has poor quality will be used.

If the number of poor or good inputs is zero, then bad is propagated to OUT and SEL

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Limit Status Propagation If an even number of inputs used by the algorithm: propagate not limited, unless both

inputs have the same limit status, in which case propagate that limit status.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



IN1 - Variable Required - Input 1 LA

IN2 - Variable Required - Input 2 LA

IN3 - Variable Optional - Input 3 LA














OUT - Variable Required - Calculated / Selected Output

LA

SEL - Variable Optional - Number of Selected Input

LA

DVACT - Variable Optional - Input Deviation Status

LD

DIS1 G0 - Integer Selectable Optional 0 Disable Input 1 0=No 1=Yes

LD


LD


LD


LD

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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N



LD


LD


LD


LD


LD


LD

DIS11 B0 - Integer Selectable Optional 0 Disable Input 11 0=No 1=Yes

LD


LD


LD

DIS14 YU - Integer Selectable Optional 0 Disable Input 14 0=No 1=Yes

LD


LD


LD

DVHYS S8 - Real Tunable Required 0 Dev Status Reset Hysteresis

-

DVLIM S9 - Real Tunable Required 0 MID Deviation Limit Value

-

TPSC T1 - Real Tunable Required 100 Input Scale: Top -

BTSC T2 - Real Tunable Required 0 Input Scale: Bottom

-

SCDML Y5 - Byte Tunable Required 1 Input Scale: Decimal Places

-

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5.20 LSNAND

Description

The Logic Solver Not AND (LSNAND) algorithm generates a digital output value based on inverting the logical AND of two to 16 digital inputs. The algorithm supports signal status propagation.



Functional Symbol

Algorithm Execution

The number of inputs to the LSNAND algorithm is an extensible parameter. The algorithm default is two inputs. Use the Control Builder (see Ovation Control Builder User Guide) to add additional input pins.

The LSNAND algorithm examines the inputs you define and applies the logical AND function to the inputs, then applies the logical NOT function. When all inputs are True (1), the output is False. When one or more of the inputs is False (0), the output is True.

Status Handling

The output status is set to the worst status among the selected inputs unless at least one input is False and its status is not Bad. When this is the case, the output status is set to GOOD.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N








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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N














5.21 LSNDE

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5.21 LSNDE

Description

The Logic Solver Negative Edge Detect Trigger (LSNDE) algorithm generates a True (1) digital output when the digital input makes a negative (True-to-False) transition since the last execution of the algorithm. If there has been no transition, the digital output of the algorithm is False (0).

The LSNDE algorithm supports signal status propagation.

IN is the digital input value and status.


Functional Symbol

Algorithm Execution

The LSNDE algorithm is used to trigger other logical events based on the falling transition of a logical signal. If the input value has changed from True to False since the algorithm was last executed, the output of the algorithm is set True. If the value has not changed from True to False, the algorithm output is set False. The following figure shows how the LSNDE algorithm responds to a change in input:

Figure 43: LSNDE algorithm execution example

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Status Handling



NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N




5.22 LSNOR

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5.22 LSNOR

Description

The Logic Solver Not OR (LSNOR) algorithm generates a discrete output value based on inverting the logical OR of two to 16 digital inputs. When one or more of the inputs is True (1), the output is set to False.

The algorithm supports signal status propagation.



Functional Symbol

Algorithm Execution

The number of inputs to the LSNOR algorithm is an extensible parameter. The algorithm default is two inputs. Use the Control Builder (see Ovation Control Builder User Guide) to add additional input pins.

When one or more of the inputs is True (1), the output is set to False. Otherwise, the output is set to True.

Status Handling

The output status is set to the worst among the input statuses. However, when at least one input is True and its status is not Bad, the output status is set to Good.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N







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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N















5.23 LSNOT

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5.23 LSNOT

Description

The Logic Solver NOT (LSNOT) algorithm logically inverts a digital input signal and generates a discrete output value. When the input is True (1), the output is False (0). When the input is False, the output is True.




Functional Symbol

Algorithm Execution

The LSNOT algorithm generates an output value that is the logical NOT of its input. When the input is False, the output is True. When the input is True (1), the output is False.

Status Handling



NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N




5.24 LSOFFD

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5.24 LSOFFD

Description

The Logic Solver Off Delay Timer (LSOFFD) algorithm delays the transfer of a False (0) digital input value to the output by a specified time period. The algorithm supports signal status propagation.

IN is the digital input value and status used to trigger the timed discrete output value.


The Off-Delay Timer algorithm immediately transfers the digital input value (IN) to the output (OUT) and resets the ETIME when IN is True (1). When IN transitions to False (0), OUT is reset to False after a specified time period (TIMED). During this time period, ETIME tracks the time starting when IN transitions to False until the time specified by TIMED expires.

Functional Symbol

Algorithm Execution

The following figure shows the timed response of the Off-Delay Timer algorithm.

Figure 44: LSOFFD algorithm timing diagram

5.24 LSOFFD

OW331_47 199

When IN is True, OUT is set True and the elapsed time counter (ETIME) is set to zero. When IN is False for longer than TIMED, OUT is set False.

Status Handling



NAM E

LC AL G. RE C O R D FI E L D

TYP E

RE Q UI RE D/OP TI O N AL

DE F AU L TVAL U E

DE S C RI P T I O N


IN - Variable Required - Input Trigger LD


ETIME - Variable Optional - Elapsed Timer (sec) LA

TIMED R2 - Real Tunable Required 2 Output Reaction Time Delay (sec) -

5.25 LSOND

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5.25 LSOND

Description

The Logic Solver On Delay Timer (LSOND) algorithm delays the transfer of a True (1) digital input value to the output by a specified time period. The algorithm supports signal status propagation.

IN is the digital input value and status used to trigger the timed digital output value.


The On-Delay Timer algorithm immediately transfers the digital input value (IN) to OUT and resets the ETIME when IN is False. When IN transitions to True, OUT is set True after a configured time period (TIMED). During this time period, ETIME tracks the time starting when IN transitions to True until the time specified by TIMED expires.

Functional Symbol

Algorithm Execution

The following figure shows the timed response of the LSOND algorithm.

Figure 45: LSOND algorithm timing diagram

5.25 LSOND

OW331_47 201

When IN is False, OUT is set False and the elapsed time counter (ETIME) is set to zero. When IN is True longer than TIMED, OUT is set True.

Status Handling



NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N





TIMED R2 - Real Tunable Required 2 Output Reaction Time Delay (sec)

-

5.26 LSOR

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5.26 LSOR

Description

The Logic Solver OR (LSOR) algorithm generates a digital output value based on the logical OR of two to 16 digital inputs. When one or more of the inputs is True (1), the output is set to True.




Functional Symbol

Algorithm Execution

The number of inputs to the LSOR algorithm is an extensible parameter. The algorithm default is two inputs. Use the Control Builder (see Ovation Control Builder User Guide) to add additional input pins. When one or more of the inputs is True (1), the output is set to True. Otherwise, the output is set to False.

Status Handling

The output status is set to the worst among the input statuses. However, when at least one input is True and its status is not Bad, the output status is set to GOOD.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N









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NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N












5.27 LSPDE

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5.27 LSPDE

Description

The Logic Solver Positive Edge Trigger (LSPDE) algorithm generates a True (1) digital output when the digital input makes a positive (False-to-True) transition since the last execution of the algorithm. If there has been no transition, the digital output of the algorithm is False (0).

The LSPDE algorithm supports signal status propagation.



Functional Symbol

Algorithm Execution

Use the LSPDE algorithm to trigger other logical events based on the rising transition of a logical signal. If the input value has changed from False to True since the algorithm was last executed, the output of the algorithm is set True. Otherwise, the output is False. The following drawing shows how the Positive Edge Trigger algorithm responds to a change in input:

Figure 46: LSPDE algorithm execution example

5.27 LSPDE

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Status Handling



NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N




5.28 LSRET

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5.28 LSRET

Description

The LSRET algorithm generates a True (1) digital output after the input has been True for a specified time period. The time for which the input has been True and the output value are reset only when the reset input is set True.

IN is the digital input value and status to be timed.

RST is the digital input value and status used to reset OUT and ETIME.


Functional Symbol

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OW331_47 207

Algorithm Execution

The algorithm output (OUT) is set True when the input (IN) has been True for a specified time period (TIMED) while the RST input is False (0). When the RST input is False and the IN value transitions to False, the ETIME stops and retains its value until IN transitions to True again. When the RST value transitions to True, the ETIME is reset to zero and OUT is set False.

The following figure shows the timed response of the Retentive Timer algorithm.

Figure 47: LSRET algorithm timing diagram

Status Handling

The output status is set to GoodNonCascade.


NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N



RST - Variable Required - Reset In LD




5.29 LSRS

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5.29 LSRS

Description

The Logic Solver Reset/Set Flip-Flop (LSRS) algorithm generates a digital output value based on NOR logic of reset and set inputs:

If the reset input is False (0) and the set input is True (1), the output is True. The output remains True, regardless of the set value, until the reset value is True. When reset becomes True, the output is False.

When both inputs are True, the output is False. When both inputs become False, the output remains at its last state and can be either True or

False.

RST is the reset digital input value and status.

SET is the set digital input value and status.


Functional Symbol

Algorithm Execution

The LSRS algorithm is used to detect when the set input (SET) transitions to True. It holds the output True, even when SET transitions to False, until another event changes the reset input (RST) to True.

The following table shows the algorithm output value based on the possible SET and RST combinations:

LSRS algorithm truth table

SET RST OUT

False False Last OUT

False True False

True False True

True True False

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Status Handling

The output status is equal to the worst status among the inputs.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


RST - Variable Required - Reset Input LD

SET - Variable Required - Set Input LD


5.30 LSSEQ

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5.30 LSSEQ

Description

The LSSEQ algorithm associates system states with actions. The combination of LSSTD algorithms (which associate transitions with states you define) and LSSEQ algorithms provide a sequencing capability similar to the SIS Sequential Function Charts (SFC).

The LSSEQ algorithm can have as many as 16 states and 16 digital output. For each state, the algorithm sets the value of the outputs based on the pattern defined by the MATRX parameter. The algorithm can step through the states in sequence using internal increment and decrement parameters, or the algorithm can be set to specific states (and the corresponding outputs set) from logic external to the algorithm.

Functional Symbol

5.30 LSSEQ

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Algorithm Execution

The LSSEQ algorithm has a configurable number of states and a configurable number of outputs. By default the number of states is 16 and the number of outputs is 2. The MATRX parameter defines a mask for each state that indicates how the outputs should be set when the algorithm is in that state. The LSSEQ algorithm's state can be set in two ways:

If the STIND parameter is 1 (True) then STATE is set to the value of the STIN parameter. This allows the algorithm to be driven from another algorithm, for example a State Transition algorithm (LSSTD) whose STATE parameter is wired to STIN of the LSSEQ algorithm.

If the STIND parameter is 0 (False) the algorithm remains at its current state unless either the INC or DEC parameter is set to True, thereby incrementing or decrementing STATE accordingly. If the WRAP parameter is False STATE stops incrementing when the integer value of STATE equals NOSTA and stops decrementing when the integer value of STATE equals 1. If the WRAP parameter is True STATE wraps around from NOSTA to 1 for an increment and from 1 to NOSTA for a decrement.

You can disable the LSSEQ algorithm by setting the ENBLE parameter to False. This sets STATE to 0 and sets all the outputs to 0 (False). When the ENBLE parameter is changed to True and the STIND parameter is not set, the algorithm sets STATE to 1 and drives the outputs based on the mask for state 1.

If the STIND parameter is 0 (False), setting RST to True resets STATE back to state 1. RST automatically resets to False after use.

Overrides

In normal operation the outputs of the algorithm are a function of the current state and the configured pattern for that state. However, the parameter OMASK can be manipulated to prevent one or more outputs from being True. Setting bits in OMASK to 1 masks the corresponding output from becoming 1 (True) regardless of what is configured for that state. In practice OMASK is manipulated from within the SIS module by a LSCALC algorithm, for example, based on the current batch phase.

Status Handling

The algorithm behavior is not affected by the status of the input parameters. The algorithm's outputs always have good status.


NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N


NOOUT Y0 - Byte Data Init Required 1 Number of Outputs -

NOSTA X1 - Byte Data Init Required 16 Number of Valid States -

STIND X4 - Byte Variable Optional - Set CurrentState to InputState LD

INC X5 - Byte Variable Optional - Move to Next State LD

DEC X6 - Byte Variable Optional - Back to Previous State LD

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NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N


STIN X7 - Byte Variable Optional - Input State LA

ENBLE X8 - Byte Variable Optional - Enable/Disable algorithm LD

OUT1 YP - Integer Bit 0

Variable Required - Output 1 LD


Variable Optional - Output 2 LD





























STATE X9 - Byte Variable Optional - Current State LA

OMASK D2 - Integer Tunable Required 0 Output Mask -

RST X2 - Byte Selectable Optional 0 Force to Initial State 1 0=False 1=True

LD

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NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N


WRAP X3 - Byte

Bit 0

Tunable Required 0 Stop DEC/INC if 1st/Last State 0=False 1=True

-

DO1 - Data Init Optional Output1 Description Output 1

For Control Builder/ Signal Diagram applications use only

-



-



-



-



-



-



-



-



-



-

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NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N




-



-



-



-



-



-

5.31 LSSR

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5.31 LSSR

Description

The Logic Solver Set/Reset Flip-Flop (LSSR) algorithm generates a digital output value based on NAND logic of set and reset inputs:

When the reset input is False (0) and the set input is True (1), the output is True. The output remains True until the reset input is True and the set input is False.

When the reset input is True, the output is equal to the set input. When both inputs are True, the output is True. When both inputs become False, the output remains at its last state and can be either True or

False.

RST is the reset digital input value and status.

SET is the set digital input value and status.


Functional Symbol

Algorithm Execution

The LSSR algorithm is used to detect a change in the set input (SET). When the reset input (RST) is False, OUT is set True after SET changes to True. OUT remains True, even when SET returns to False, and remains True until RST is changed to True and SET is False.

The following table shows the algorithm output value based on the possible SET and RST combinations:

LSSR algorithm output values

SET RST OUT

False False Last OUT

False True False

True False True

True True True

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Status Handling

The output status is equal to the worst status among the inputs.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


SET - Variable Required - Set Input LD

RST - Variable Required - Reset Input LD


5.32 LSSTD

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5.32 LSSTD

Description

The Logic Solver State Transition Diagram (LSSTD) algorithm implements a user-defined state machine in the Logic Solver. A state machine describes the possible states, and the transitions between those states, that can occur in a system. The combination of LSSTD and LSSEQ algorithms provide a sequencing capability similar to the SIS Sequential Function Charts (SFC). LSSTD algorithms associate transitions with system states. LSSEQ algorithms associate system states with actions.

State machines may be described by state transition diagrams. For example, a burner management system could be defined by the following diagram of the allowed transitions (arrows) between system states (circles).

The algorithm's MATRX parameter describes the state diagram (the association of states and input transitions).

Functional Symbol

5.32 LSSTD

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Algorithm Execution

The Logic Solver State Transition Diagram (LSSTD) algorithm implements a state transition diagram. The algorithm can have up to 16 states (outputs) and up to 16 transitions (inputs). You configure the number of transition inputs, the number of output states, and a matrix of states versus transitions where each entry indicates the state that the algorithm goes to when that transition is active. By default the number of inputs (transitions) is 3 and the number of outputs (states) is 2.

The LSSTD algorithm has a digital input with status (INx) for each transition, a STATE indicating the current state, and a digital output with status for each state (OUTx). When the algorithm executes it loops through the transition inputs until an active input is found that has an entry for the current state in the state-transition matrix. STATE is then set to the matrix value and the corresponding OUTx output is also set. Once an active transition is found that has a non-zero matrix entry, no more transitions are checked. If the current state is a terminal state, that is, there are no entries in the matrix for this state that are not zero, or if masked transitions prevent transition to another state, the TRMNL parameter is set to True.

The initial state for the algorithm is state 1. When RST is set to True, the algorithm returns to the initial state. The RST parameter automatically resets to False after it has been used.

The LSSTD algorithm also has an ENBL input. When ENBL is False, STATE is set to 0 and all OUTx outputs are set to 0. When ENBL is changed from False to True the algorithm is forced into state 1 and OUT1 is set to True. This allows an LSSTD algorithm to control other LSSTD algorithms which implement sub-state machines. The Boolean output of the final sub-state machine can then be wired into a transition of the top level algorithm which causes the sub-state algorithm ENBL parameter to be set to False.

For information on how to implement a state transition diagram with an LSSTD algorithm, refer to Application Information.

Overrides

In normal operation the algorithm transitions between states based on the beginning state, the active transition inputs, and the configuration of the state-transition matrix. The normal behavior can be overridden in two ways.

The parameter TMASK prevents one or more transition inputs from causing the state of the algorithm to change. Setting bits in TMASK prevent the algorithm from seeing the corresponding transition as active regardless of the transition's value or status. In practice TMASK is manipulated from within the SIS module by a Calculation/Logic algorithm (for example, based on the current batch phase).

The algorithm can also be forced into a specific state by setting the STIND parameter to 1 and setting STIN to the desired state.

The OVRRD parameter indicates when the normal logic is being overridden. It can take on one of the following values from lowest to highest priority:

None — No overrides in effect. All Associated Transitions Masked — All transitions that would be active have been masked

in TMASK. State Forced — STIND has been set to 1.

5.32 LSSTD

OW331_47 219

Status Handling

The status of the input transition parameters influences the behavior of the LSSTD algorithm based on the configuration of the SOPT parameter. The SOPT parameter has three values:

Always Use Value (the default) — Use an input's value regardless of the input's status Ignore If Bad — If an input's status is Bad, the input value has no effect on the algorithm. Use Last Good Value — While an input's status is Bad, any change in input value is ignored.

Status is not propagated to OUTx parameters, which always have Good status.


NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N


NOSTA Y0 - Byte Data Init Required 1 Number of States -

NOTRA Y2 - Byte Data Init Required 1 Number of Transitions

-

IN1 D2 - Integer Bit 0

Variable Required - Transition Input 1 LD


Variable Required - Transition Input 2 LD


Variable Optional - Transition Input 3 LD



















5.32 LSSTD

220 OW331_47

NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N










ENBL X1 - Byte Variable Optional - Enable State Output

LD

STIN X4 - Byte Variable Optional - Input State LA

STIND X5 - Byte Variable Optional - Set CurrentState to InputState

LD

OUT1 D4 - Integer Bit 0

Variable Required - Output State 1 LD


Variable Optional - Output State 2 LD

























5.32 LSSTD

OW331_47 221

NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N






OVRRD X6 - Byte Variable Optional - Logic Override Indicator

LA

STATE X7 - Byte Variable Optional - Current State LA

TRMNL X8 - Byte Variable Optional - Terminal State Status

LD

VTRAN D5 - Integer Variable Optional - Valid Transitions Indicator

LA

RST X2 - Byte Selectable Optional 0 Force to Initial State 1 0=No 1=Yes

LD

SOPT X3 - Byte Tunable Required 1 Status Options if Bad Input 1=Always Use 2=Ignore if Bad 3=Use Last Good Value

-

TMASK YP - Integer Tunable Required 0 Transition Mask -

DI1 - Data Init Optional Input1 Description Input 1


-



-



-



-

5.32 LSSTD

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NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N




-



-



-



-



-



-



-



-



-

5.32 LSSTD

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NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N




-



-



-

DS1 - Data Init Optional State1 Description State 1


-



-



-



-



-



-

5.32 LSSTD

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NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N




-



-



-



-



-



-



-



-

5.32 LSSTD

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NAM E


TYP E


DE F AU L TVAL U E

DE S C RI P T I O N




-



-

5.33 LSTP

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5.33 LSTP

Description

The Logic Solver Timed Pulse (LSTP) algorithm generates a True (1) digital output for a specified time duration when the input makes a positive (False-to-True) transition. The output remains True even when the input returns to False. The output returns to False only when the elapsed time is more than the specified time duration. A False to True transition causes the timer to restart from zero but the output remains True.

Functional Symbol

Algorithm Execution

The LSTP algorithm sets the output True for a specified time. You can use the algorithm to run a motor for a specified time period.

The following figure shows the timed response of the LSTP algorithm.

Status Handling

The algorithm always sets the status of OUT to GoodNonCascade Non-Specific.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N




5.33 LSTP

OW331_47 227

NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N




5.34 LSXNOR

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5.34 LSXNOR

Description

The Logic Solver Not Exclusive OR (LSXNOR) algorithm performs an exclusive OR of two inputs, then performs a NOT on that result to produce an output. If neither input is True or if both inputs are True, the output of the algorithm is True. If either input is False, the output of the algorithm is False.

Functional Symbol

Algorithm Execution

The following table shows the algorithm output value based on the possible IN1 and IN1 combinations:

LSXNOR algorithm output values

IN1 IN2 OUT

False False True

False True False

True False False

True True True

Status Handling

If one or more of the inputs of the LSXNOR algorithm has Bad status, the output has Bad status.


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N





5.35 LSXOR

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5.35 LSXOR

Description

The Logic Solver Exclusive OR (LSXOR) algorithm performs an exclusive OR of two inputs to produce an output that is True if one, and only one, of the inputs is true.

Functional Symbol

Algorithm Execution

The following table shows the algorithm output value based on the possible IN1 and IN1 combinations:

LSXOR algorithm output values

IN1 IN2 OUTD

False False False

False True True

True False True

True True False

Status Handling

If one or more of the inputs of the LSXOR algorithm has bad status, the output has bad status.


NAM E

LC AL G RE C O R D F I E L D

TYP E


DE F AU L T VAL U E

DE S C RI P T I O N





5.36 SIS connector algorithm table

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5.36 SIS connector algorithm table

SIS connector algorithms are used to connect data between control modules and between Logic Solvers. These algorithms accept points into sheets from inside and from outside the SIS network.

The SIS connector algorithms are listed in the following table:


SECPARAM (see page 231)

Connects data Connects data on sheets that belong to the same SIS Data Server.

SECPARAMREF (see page 232)

Connects data Accepts data from a SECPARAM algorithm on sheets that belong to the same SIS Data Server.

GSECPARAMREF (see page 233)

Connects data Accepts data from a SECPARAM algorithm on sheets that belong to different SIS Data Servers.

NONSECPARAM (see page 234)

Connects data Accepts points into a sheet from outside the SIS network.

5.37 SECPARAM

OW331_47 231

5.37 SECPARAM

Description

The SECPARAM algorithm is used as a connector. SECPARAM accepts points into a sheet from inside a SIS Data Server and transfers data to a SECPARAMREF algorithm.

Use the SECPARAM algorithm when connecting a SIS sheet in a Control Module to another sheet that belongs to the same SIS Data Server. The SECPARAM algorithm can connect sheets in the same or different Control Modules or Logic Solvers, as long as they all belong to the same SIS Data Server.

The SECPARAM and SECPARAMREF algorithms operate as a pair. This pair (parameter and parameter reference) is required when the SIS sheets belong to the same SIS Data Server.

For Ovation, 16 high density secure parameters are available on a Logic Solver. Secure parameters can be read by other modules in Logic Solvers on the same SIS Data Server. You must configure a Logic Solver to publish its secure parameters globally so that you can connect to other SIS Data Servers (see GSECPARAMREF (see page 233)). This sends the secure parameter data to the SISNet Repeater and then to all other Logic Solvers. A total of 32 Logic Solvers can publish globally.

The number of secure parameters a module can contain depends on the number of available secure parameters available in the Logic Solver the module is assigned to.

Functional Symbol

Algorithm Definition

NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


IN - Variable Required - Output Point Name

LD

5.38 SECPARAMREF

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5.38 SECPARAMREF

Description

The SECPARAMREF algorithm is used as a connector, and works in conjunction with the SECPARAM algorithm. SECPARAMREF accepts points into a sheet that belong to the same SIS Data Server and accepts data from a SECPARAM algorithm (see page 231).

When a SECPARAM algorithm is used on a sheet, it connects to a SECPARAMREF algorithm on another sheet that belongs to the same SIS Data Server. (To connect to a sheet that belongs to a different SIS Data Server, use GSECPARAMREF (see page 233).)

You can have any number of Secure Parameter References in a configuration.

Functional Symbol


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


OUT - Variable Required - Input Point Name LD

5.39 GSECPARAMREF

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5.39 GSECPARAMREF

Description

The GSECPARAMREF algorithm is used as a connector. GSECPARAMREF accepts points into a sheet from another sheet that belongs to a different SIS Data Server and accepts data from a SECPARAM algorithm via fiber-optic repeaters.

The SECPARAM and GSECPARAMREF algorithms operate as a pair. This pair (parameter and parameter reference) is required when the SIS sheets do not belong to the same SIS Data Server.

Global secure parameters are similar to SIS secure parameters, but may be published globally. When using global secure parameters, you must also configure the Logic Solver to publish its secure parameters globally so that you can connect to other SIS Data Servers. This sends the secure parameter data to the SISNet Repeater and then to all other Logic Solvers. A total of 32 Logic Solvers can publish globally.

Functional Symbol


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


OUT - Variable Required - Input Point Name LD

5.40 NONSECPARAM

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5.40 NONSECPARAM

Description

The NONSECPARAM algorithm is used as a connector. NONSECPARAM accepts points into a sheet from outside the SIS network.

Use a page connector on an Ovation sheet to connect to a NONSECPARAM algorithm on SIS sheet on the SIS network.

No more than 24 nonsecure parameters are allowed per Logic Solver.

Note: Refer to Ovation Safety Instrumented System (SIS) User Guide for more information on nonsecure parameters.

Functional Symbol


NAM E


TYP E


DE F AU L T VAL U E

DE S C RI P T I O N


OUT - Variable Required - Input Point Name

LA, LD, LP

5.41 Connecting SIS sheets

OW331_47 235

5.41 Connecting SIS sheets

Ovation page connectors are similar to algorithms, but are not used in control, and are not sent to the Controller. They are graphical representations that depict how signals are connected between sheets.

You can use standard Ovation page connectors to connect SIS sheets. The choices are:

Input page connectors graphically accept points into a sheet. Output page connectors graphically pass points out of a sheet.

Refer to the Ovation Control Builder User Guide for details about using Ovation page connectors.

You can use SIS connectors to connect data between control modules and between Logic Solvers. The choices are listed below and their usage is described in the following table:

Secured parameter (SECPARAM (see page 231)) accepts points into a sheet from inside the SIS network and transfers data to SECPARAMREF on another sheet.

Secured parameter reference (SECPARAMREF (see page 232)) accepts points into a sheet from inside the SIS network and accepts data from a SECPARAM on another sheet.

Global secured parameter reference (GSECPARAMREF (see page 233)) accepts points into a sheet from another Logic Solver inside the SIS network. (In order to use this connector, the applicable Logic Solver must be configured as a Global Publisher (see page 263).)

Non-secured parameter (NONSECPARAM (see page 234)) accepts points into a SIS sheet from a sheet outside the SIS network.

IN O R DE R TO C O N N E CT T HE F O L LO WI NG SIS E L EM EN T S ON D I F FE R E N T S H EE T S

US E T HI S C O N N E C T O R

Ovation sheet to an SIS sheet NONSECPARAM

SIS sheet to an Ovation sheet Ovation page connector

SIS sheets in the same control module Ovation page connector

SIS sheets in different control modules SECPARAM to SECPARAMREF

SIS sheets in the same Logic Solver SECPARAM to SECPARAMREF

SIS sheets in different Logic Solvers belonging to the same Data Server

SECPARAM to SECPARAMREF

Logic Solvers belonging to the same Data Server SECPARAM to SECPARAMREF

Logic Solvers belonging to different Data Servers and communicating using SISNet Repeaters

SECPARAM to GSECPARAMREF

5.42 Secured algorithm parameters

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5.42 Secured algorithm parameters

Secured parameters are parameters that originate inside the SIS network. These parameters are "secured" by the limitations of the SIS hardware configuration. Up to 16 secured parameters can be assigned to one Logic Solver. These parameters are always digital and can be:

Parameters that are passed between Logic Solvers that share the same backplane. Parameters that are passed between the modules in a Logic Solver. Global secured parameters are secured parameters that are passed between Logic Solvers

that are connected through SISNet Repeaters via fiber-optic rings.

Note: Any input parameters that are originated outside SIS are considered to be nonsecure parameters. Up to 24 nonsecured parameters (see page 236) can be assigned to one Logic Solver.

5.43 Nonsecured algorithm parameters

Any input algorithm parameters that are originated outside the Logic Solvers (outside the SIS network) are considered to be non-secure parameters.

Up to 24 non-secured parameters can be assigned to one Logic Solver.

Note: Any input parameters that are originated inside SIS are considered to be secure parameters. Up to 16 secured parameters (see page 236) can be assigned to one Logic Solver.

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IN THIS SECTION

Overview of adding and configuring SIS components ....................................................237 To add an SIS Network to the Ovation system...............................................................238 To add an SIS Data Server to the Ovation System ........................................................241 Initial installation SIS upgrade.........................................................................................244 To add an SIS network switch to the Ovation System....................................................244 To create SIS network switch configuration files ............................................................246 To add an SIS I/O device number...................................................................................250 To add an SIS I/O device to the Ovation System ...........................................................250 To assign an SIS I/O Data Server to an SIS I/O Device.................................................255 To configure SIS LAN network switches.........................................................................260 To add and configure SIS Logic Solvers in the Ovation System ....................................263 To add an SIS control sheet to the SIS Ovation system.................................................270 To configure an SIS I/O channel .....................................................................................271 To configure SIS control modules...................................................................................280 To configure SIS digital points for alarming with timestamps .........................................282 To view SIS points ..........................................................................................................284

6.1 Overview of adding and configuring SIS components

The following steps provide an overview of adding and configuring the SIS hierarchy in the Developer Studio:

1. Add a new SIS Network (see page 238).

2. Add a new SIS Data Server (see page 241).

3. Add new network switches (see page 244).

4. Create SIS network switch configuration files (see page 246).

5. Initialize SIS network switches (see page 248).

6. Add an SIS I/O device number (see page 250).

7. Add a new SIS I/O device (see page 250).

8. Associate a Node point (see page 253) with an SIS I/O device.

9. Assign an SIS Data Server (see page 255) to an SIS I/O device.

10. Configure the SIS network switches (see page 260).

11. Add a new SIS Logic Solver (see page 263).

12. Add a new control sheet (see page 270).

13. Configure SIS I/O channel (see page 271).

S E C T I O N 6

Adding and configuring SIS components in the Developer Studio

6.2 To add an SIS Network to the Ovation system

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The following figure illustrates an example of an SIS configuration in the Studio.

Figure 48: SIS hierarchy in the Developer Studio


Prerequisites

Make sure that the Ovation network can communicate with the Ovation Database server.

Procedure

1. Access the Ovation Developer Studio.

2. Use the system tree to navigate to the SIS Networks folder:

System Networks SIS Networks


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3. Right-click SIS Networks and select Insert New. The Insert New SIS Network Wizard appears.

Figure 49: Insert New SIS Network Wizard

4. Enter a unique SIS network name that is not used anywhere else in your system and a Ring identifier name (value from 0 through 15). Select the Finish button. The configuration window for the new SIS network appears.


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Note: If a duplicate SIS network name is found, you cannot insert the network.

Figure 50: SIS Network Config tab

5. Enter the following attributes for the new SIS Network.

AT T R I B U T E DE S C RI P T I O N

SIS Network name Enter a unique SIS network name that is not used anywhere else in your system.

Ring identifier Name for a sub-network that is contained within one Fiber Optic ring (value from 0 through 15).

SIS Net Mask Enter the IP Address for the Net Mask of the SIS network (typically provided by the System Administrator).

SIS LAN Gateway IP Address

Enter the IP Address for the Gateway of the SIS network (used as router information).

SIS LAN Multicast Address

Enter the IP Address for the Multicast of the SIS network (used for Multicast IP Address).

SNMP TrapHost IP Address

Enter a number for the SNMP TrapHost (used for switch configuration).

TimeZone (parameters set by system)

Name Set by system.

UTC Offset Set by system.

DST Timezone Set by system.

6. Select Apply. The new network appears in the Ovation Studio hierarchy tree.

7. You can right-click on the new SIS Network and select from the following menu items:

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ME N U ITEM DE S C RI P T I O N

Open Opens the selected item for editing.

Delete Removes the selected item.

Search Searches the database for items that match specified criteria.

Where Used Searches the database to find and identify where an item is used by another item in the system.

Find Quick name search for items in the database.

Backup/Restore Future function

Create Switch Configuration Function

Accesses the Ovation SIS Switch Engineering Tool window (see page 246).


Prerequisites

Make sure you have added an SIS Network to the Developer Studio hierarchy and configured it properly (see page 238).

Procedure


2. Use the system tree to navigate to the SIS Data Servers folder:

System Networks SIS Networks SIS Data Servers


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3. Right-click SIS Data Servers and select Insert New. The Insert New Data Servers window appears.

Figure 51: Insert New SIS Data Servers Wizard

4. Enter a unique SIS Data Server name that is not used anywhere else in your system. You cannot rename an SIS Data Server after it has been created.

5. Select the Finish button. The configuration window for the new SIS Data Server appears.


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Note: If a duplicate SIS Data Server is found, you cannot insert the new SIS Data Server.

Figure 52: Data Server Config tab

6. Enter the following attributes for the new SIS Data Server.


Data Server Name The name that you entered when you inserted the new SIS Data Server (Step 4) appears here.

SIS identifier Value between 1 and 254. This is set by the system.

Assigned Drop This will be grayed-out. Will be automatically populated when the SIS Data Server is assigned to an Ovation Controller.

Redundant Data Server

When this box is checked, the SIS Data Server works in redundant mode (if partner is present).

Data Server Partner Name

This is automatically generated based on the SIS Data Server Name field.

Primary

Data Server IP Address

IP Address of the Primary SIS Data Server (must be a valid IP address in the network). If this is a redundant configuration, the Primary IP address must be lower than the Partner IP address.

Data Server Ethers Address

Enter the Ethernet (MAC) address of the Primary SIS Data Server using the format xx:xx:xx:xx:xx (you must insert colons between every two characters).

The address is located on the SIS Data Server module.

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Partner

Data Server IP Address

IP Address of the Partner SIS Data Server (available if there is a SIS Data Server Partner). If this is a redundant configuration, the Partner IP address must be higher than the Primary IP address.

Data Server Ethers Address

Enter the Ethernet (MAC) address of Partner SIS Data Server (available if there is a SIS Data Server Partner) (using the format xx:xx:xx:xx:xx (you must insert colons between every two characters)).

The address is located on the SIS Data Server module.

7. Select Apply. The new SIS Data Server appears in the Ovation Studio hierarchy tree.

8. You may right-click on the new SIS Data Server and select from the following menu items:





6.4 Initial installation SIS upgrade

When your Ovation system is initially installed, after you have added and configured the SIS Network and the SIS Data Servers in the Ovation Developer Studio, you must load new firmware in the SIS Data Servers.

Emerson has provided files for this purpose. See To load or upgrade an SIS Data Server (see page 319) for instructions on this procedure.

6.5 To add an SIS network switch to the Ovation System

Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server (see page 241).

Procedure


2. Use the system tree to navigate to the SIS Network Switch folder:

System Networks SIS Networks SIS Data Servers SIS Network Switch

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3. Right-click SIS Network Switch and select Insert New. The Insert New SIS Network Switches window appears.

Figure 53: New SIS Network Switches Config tab

4. Enter the following attributes for the new SIS network switch.


Level Currently, this value should always be 1.

Number of Ports Maximum number of ports that are available for the switch. Range of 1 to 26.

Switch Name This should be a unique name that appears nowhere else in the network.

Switch IP Address IP Address of primary switch (typically provided by the System Administrator).

Partner

Name This should be a unique name that appears nowhere else in the network.

IP Address IP Address of partner switch (typically provided by the System Administrator).

5. Select Apply. The new network switch appears in the Ovation Studio WorkPad.

6. You may right-click on the new SIS network switch and select from the following menu items:




After you have added a new switch, you need to create configuration files for the switch (see page 246).

6.6 To create SIS network switch configuration files

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The SIS Switch Engineering Tool enables you to create switch configuration files for the network switches (such as Cisco IE 3000) that are used in an SIS network.

Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server (see page 241). Make sure you have added an SIS network switch (see page 244).

Procedure




3. Right-click on the desired SIS Network and select Create Switch Configuration Function. The Ovation SIS Switch Engineering Tool window appears. This window is used to create DHCP and Switch configuration files.


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4. Select the Configuration Files tab.

Figure 54: Ovation SIS Switch Engineering Tool window (Configuration Files tab)

F I E L D O R BU T T O N

DE S C RI P T I O N

Select DHCP Template

Selects a DHCP template file.

Select Switch Template

Selects a Switch template file.

Open XML Selects an XML file that contains network parameters. These default values are set in the Developer Studio.

Create files Creates configuration files from the switch and prompts you to define the location where you want to place the created files.

5. Select the Create Files button.

This creates two text files used to configure the Primary switch and the Partner switch:

<SIS Network Name> - <Primary switch name>.txt for example SISNet1-SW301.txt

<SIS Network Name> - <Partner switch name>.txt For example SISNet1-SW302.txt


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6. A window appears asking where you want to store the new files. Browse to the desired location and store the switch configuration files.

You will use these files later to configure the SIS network switches.

6.6.1 To initialize SIS network switches

Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server (see page 241). Make sure you have added an SIS network switch (see page 244). Make sure you have created the SIS network switch configuration files (see page 246).

Procedure

1. Check to determine if the Hyper Terminal program is installed on your computer:

Start -> All Programs -> Accessories -> Communications ->Hyper Terminal.

If Hyper Terminal is not installed on your computer, proceed to Step 2

If Hyper Terminal is already installed on your computer, skip to Step 4.

2. Navigate to: Control Panel -> Add/Remove Programs -> Add/Remove Windows Components -> Accessories and Utilities -> Communications -> Check "HyperTerminal." This should install Hyper Terminal on your computer.

3. Make sure the blue cable is connected to the console port on the router and COM1 serial port on the server.

4. After HyperTerminal is installed, navigate to: Start -> All Programs -> Accessories -> Communications -> HyperTerminal, and then open HyperTerminal.

5. Select icon, name connection RouterCfg, and select Connect using COM1 from the drop-down menu.

6. Once connected, go to File -> Properties -> Settings.

7. Connect using COM1, Configure

Make the following settings:

9600 baud

8

1

no flow control

8. Select OK.

Emulation = VT100

Set ASCII Setup to Line Delay and Character Delay of 10 milliseconds.


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9. Enter the following data (shown in bold )in the terminal:

switch> ena switch# term width 132 switch# conf t switch(config)# (open the <SIS Network Name>-<Primary Switch>.txt file, "ctrl a" selects all, "ctrl c" copies) right click and paste to host switch# copy running-config startup-config

10. Close the Hyper Terminal window. This initializes the Primary switch.

11. After the Primary switch is configured, open Hyper Terminal again to initialize the Partner switch: Start _> All Programs -> Accessories -> Communications -> HyperTerminal, and then open HyperTerminal.

12. Select icon, name connection RouterCfg, and select Connect using COM1 from the drop-down menu.

13. Once connected, go to File -> Properties -> Settings.

14. Connect using COM1, Configure

Make the following settings:

9600 baud

8

1

no flow control

15. Select OK.

Emulation = VT100

Set ASCII Setup to Line Delay and Character Delay of 10 milliseconds.

16. Enter the following data (shown in bold )in the terminal:

switch> ena switch# term width 132 switch# conf t switch(config)# (open <SIS Network Name>-<Partner Switch>.txt file, "ctrl a" selects all, "ctrl c" copies) right click and paste to host switch# copy running-config startup-config

17. Close the Hyper Terminal window. Both SIS network switches are now initialized.

6.7 To add an SIS I/O device number

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6.7 To add an SIS I/O device number

Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server (see page 241). Make sure you have added and initialized an SIS network switch (see page 244).

Procedure

After you have added and configured an SIS network, SIS Data Server, and network switch, you need to add an SIS I/O device (see page 250). However, before you do this, you need to first add a device number for the device.


2. Use the system tree to navigate to the Device Numbers item: Systems Networks Units Drops Configuration Controller Devices Device Numbers

3. Right-click on the Device Numbers item.

4. Select Insert New from the pop-up menu. The Insert New Device Numbers Wizard appears.

Note: If you need to change a driver on a previously configured device, or anytime a new device is added, perform a clear/load function on the Controller. The Device Number represents the physical devices that can communicate with the Controller.

5. Select a number sequentially, starting at 1 to a maximum of 9. An example would be if two devices were to be configured, their device numbers would be 1 and 2, not 1 and 3 or 4 or 5.

6. Select Finish. The New Device Numbers dialog box appears showing the Controller Driver Parameters tab.

6.8 To add an SIS I/O device to the Ovation System

Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server (see page 241). Make sure you have added and configured an SIS network switch (see page 244). Make sure you have added an SIS I/O device number (see page 250).

Procedure

After you have added and configured an SIS Data Server for your Ovation system, you need to assign this Data Server to a specific Ovation Controller drop. In order to do this, you must add a new I/O device to the Controller and then assign the Data Server to this I/O device.



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2. Use the system tree to navigate to the I/O Devices folder:

System Networks Units Drops I/O Devices

3. Right-click I/O Devices and select Insert New. The Insert New I/O Device window appears.

Figure 55: Insert New SIS I/O Devices Wizard

4. Select an I/O Device Number number sequentially, starting at 5 to a maximum of 11. Select Ovation SIS for the I/O Device Type.


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5. Select the Finish button. The configuration window for the new SIS I/O device appears. (Notice that the field for the Node Record Point Name is blank.)

Figure 56: SIS New I/O Devices Config tab

6. Enter the following attributes for the new I/O device.


I/O Device Number Number of the SIS I/O device. This is displayed by the system.

I/O Device Type Should be Ovation SIS. This is displayed by the system.

Node Record Point Name

Comes from the Node point (RN record type). Refer to To associate a Node point with an SIS I/O device (see page 253) for instructions on creating the Node point.

SIS identifier This is displayed by the system.

Network Interface

Message Port UDP port used for communication between the SIS Data Server and the Ovation Controller. This is a socket number. The recommended value is 2080, DO NOT change this number.

Alarm Handler Port Transfers alarm messages between the SIS Data Server and the Ovation Controller. This is a socket number. The recommended value is 3051, DO NOT change this number.

Network Interface Connection

This can be a single or dual network connection.


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Network Interface Number of the SIS network (N1 - N4).

Backup Network Interface

Number of the backup SIS network (N1 - N4).

Primary Network Interface

IP Address IP Address of primary network interface (typically provided by the System Administrator).

Subnet Mask Identifies the range of IP addresses that are on a local network.

Partner Network Interface

IP Address IP Address of partner network interface (typically provided by the System Administrator).

Subnet Mask Identifies the range of IP addresses that are on a local network.

7. Select the Apply button and the new SIS I/O Device appears in the Ovation Studio hierarchy tree.

8. You can right-click on the new I/O Device and select from the following menu items:






Find Performs a quick name search for items in the database.

Consistency Check

Displays a window that checks the consistency of Ovation components.

6.8.1 To associate a Node point with an SIS I/O device

Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server. (see page 241) Make sure you have added and configured an SIS network switch (see page 244). Make sure you have added an SIS I/O device number (see page 250). Make sure you have you have added an SIS I/O device (see page 250).

Procedure

After you have added an SIS I/O device, you need to create a Node point and assign it to the new I/O device.



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2. Use the system tree to navigate to the Node Points folder:

System Networks Units Drops (appropriate Controller drop) Points Node Points

3. Right-click on Node Points and select Insert New. The Insert New Node Points Wizard appears.

4. Enter a point name and select the desired frequency for the point.

5. Select Finish. The configuration window for the Node point appears.

6. Select the Hardware tab.

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7. Select the SIS I/O device you want to associate with the Node point. Select the I/O task index.

8. After the Node point is created, select the Refresh button and the name of the Node point appears in the Node Record Point Name field in the New I/O devices window (see page 250).


Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server (see page 241). Make sure you have added and configured an SIS network switch (see page 244). Make sure you have added an SIS I/O device number (see page 250). Make sure you have added and configured an SIS I/O device (see page 250).

Procedure

After you have added and configured an SIS Data Server and an SIS I/O device to your Ovation system, you need to assign this Data Server to a specific Ovation Controller drop.


2. Use the system tree to navigate to the Data Server folder:

System Networks Drops (appropriate Controller drop) I/O Devices SIS I/O Device Data Servers


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3. Right-click Data Servers and select Insert New. The Insert New SIS Data Server window appears.

Figure 57: Insert New SIS Data Servers Wizard

4. Enter the following attributes for the new I/O Data Server Device.


Data Server Name This is a pull-down list of the SIS Data Servers that you defined under the SIS Network folder.

SIS Data Server ID Number assigned to the Data Server.


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5. Select Finish. The configuration window for the new SIS I/O Data Server appears.

Figure 58: New SIS Data Servers Config tab

6. Enter the following attributes for the new I/O Data Server.


Data Server Name This is a pull-down list of the SIS Data Servers that you defined under the SIS Network folder.

SIS Data Server ID Number assigned to the Data Server.

Ovation Point Name Ovation point that determines the quality of the Data Server.

7. Select Apply and the new SIS I/O Device appears in the Ovation Studio hierarchy tree.

8. You can right-click on the new I/O Data Server and select from the following menu items:






Find Performs a quick name search for items in the database.

Consistency check Displays a table that provides data about SIS points.

Create Switch Configuration Function

Accesses the Ovation SIS Switch Engineering Tool window (see page 246).


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6.9.1 Viewing SIS points in the Developer Studio hierarchy

Ovation points are created through the use of DBID or manually by adding a point using the Ovation Developer Studio. (Refer to Planning Your Ovation System for information about DBID or to the Ovation Developer Studio User Guide for information about adding a point.)

Ovation points become SIS points when the points are used by the Control Builder on an SIS control sheet. When the SIS control sheet is saved, the points will appear in the Developer Studio hierarchy in the SIS Points folder under the SIS Data Servers folder When the control sheet is loaded to the Logic Solver, the points now appear in the SIS Points folder under the Logic Solvers folder. The SIS points also appear in the WorkPad area below the Studio hierarchy tree, as seen in the following figure.


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6.9.2 Removing Ovation SIS points from SIS control sheets

If you want to remove a SIS point from its SIS control status, you can do this through the Ovation Control Builder:

1. Access the Ovation Control Builder (refer to Ovation Control Builder User Guide for details).

2. Open the control sheet that contains the SIS points that you want to remove from SIS control.

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3. Remove the desired SIS points and save the sheet.

4. Load the sheet to the applicable Logic Solver. The points will move from the SIS Points folder under the Logic Solver to the SIS Points folder under the SIS Data Server folder. This indicates that the points are no longer used as SIS points in a SIS control scheme.


The SIS Switch Engineering Tool enables you to configure switches (such as Cisco IE 3000) that are used in an SIS network.

Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server (see page 241). Make sure you have added an SIS network switch (see page 244). Make sure you have created SIS network switch configuration files (see page 246). Make sure you have added an SIS I/O device number (see page 250). Make sure you have added an SIS I/O device (see page 250). Make sure you have associated a Node point (see page 253) with the SIS I/O device. Make sure you have assigned a SIS Data Server (see page 255) to the SIS I/O device.

Procedure




3. Right-click on the desired SIS Network and select Create Switch Configuration Function. The Ovation SIS Switch Engineering Tool window appears. This window is used to configure DHCP and Switch configuration files.


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4. Select the Configuration Files tab.

Figure 59: Ovation SIS Switch Engineering Tool window (Configuration Files tab)

5. Select the Create Files button.

This configures the two text files used to create (see page 246) the Primary switch and the Partner switch and now also creates a DHCP text file:

<SIS Network Name> - <Primary switch name>.txt for example SISNet1-SW301.txt

<SIS Network Name> - <Partner switch name>.txt For example SISNet1-SW302.txt

<SIS Network Name> - DHCP.txt For example SISNet1- DHCP.txt


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Note: Use the following steps to send the applicable switch configuration file and the DHCP file to each switch (Primary and Partner switch).

6. Select the Telnet Connection tab.

Figure 60: Ovation SIS Switch Engineering Tool window (Telnet Connection tab)

FI E L D O R BU T T O N

DE S C RI P T I O N

Switch Name/IP Name or IP address of the switch you want to configure.

Telnet Port Name of the Telnet port.

Options

Connect Tool will request telnet password and then connect to the switch.

Disconnect Too will disconnect the switch.

Show Running Config

Sends the switch command "Show Running Config" to the switch. The display area shows the current running configuration. Requires a password to run (default is ChangeMe).

Show Version Sends the switch command "Show Running Config" to the switch. The display area shows the current running configuration.

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FI E L D O R BU T T O N

DE S C RI P T I O N

Load File Copies a configuration file into the switch. This file can be any of the files created in the Configuration Files tab. You will be prompted to select the desired file and enter the password. Then, you will be asked if you want to copy the configuration to the startup configuration for the switch.

Apply Starts the selected option process.

7. Enter the applicable switch name or IP address for the Primary switch.

8. Select the Connect button and select Apply. You will be prompted to enter a password (the default password is ChangeMe).

9. Select the Load File button and select Apply.

You will be prompted to select the desired file and to enter a password (the default password is ChangeMe).

Select the <SIS Network Name> - DHCP.txt file. Next, you will be asked if you want to copy the configuration to the startup configuration for the switch.

10. Select the Load File button and select Apply.

You will be prompted to select the desired file and to enter a password (the default password is ChangeMe)

Select the <SIS Network Name> - <Switch name>.txt file. Next, you will be asked if you want to copy the configuration to the startup configuration for the switch.

11. Select the Disconnect button and select Apply.

12. Repeat Steps 7 through 11 to configure the Partner switch.


Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server (see page 241). Make sure you have added and configured an SIS network switch (see page 244). Make sure you have added an SIS I/O device number (see page 250). Make sure you have added and configured an SIS I/O device (see page 250).


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Procedure

You can add up to 32 Logic Solvers to an SIS Data Server.


2. Use the system tree to navigate to the Logic Solvers folder:

System Networks Units Drops (appropriate Controller drop) I/O Devices SIS I/O Device Data Servers Logic Solvers

3. Right-click Logic Solvers and select Insert New. The Insert New Logic Solver window appears.

Figure 61: Insert New SIS Logic Solvers Wizard


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4. Enter the following attributes for the new Logic Solver.


SIS Logic Solver Name

Enter a unique Logic Solver name that is not used anywhere else in your system.

Redundant SIS Logic Solver

Select this checkbox to enable the Logic Solver to work in redundant mode (if a partner is present).

You cannot change the redundancy mode after you have added the Logic Solver.

SIS Logic Solver Slot Number

This is the slot used by the Logic Solver. Slot numbers range from 1 to 32 and must be unique within the SIS Data Server.

You cannot change the slot number after you have added the Logic Solver.

5. Select the Finish button. The configuration window for the new SIS Logic Solver appears. Enter the appropriate values for the attributes in each tab and then select OK.

Config tab (see page 266).

General tab (see page 267).

Proof Testing tab (see page 268).

6. The new Logic Solver appears in the Ovation Studio hierarchy tree.

Note: When a Logic Solver is added to the Studio, four control modules (see page 280) are automatically created and appear under the Logic Solver in the Studio tree. Sixteen I/O channels are also included under each Logic Solver and they appear in the Studio WorkPad area.

7. You can right-click on the new Logic Solver and select from the following menu items:






Find Quick name search for items in the database.

Lock Closes the Logic Solver so that you cannot load data to it.

Unlock Opens the Logic Solver so that you can load data to it.

Consistency Check

Displays a window that checks the consistency of Ovation components.

Load (see page 285)

Performs load operation if the Logic Solver is not loaded, sends script configuration to Logic Solver, and loads shadow algorithms into Ovation Controller.

Clear Clears the Logic Solver. Prepares the Logic Solver for upgrade by removing configuration.

Reboot Displays a Restart Wizard which is used to restarts the Logic Solver.

Create Switch Configuration

Accesses the Ovation SIS Switch Engineering Tool window (see page 246). This tool creates the switch configuration files for the network switches.


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6.11.1 Configuring the Logic Solver Config tab

After you have added an SIS Logic Solver, use the following Config tab to configure the Logic Solver.

Figure 62: New SIS Logic Solvers window (Config tab)

Attributes in New SIS Logic Solvers window (Config tab)


SIS Logic Solver Name

Enter a unique Logic Solver name that is not used anywhere else in your system.

Redundant SIS Logic Solver

Select this checkbox to enable Logic Solver to work in redundant mode (if a partner is present).

You cannot change the redundancy mode after you have added the Logic Solver.

SIS Logic Solver Slot Number

This is the slot used by the Logic Solver. Slot numbers range from 1 to 32 and must be unique within the SIS Data Server.

You cannot change the slot number after you have added the Logic Solver.

Revision CRC code which reflects the configuration of the entire Logic Solver as calculated by the Ovation Developer Studio and is compared with the code that is calculated by the Logic Solver at load time.

SIS Data Server SIS Data Server to which this Logic Solver is directly connected through backplane connections. Name is entered by the system.

GSLOT Identifier Logic Solver global identifier. This is set by the system and is used as an identifier for global Logic Solvers in the SISNet.

All I/O channels CRC

CRC code which reflects the configuration of all I/O channels as calculated by the Ovation Developer Studio and is compared with the code that is calculated by the Logic Solver at load time. This code is the latest database CRC value.


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Diagnostic/Status

Ovation Point Name Enter the name of an Ovation point that will hold status information.

6.11.2 Configuring the Logic Solver General tab

After you have added an SIS Logic Solver, use the following General tab to configure the Logic Solver.

Figure 63: New SIS Logic Solvers window (General tab)


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Attributes in New SIS Logic Solver window (General tab)


Scan Rate This is the Logic Solver loop time. The available scan rates are 50ms, 100ms, 150ms, and 200 ms per period. The default rate (see page 315) is 50 ms.

Since the SIS Data Server sends control module information to the Controller every second, scan rate is not related to update time.

Shadow block Control Task

Refers to a specific Controller area where all the control sheets that contain shadow algorithms are scanned at the same frequency.

Points are grouped by control tasks so they can be updated (scanned) at different rates. The rate is set in the applicable Ovation configuration tool during configuration for a Controller drop.

Secure parameters

Publish secure params globally

Select this checkbox to enable this Logic Solver to publish secure parameters globally over the SIS Network.

Enable high-density secure parameters

This checkbox is currently enabled, but is disabled for editing. This option activates 16 secure parameters for each Logic Solver.

Nonsecure parameters

Nonsecure parameters 1 - 24

Identifies nonsecure parameters associated with this Logic Solver.

6.11.3 Configuring the Logic Solver Proof Testing tab

After you have added an SIS Logic Solver, use the Proof Testing tab (as shown in the following figure) to configure the Logic Solver.

Ovation SIS performs an automatic diagnostic whenever a Logic Solver reboots. You can use the parameters in the Proof Testing tab to set the desired configuration for diagnostics:

You can configure the Proof test timer period so that when the timer period expires, there will be an automatic transfer to the backup Logic Solver. This forces a reboot and diagnostics are performed (only available for redundant Logic Solvers). OR

An alarm can be generated to indicate that you should reboot the Logic Solver in order to perform the diagnostics.


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You can configure the Proof test timer to generate an alert before the Proof Test timer will expire. The alert is sent to the Ovation Error Log.

If a Logic Solver fails the power diagnostic during boot up, it will try again. If it fails a second time, the Logic Solver will enter a "reduced mode." This mode will be indicated through the Logic Solver RN record.

Figure 64: SIS Logic Solvers configuration dialog (Proof Testing tab)

Attributes in New SIS Logic Solvers window (Proof Testing tab)


Proof test interval (for this Logic Solver. See SIS Safety Manuals for additional information.)

Proof test interval (years)

This, plus the days count, is the total proof test interval.

Proof test interval (days)

This, plus the years count, is the total proof test interval.

Proof test reminder alert

Proof test remind alert due (days)

This is the number of days until the user is reminded to execute a proof test.

Enable automatic proof test to run at reminder time

Select this checkbox to allow a proof test to run automatically without operator attention (only available for redundant Logic Solvers).

6.12 To add an SIS control sheet to the SIS Ovation system

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6.12 To add an SIS control sheet to the SIS Ovation system

Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server (see page 241). Make sure you have added and configured a Network switch (see page 244). Make sure you have added an I/O device number (see page 250). Make sure you have added and configured an SIS I/O device (see page 250). Make sure you have assigned a Data Server (see page 255) to the SIS I/O device. Make sure you have added and configured an SIS Logic Solver (see page 263).

Procedure


2. Use the system tree to navigate to the Control Sheets folder:

System Networks Drops (appropriate Controller drop) I/O Devices SIS I/O Device Data Servers Logic Solvers Control Modules Control Sheets

3. Right-click on Control Sheets and select Insert New. The Insert New Control Sheet window appears.

Figure 65: Insert New Control Sheet window

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4. Enter the following attributes for the new control sheet.


Algorithm Count Keeps track of the number of algorithms on a sheet.

Sheet Name Defines how the sheet is described in the system. This name (up to 30 characters) appears in the Control Sheets section of the Studio hierarchy.

Sheet Number Short reference number (maximum of three characters). This number is used to identify the sheet to the user, but is not the unique internal .svg file number that is assigned by the Control Builder.

Sheet Component Defines the sheet component code. Component codes are text strings that are assigned to each sheet or supplemental document that represent the sheet's or document's location in the hierarchy.

5. Select OK. The Ovation Control Builder opens.

6. Draw the desired control scheme and save the sheet. (Refer to the Ovation Control Builder User Guide for more information.)


Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server (see page 241). Make sure you have added and configured an SIS I/O device (see page 250). Make sure you have assigned a SIS Data Server (see page 255) to the SIS I/O device. Make sure you have added and configured an SIS Logic Solver (see page 263).

Procedure


2. Use the system tree to navigate to the I/O Channels folder:

System Networks Drops (appropriate Controller drop) I/O Devices SIS I/O Device SIS Data Servers Logic Solvers I/O Channels


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Note: Sixteen I/O channels are also included under each Logic Solver and they appear in the Studio WorkPad area.

3. Right-click on I/O Channels and select Open. The I/O Channel window appears.

Figure 66: I/O Channel window (Config tab)

4. Enter the following attributes for the I/O Channel in the Config tab. Each channel type has the same attributes in the Config tab .


Channel Number Name of the channel (1 through 16)

Enabled When box is checked, the channel is enabled and can be used.

Channel Type Type of channel that will be used: Undefined Channel Type. Analog Input Channel (see page 273). HART Analog Input Channel (see page 275). HART Two-state Output Channel (see page 277). Digital Input Channel (see page 279). Digital Output Channel (see page 280).

Ovation Point Name of the Ovation point that is assigned to the channel.

I/O channel CRC (see page 2)

CRC code which reflects the configuration of this I/O channel as calculated by the Ovation Developer Studio and is compared with the code that is calculated by the Logic Solver at load time.

5. After you have defined the attributes in the Config tab, use the applicable Attributes tab to enter values for the selected Channel Type.

6. After you have entered the applicable attribute values in the Attributes tabs, select OK.


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6.13.1 Configuring an Analog Input Channel

1. After you have configured the Config tab (see page 271) for an Analog Input channel, use the following Attributes tab to configure an Analog Input Channel.

Figure 67: I/O Channel window for SIS Analog Input channel (Attributes tab)

Attributes for Analog Input Channel


NAMUR alarming When this box is checked, NAMUR alarming is performed on the channel. If enabled and if the transmitter supports it, any analog value that is outside the NAMUR limits (106.25% top limit and -2.5% bottom limit) for four seconds has its status marked as BAD:Sensor Failure. (NAMUR is an international association of automation technology in process control industries.)

Analog over range pct

The percent value at which the analog value is considered overrange. If the signal is above this limit, its status indicates the value is limited high.

Analog under range pct

The percent value at which the analog value is considered underrange. If the signal is below this limit, its status indicates the value is limited low.

Conversion type Raw data is converted to point values. Indirect is the only type of conversion currently in use.

Bottom of Scale The low scale value, engineering units code, and number of digits to the right of the decimal point associated with OUT.

Top of Scale The high scale value, engineering units code, and number of digits to the right of the decimal point associated with OUT.


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Bad if limited When this box is checked, point status is BAD if the point value is outside of the configured over/under range.

2. Enter the applicable Attributes and select OK.


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6.13.2 Configuring a HART Analog Input Channel

1. After you have configured the Config tab (see page 271) for a HART Analog Input channel, use the following Attributes tab to configure a HART Analog Input Channel.

Figure 68: I/O Channel window for SIS HART Analog Input channel (Attributes tab)


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Attributes for HART Analog Input Channel


Loop current mismatch detection

When checked, you can enable the detection of a loop current mismatch between the analog and digital current values from the HART device.

Analog over range pct

The percent value at which the analog value is considered overrange. If the signal is above this limit, the status of the Function Block's Analog parameter associated with this channel is high limited.

Conversion Type Raw data is converted to point values. Indirect is the only type of conversion currently in use.

Bottom of Scale The low scale value, engineering units code, and number of digits to the right of the decimal point associated with OUT.

Top of Scale The high scale value, engineering units code, and number of digits to the right of the decimal point associated with OUT.

Bad if Limited When this box is checked, point status is BAD if the point value is outside of the configured over/under range.

Analog under range pct

The percent value at which the analog value is considered underrange. If the signal is below this limit, its status indicates the value is limited low.

Enable NAMUR alarming

When this checkbox is checked, NAMUR alarming is performed on the channel. If enabled and if the transmitter supports it, any analog value that is outside the NAMUR limits (106.25% top limit and -2.5% bottom limit) for four seconds has its status marked as BAD:Sensor Failure. (NAMUR is an international association of automation technology in process control industries.)

HART Errors

Ignore PV Out out Limits

This field is reserved for future releases.

Ignore Analog-Digital Mismatch


Ignore PV Output Saturated


Ignore PV Output Fixed


Ignore Loss of Digital Comms


Ignore Field Device Malfunction




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6.13.3 Configuring a HART Two-state Output Channel

1. After you have configured the Config tab (see page 271) for a HART Two-state Output channel, use the following Attributes tab to configure a HART Two-state Output Channel.

Figure 69: I/O Channel window for HART Two-state output channel (Attributes tab)


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Attributes for HART Two-state output Channel


Loop current mismatch detection

When checked, you can enable the detection of a loop current mismatch between the analog and digital current values from the HART device.

The slot 0 device code from the AO card

The slot 0 device variable code sent digitally from the Analog Output card. Defines the HART variable whose data is reported by HART_VAL0.







Enabled HART slot 0 When checked, HART slot 0 is enabled and can be used.




4th Variable Point Name

Variable returned by HART transmitter, in Engineering Units. Read digitally.

Primary Variable Point Name


Second Variable Point Name


Tertiary Variable Point Name


HART Errors

Ignore PV Out out Limits


Ignore Analog-Digital Mismatch


Ignore PV Output Saturated


Ignore PV Output Fixed


Ignore Loss of Digital Comms


Ignore Field Device Malfunction




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6.13.4 Configuring a Digital Input Channel

1. After you have configured the Config tab (see page 271) for a Digital Input channel, use the following Attributes tab to configure a Digital Input Channel.

Figure 70: I/O Channel window for SIS Digital Input channel (Attributes tab)

Attributes for Digital Input Channel


Detect open and short circuit

When this box is checked, this enables the card to detect open and short circuits in field wiring, provided that external resistors have been added to the wiring.

Inverted When this box is checked, the value reported by the LSDI algorithm will be the opposite value of that on the physical input channel.


Once the Input channel is defined, a corresponding Ovation raw input point needs to be created.

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6.13.5 Configuring a Digital Output Channel

1. After you have configured the Config tab (see page 271) for a Digital Output channel, use the following Attributes tab to configure a Digital Output Channel.

Figure 71: I/O Channel window for SIS Digital Output channel (Attributes tab)

Attributes for Digital Output Channel


Detect open and short circuit

When this checkbox is checked, this enables the card to detect open and short circuits, provided that external resistors have been added to the wiring.



Prerequisites

Make sure you have added and configured an SIS network (see page 238). Make sure you have added and configured an SIS Data Server (see page 241). Make sure you have added and configured a Network switch (see page 244). Make sure you have added an I/O device number (see page 250). Make sure you have added and configured an SIS I/O device (see page 250). Make sure you have assigned a SIS Data Server (see page 255) to the SIS I/O device. Make sure you have added and configured an SIS Logic Solver (see page 263).

Procedure



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2. Select the desired Logic Solver. The four control modules for that Logic Solver appear in the Studio tree under the Logic Solver.

3. Right-click on the desired control module and select Open. The following window appears.

Figure 72: Control Module window (Config tab)


Control Module CRC CRC code which reflects the configuration of this control module as calculated by the Ovation Developer Studio and is compared with the code that is calculated by the Logic Solver at load time.

User Documentation

Module Name Name of the control module which is contained in the Logic Solver.

Module Number Number of the control module which is contained in the Logic Solver.

Module Revision Revision of the control module which is contained in the Logic Solver.

Diagnostic/Status

Ovation Point Name Enter the name of an Ovation point that will hold status information.

6.15 To configure SIS digital points for alarming with timestamps

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Note: When you attempt to load an SIS Logic Solver (see page 285), a Confirm window appears that lists all the SIS devices for that Logic Solver that may be affected by the load. The previous CRC value for each device is listed and the Current CRC value is also listed. The Current value is the CRC value that the device will change to if you continue with the load process.


1. Create an Ovation point through the use of DBID or manually add a point using the Ovation Developer Studio. (Refer to Planning Your Ovation System for information about DBID or to the Ovation Developer Studio User Guide for information about adding a point.)

2. If you want to configure digital points for alarms that display a timestamp, perform the following:

a) Use the Developer Studio system tree to navigate to the Alarm item:

System (or appropriate level such as Network, Unit, or Drop) Configuration Alarm

b) Right-click on the Alarm item and choose Open. The Alarm window appears.

c) Scroll to select the Alarm Display tab by using the horizontal scroll bar.


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d) Select Yes for the Show Millisecond Resolution field, and 100 Milliseconds for the Millisecond Format field. All points under this setting in the tree will now contain these settings for timestamps.

Note: Check to confirm that the OPP Rate for the point is set to U (User Defined). You can use Point tab in the Point Information tool to verify the setting.

3. Download the changes to the drop and reboot the drop for the changes to take effect.

4. In order to make the new point an SIS point, open the Control Builder and use the point on an SIS control sheet. Save the control sheet. (Refer to the Ovation Control Builder User Guide for more information.)

5. Access the Ovation Developer Studio hierarchy tree. The point now appears in the SIS Points folder under the SIS Data Servers folder.

6. Load the control sheet to the Logic Solver.

7. The point now appears in the SIS Points folder under the Logic Solvers folder.

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6.16 To view SIS points

SIS points will appear in the WorkPad section of the Studio interface after the applicable Logic Solver has been successfully loaded. When the Logic Solver is loaded, the points will move from the parent Data Server to the Logic Solver.

Procedure

1. Use the system tree to navigate to the SIS Points folder:

System Networks Drops (appropriate Controller drop) I/O Devices SIS I/O Device SIS Data Servers Logic Solvers SIS Points

2. Click on the Applicable points icon (Analog, Digital, or Algorithm) and any points that have been loaded into the parent Logic Solver display in the WorkPad section.

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IN THIS SECTION

Loading Logic Solvers.....................................................................................................285 Using Point Information (PI) to identify SIS points ..........................................................287 Viewing SIS Tuning windows for SIS algorithms ............................................................290 Forcing an algorithm input value.....................................................................................298 Restarting a Logic Solver ................................................................................................307 Requiring a reset before outputs can become energized ...............................................309 Configuring the Logic Solver's response to detected faults ............................................309 Choosing the Logic Solver scan rate ..............................................................................315 Loading to a running process..........................................................................................315 Restarting a Logic Solver after a power failure ...............................................................316 Proof testing the Logic Solver .........................................................................................316 Customizing your Ovation Control Builder frame............................................................318 Upgrading SIS firmware ..................................................................................................319 Using Fault Codes for SIS (66, 3, 8) ...............................................................................321 SIS Diagnostics...............................................................................................................322 SIS Logic Solver events ..................................................................................................324

7.1 Loading Logic Solvers

Logic Solvers contain the SIS logic solving capability and provide an interface to 16 I/O channels. When you want to update the logic solving for your safety applications, you may need to load new or edited logic into the Logic Solver.

7.1.1 To load an SIS Logic Solver

Prerequisites

Make sure you have SIS load privileges.

Procedure

All loads to Logic Solvers are total loads. Incremental loads are not allowed and you cannot load multiple Logic Solvers at the same time.


S E C T I O N 7

Using Ovation SIS

7.1 Loading Logic Solvers

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3. Select the Logic Solver you want to load.

4. If the Logic Solver is locked, right-click and select Unlock. A confirmation dialog window appears.

5. On the confirmation dialog, click Confirm to unlock the Logic Solver.

Note: Locking or unlocking a Logic Solver generates an event in the event log.

6. Navigate to the Logic Solver in the SIS Network.

7. Right-click and select Load.

8. A Confirm window appears listing the Previous CRC codes and Current CRC codes of the Logic Solver, the four control modules, and the I/O channels.

The Previous CRC values are the codes of the object before you perform a load to the Logic Solver.

The Current CRC values are the codes that the object will have after you perform a load to the Logic Solver.

If you select Yes to continue the load function, new CRC values for any objects that will change will appear in the Current CRC column and there will be an asterisk (*) in front of the device.

7.2 Using Point Information (PI) to identify SIS points

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Notice in the following Confirm window that there are asterisks in front of the I/O Channels that have changed after the Logic Solver was loaded.


You can use the Point Information window to locate SIS points in a system and to determine if a point is a SIS point. The Point Information window provides the following information about a selected point (refer to the Ovation Operator Station User Guide for additional information about the Point Information function):

The point name (PN record field) displays at the top of the window. All points in the Ovation system are fully specified by three parameters:

Point name

24-character maximum for Windows systems.

Six-character maximum sub-network (unit) name.


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Eight-character maximum network name.

The fully qualified name is of the format “name. unit@network.” The (.) and @ are reserved characters for point names.

The description, point value, quality, and engineering units for analog points display below the point name.

The point attributes display by selecting the applicable tabs. The point record field that corresponds to the parameter name is listed beside the

parameter. A point record stores the information which defines the attributes of a point. Point records are used within each drop, and to communicate over the Ovation network to other drops.

The Ovation system has 11 record or point types. (Refer to the Ovation Record Types Reference Manual for additional information about point records.)

The point information displayed in the lower portion of the window displays using a folder format. The tabs are labeled and the information related to the tab label displays below when the tab is selected. When a valid point name is entered, information for the point displays for the first tab, the Point tab.

The SIS Indication (KC) field identifies if a point is a SIS point. The action buttons Cancel and Apply are active only when a tab with modifiable data is

selected. Last Active Instance (LAI) - displays in the right bottom corner of the window. This identifies

the Point Information window that is currently active. Point status information displays in the left bottom corner of the window.

Note: Value and status fields update once every second. The remaining point attributes update once every three seconds. Point Information requests a one-shot every three seconds to make sure it has the latest static data.

7.2.1 To use Point Information to identify SIS points

Prerequisites

Make sure the Ovation point exists and is in the database.

Procedure

1. Open the Ovation Applications folder at the Operator Station and double-click on the Point Information icon.

OR

If the Point Information application is already running, double click on the PI icon located on the system tray.

OR

Select Start -> Ovation -> Ovation Applications -> Point Information.

The Point Information window appears.

2. If you know the name of the desired point, type in the name and press Enter. The Point Information window appears for that point.

3. If you do not know the name of the desired point, click the Search button in the Point Information window or select from the File pull-down menu. The Find Points window appears.


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4. Select the appropriate network, unit, and drop. A scrolling list of all the points for that drop appears. To discontinue or change the search, click the Abort Search button.

5. Double click on the desired point name in the list or select the point and click the Apply button. The Point Information window appears for that point.

6. Select the Config tab.

Figure 73: Point Information window

7. Check the SIS Indication field at the bottom of the window. If the point is a SIS point, the value will be 1 or greater. If the point is not a SIS point, the value will be zero (0).

7.3 Viewing SIS Tuning windows for SIS algorithms

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SIS algorithms can be viewed and tuned through an SIS Tuning window in the Signal Diagram application.

All of the SIS algorithms have SIS Tuning windows. If the SIS algorithm has tunable parameters, they are tuned through the SIS Tuning window -- not through the Property Summary window. If the SIS algorithm does not have tunable parameters, the tunable column in the SIS Tuning window appears blank.

For certain SIS algorithms, the SIS Tuning window has an extra tab. The information in this tab is read-only, and contains the information that was entered in the advanced editing window in the Control Builder. The algorithms that have the extra tab are:

LSCALC (see page 291). LSCEM (see page 292). LSSEQ (see page 294). LSSTD (see page 296).

Note: For more information on the SIS algorithms, refer to Ovation Algorithms Reference Manual.

7.3.1 To access the SIS Tuning window for SIS algorithms

To access the SIS Tuning window for SIS algorithms, follow the steps below:

1. Access the Signal Diagram window.

2. Select a sheet from the Open Document window.

3. The sheet appears on the display canvas. Right-click on the desired SIS algorithm on the sheet. Select Advanced Tuning from the menu that appears.

The SIS Tuning window applicable to that algorithm displays. See Ovation Algorithms Reference Manual for information on SIS algorithms.


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7.3.2 SIS Tuning window for the LSCALC algorithm

Figure 74: LSCALC SIS Tuning window -- Properties Summary tab

Figure 75: LSCALC SIS Tuning window -- Program tab


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7.3.3 SIS Tuning window for the LSCEM algorithm

Figure 76: LSCEM SIS Tuning window -- Properties Summary tab


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Figure 77: LSCEM SIS Tuning window -- Cause and Effect Table tab


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7.3.4 SIS Tuning window for the LSSEQ algorithm

Figure 78: LSSEQ SIS Tuning window -- Properties Summary tab


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Figure 79: LSSEQ SIS Tuning window -- Sequence Table tab


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7.3.5 SIS Tuning window for the LSSTD algorithm

Figure 80: LSSTD SIS Tuning window -- Properties Summary tab


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Figure 81: LSSTD SIS Tuning window -- State Transition Table tab

7.4 Forcing an algorithm input value

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A SIS Force operation occurs when you manually change a value for an algorithm input parameter. This means the value is "forced."

For example, you might want to see the behavior of an algorithm when it has a certain input value. However, the algorithm might not currently have the input value you need. You can use a Signal Diagram (see page 298) to temporarily force the input value of the algorithm in order to observe the behavior.

You cannot force the output of an algorithm to a particular value; you can only force the input to a particular value. However, before you can force an input value for an SIS algorithm, you must turn on the Debug Mode.

The Debug Mode is where you can perform functional testing of safety logic by forcing input values for algorithms (see page 298).

After you have forced an input value, a blocking icon will appear at the end of the forced input pin of the algorithm in the Signal Diagram. This icon will also appear next to the current value in the Algorithm Summary window. This icon illustrates that the value for the input signal is currently forced and cannot be updated by the system.

Note: Remember to remove the forced input value when you want the algorithm to execute normally.

7.4.1 To force an algorithm input value

Prerequisites

Make sure the applicable control sheet has been successfully loaded into the Controller and the Logic Solver.

Procedure

1. Access the Signal Diagram window:

From the Operator Station Ovation Applications icons or from a Point Menu (see Ovation Operator Station User Guide for details).

OR

From the Control Builder (see Ovation Control Builder User Guide for details).

2. Navigate to a sheet in the Open Document window. See Ovation Control Builder User Guide for more information.

3. Double-click on the sheet and the sheet appears on the display canvas of the Signal Diagram window.

4. Right-click on the desired algorithm on the sheet and select Advanced Tuning from the menu.


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The SIS Tuning window appears with the selected algorithm name at the top of the window. The following steps provide an example of how to use the SIS force function.

5. Select the Force button. The Force Value window for the selected algorithm appears.

The following table describes the fields and buttons in the Force Value window.

F I E L D DE S C RI P T I O N

Turn Debug ON Use to enter the Debug Mode.

Turn Debug OFF Use to leave the Debug Mode.


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F I E L D DE S C RI P T I O N

Force Inputs

Pin Name Pull-down list of all the algorithm pins whose values can be forced. Name of the pin whose input value you want to force to another value.

Forced Value Displays the value to which the pin if forced, if applicable.

Forcing Name of pin whose value is being forced.

Forced Value Entry field into which you enter the value to which you want to force the pin.

Set Force button Sets a new forced value for the pin.

Clear Force button Clears or removes the forced value from the pin.

Set Value button Use this button to change the value of an already forced value for a pin.

Apply button Applies the changes you made.

6. If Debug is OFF, press the Turn Debug ON button and continue to Step 7.

If Debug is ON, skip to Step 9.

Note: When you turn on the Debug Mode, you set the Debug Mode for the entire Control Module and all of the SIS control sheets in that module.

7. A Confirm window appears asking you to confirm that you want to enter the Debug Mode. Select Confirm. (The SIS Write function checks to verify that the process is valid.)

8. The Enter Debug window appears informing you that you have successfully entered the Debug Mode. Select the OK button.

9. The Force Value window now displays showing that you are in Debug Mode. Select from the Pin Name list the desired pin whose value you want to force.


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10. Enter the desired value in the Forced Value entry field and select Apply.

11. A Confirm window appears asking you to confirm that you want to force the value of the selected pin. Select Confirm. (The SIS Write function checks to verify that the process is valid.)


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12. The Set Force window appears informing you that you have successfully forced the value of the pin. Select the OK button.

13. The Force Value window now displays showing the forced value in the Forced Value list.

Note: A blocking icon will appear on the end of the forced input pin of the algorithm in the Signal Diagram. This icon will also appear next to the current value in the Algorithm Summary window. This icon illustrates that the value for the input signal is currently forced and cannot be updated by the system.

14. After you have forced the pin value, you can do one of the following:

Set a new forced value for the pin. (See Set a new forced value.)

Clear the force (See Clear the force and leave Debug Mode.)

See Ovation Safety Instrumented System (SIS) User Guide for information on setting and clearing forced values.

Set a new forced value

1. If you decide to set a new forced value for a pin whose value is already forced, do the following in the Force Value window:

a) Select the Pin Name

b) Enter a new value in the Forced Value field.

c) Select the Set Value button.


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d) Select the Apply button.

2. A Confirm window appears asking you to confirm that you want to force the value of the selected pin. Select Confirm. (The SIS Write function checks to verify that the process is valid.)


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3. The Force new value window appears informing you that the value of the pin has been forced. Select the OK button.

4. The Force Value window now displays showing the new forced value in the Forced Value list.

You can clear the force now or set a new forced value again.

Clear the force and leave Debug Mode

1. If you decide to clear the forced value for a pin, do the following in the Force Value window:

a) Select the Pin Name.

b) Select the Clear Force button.


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c) Select the Apply button.

2. A Confirm window appears asking you to confirm that you want to clear the forced value of the selected pin. Select Confirm. (The SIS Write function checks to verify that the process is valid.)


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3. The Clear Force window appears informing you that the forced value of the pin has been cleared. Select the OK button.

4. Emerson recommends that you leave Debug Mode when you are done with your forcing tasks.

Select the Turn Debug OFF button in the Force Value window.

5. A Confirm window appears asking you to confirm that you want to leave Debug Mode. Select Confirm. (The SIS Write function checks to verify that the process is valid.)

7.5 Restarting a Logic Solver

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6. The Leave Debug window appears informing you that you have left Debug Mode. Select the OK button.


The Ovation SIS system supports redundant Logic Solvers. A redundant Logic Solver consists of a pair of Logic Solvers mounted in adjacent carrier slots with a redundant terminal block. Each Logic Solver is powered separately. The Logic Solvers contain the same configuration and run the same logic.

If you have a redundant Logic Solver configuration, you might need to do one of the following actions to a redundant Logic Solver:

Restart the active Logic Solver. Restart the standby Logic Solver. Switch the active Logic Solver to the standby mode, and the standby Logic Solver to the

active mode.

Note: If you must restart a simplex Logic Solver online, such as for proof testing, you need to temporarily bypass or block final elements and provide manual supervision.

7.5.1 To restart (reboot) a Logic Solver





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3. Right-click on the Logic Solver you want to restart and select Reboot. A Restart Wizard window appears.

4. Select the desired action:

Force Restart Active = Restarts the active Logic Solver.

Force Restart Standby = Restarts the standby Logic Solver.

Switchover = Switches the active Logic Solver to standby, and the standby becomes the active Logic Solver.

5. Select the Finish button. A confirmation dialog window appears.

6. On the confirmation dialog, click Confirm to restart the selected Logic Solver or to switch the active Logic Solver to standby, and the standby Logic Solver to active.

7.6 Requiring a reset before outputs can become energized

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7.6 Requiring a reset before outputs can become energized

The configuration of SIS module logic determines which conditions allow de-energized output channels of the Logic Solver to become energized.

It is generally desirable to require an operator reset of the Logic Solver before the equipment under control is allowed to go from a shutdown or tripped state to the normal operating state. However, in some cases, the output channels should be allowed to change from de-energized to energized based on input channel values without operator intervention, for example, as soon as an interlock condition clears.

Ovation SIS algorithms provide an easy way to configure SIS module logic to either require or not require an operator reset before applicable output channels can become energized.

There are certain situations where a powered Logic Solver keeps output channels de-energized independent of SIS module logic. When the Logic Solver is going through power-up testing following a reset or restart, has detected a persistent fatal error, or is in an unconfigured state, output channels remain de-energized. Otherwise, SIS module logic determines the output channel state.

The recommended technique for requiring an operator reset is to use the Cause Effect Matrix (LSCEM (see page 113)) algorithm. It has an RRSn (required reset) parameter or each extensible EFFn (output effect) output of the algorithm. Each EFFn output is connected to one or more output algorithms, which are bound to output channels. When RRSn is True (the default value), the EFFn output cannot transition from 0 to 1 unless STAn (current state) is “Ready to Reset” and RSTn (reset) has been changed to True, typically by an SIS Write from an Ovation Operator station. When RRSn is False, EFFn can transition from 0 to 1 when associated CSn (input cause) have become inactive and other permissives are satisfied, without a reset.

The “require reset” option is also available in the two output algorithms, but it should be used only if there is no LSCEM algorithm in upstream SIS module logic.

7.7 Configuring the Logic Solver's response to detected faults

It is important to consider the status of the input and output channels of the Logic Solver, as BAD status may indicate a problem that must be addressed. The following topics are described below:

Detecting faults on input channels (see page 310) Detecting faults on output channels (see page 314)


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7.7.1 Detecting faults on input channels

Faults detected by the Logic Solver on input channels can originate in field devices, field wiring, or in the Logic Solver input circuitry.

The Logic Solver responds to faults detected on input channels by integrating BAD status with the channel value and annunciating the fault.

The Logic Solver does not automatically de-energize output channels when faults are detected on input channels. SIS module logic must be configured to take action based on the requirements of the application. For example, you may want to prevent a trip from occurring in the presence of a fault on an input channel, or cause a trip immediately when a fault is detected, or initially prevent a trip yet cause a trip some time later if the fault persists. SIS algorithms contain parameters to facilitate the configuration of these options.

You have some control over how BAD status on input channels can get into SIS modules. Certain input channel parameters and algorithm parameters impact the detection of faults on input channels and whether BAD status becomes available to SIS module logic.

Handling BAD status on analog input channels

An analog input channel (see page 273) always has BAD status when the measured current is outside the sensor failure limits, 0.78 mA (-20.12%) and 22.66 mA (116.6%). The limits can be exceeded due to faults in the transmitter, field wiring, or the Logic Solver. You can also cause the channel to have BAD status when the current reaches a value inside the sensor failure limits.

Changing the "Enable NAMUR alarming" channel parameter to True enables NAMUR limit detection, which results in BAD status being applied when the current is greater than 21.0 mA (106.25%) or less than 3.6 mA (-2.5%) for four consecutive seconds.

When the channel value exceeds the channel’s configured "Analog over range pct" or "Analog under range pct," high-limited or low-limited status is applied to the channel. The SOP8 parameter in the Analog Input (LSAI) algorithm has a “BAD if Limited” option. When the LSAI algorithm’s referenced input channel has high or low limited status, the algorithm applies BAD status to its PV and OUT parameters if the option is enabled.

The HART Analog Input channel’s (see page 275) HART related error parameters allow you to select which HART diagnostic conditions detected in the HART transmitter or by the Logic Solver cause BAD status to be integrated with the analog value on the channel (the "BAD if Limited" channel parameter). The default value of these parameters is to ignore all HART diagnostic errors, meaning the presence of an error condition does not cause BAD status on the channel. If you deselect “Ignore Field Device Malfunction,” for example, the channel has BAD status if the transmitter reports a device malfunction, allowing this HART diagnostic to be integrated with your SIS module logic.


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Handling BAD status on digital input channels

Faults detected on digital input channels (see page 279) by the Logic Solver result in BAD status on the channel. The Logic Solver detects open and short circuits in field wiring if line fault detection has been enabled on the channel using the "Detect open and short circuit" parameter. When line fault detection is enabled, you must use a NAMUR sensor or install end of line resistors in series and parallel. An open or short detected through line fault detection results in BAD status on the channel.

Line fault detection is required when the field switch is normally open, that is, when the channel is On to indicate a demand.

Line fault detection is recommended when the field switch is normally closed, that is, when the channel is Off to indicate a demand. If an open circuit occurs in the field wiring, it is a safe failure whether or not line fault detection has been enabled. But a short in the field can be a dangerous failure and be undetected, unless line fault is enabled, in which case the channel has BAD status.


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Using BAD Status in SIS Modules

Two algorithms are available in SIS modules to manipulate output channels: the Digital Output (LSDO (see page 150)) algorithm and the Digital Valve Controller (LSDVC (see page 157)) algorithm. Each has a CASND input parameter whose value is the commanded state for the output channel, which is connected from upstream logic in the SIS module. When the status of CASND changes to BAD, the algorithm starts a timer whose value is stored in the FTMR (fault detection timer) parameter. If and when the timer reaches the configured FTIM (fault detection delay) value, the algorithm enters the fault state if theFOP2 (Enable detection based on CASND status) option is enabled. The algorithm drives the output channel Off when it is in the fault state.

SIS algorithms have a predetermined way of propagating the status of input parameters to output parameters. Faults detected on input channels cause BAD status to reach output algorithms in SIS modules depending on the configuration of other algorithms in the SIS module.

The configured value of FTIM in output algorithms determines how long status can be BAD before the output algorithm initiates a trip. The default value is 300 seconds, which gives enough time for operators to bypass a BAD input and take corrective action before a trip is initiated. Use an appropriate value for FTIM in each output algorithm. Some SIFs (see page 6) can tolerate a high number corresponding to your allowed repair time, while other SIFs may require a low number of just a few seconds.

The following figure illustrates the use of common SIS algorithms to create shutdown logic in an SIS module. The status on the output parameter of the input algorithms, LSAI and LSDI, is the status of the referenced input channel. The Analog Voter (LSAVTR (see page 82)) and Digital Voter (LSDVTR (see page 169)) algorithms propagate BAD status on input parameters selectively. For example, if a single input of a 1oo2 (1 out of 2) or 2oo3 (2 out of 3) voter algorithm has BAD status, OUT continues to have GOOD status because there are enough good inputs for a real process demand to cause a trip. However, if a single input of a 1oo1 or 2oo2 voter algorithm has BAD status, its OUT has BAD status. If a CSn (input Cause n) input of a Cause and Effect Matrix (LSCEM (see page 113)) algorithm has BAD status, all EFFn (output Effect n) outputs associated with that input have BAD status.

LSAVTR, LSDVTR, and LSCEM algorithms have a configurable SOPT parameter, which impacts how the algorithms determine the value of their output parameter(s) based on the status of their inputs. These algorithms determine the status of their output parameter(s) by fixed status propagation logic unique to the algorithm and independent of the SOPT parameter. This assures that if BAD status is capable of preventing a process demand from causing a trip, BAD status propagates to the output algorithm(s). Refer to the LSAVTR, LSDVTR, and LSCEM algorithm documentation for more detail on the impact of the SOPT parameter in these algorithms.


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7.7.2 Detecting faults on output channels

Faults detected by the Logic Solver on output channels (see page 280) can originate in field devices, field wiring, or the Logic Solver output circuitry. As with input channels, the Logic Solver responds to faults on output channels by integrating BAD status with the channel value and annunciating the fault.

A fault on an output channel does not prevent the output from being de-energized if there is a demand to trip on that channel. Suppose a Digital Output channel is stuck On due to a fault in the output circuitry. When SIS module logic detects a process demand to trip and the LSDO algorithm drives the channel Off, power remains On as a result of the fault. However, the Logic Solver reads back the output as still being On and initiates a reset, which opens the master power switch and de-energizes all output channels on the Logic Solver.

When the "Detect open and short circuit" parameter on Digital Output channels is True (the default value), the Logic Solver detects and annunciates stuck On conditions by means of periodic pulse testing. In this way a failed unit can be replaced before a demand occurs, thereby avoiding a trip on all output channels. The "Detect open and short circuit" parameter should remain configured as True unless the final element cannot tolerate the 1 millisecond Off pulse during each 50 millisecond period.

If the Logic Solver detects an open or short in field wiring or the output circuitry, it integrates a special status with the channel value called BAD SensorFailure LowLimited. Output algorithms detect this status on the referenced output channel and optionally drive the output channel Off. If the “Enable detection based on output channel status” option is set in the algorithm’s FOP3 parameter, the algorithm enters the fault state and drives the channel Off immediately upon detection. The FTIM value is not used in this case.

An open or short in field wiring implies the final element is in the de-energized state. Therefore the default value for the FOP3 parameter drives the channel Off when an open or short is detected. In order to keep the channel Off after it is driven Off, an operator reset must be required somewhere. The reset can be on the final element itself, in the output algorithm, or in the upstream LSCEM algorithm.

The following figure shows an example of using an LSCEM algorithm for latching an output Off.

7.8 Choosing the Logic Solver scan rate

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The CS3 input of the LSCEM (see page 113) algorithm has a value of 1 when neither output algorithm is in the fault state. FSTAT is normally an internal parameter, but in this example, it is exposed as an output parameter on the LSDO and LSDVC algorithms and connected to an LSNOR algorithm. If either output algorithm detects an open or short on its referenced channel, a trip occurs on EFF1 of the LSCEM algorithm and both output algorithms drive their outputs Off (because CASND becomes 0). The algorithm that detected the open or short had already driven its output Off. The outputs remain Off until an operator reset is done on EFF1 by changing RST1 of the LSCEM algorithm to True. The fault state condition clears when a Digital Output channel is driven Off because the diagnostic no longer detects the condition. The same is true for a HART Two-state Output channel when OFCUR is “0 milliamps.”

This technique applies to the case where a coordinated trip of multiple final elements is required when any of the final elements involved in an interlock becomes de-energized due to an open or short. If you want to drive Off only the output with the open or short, use a separate LSCEM Effect output for each output algorithm and connect FSTAT into a separate Cause input.

In some applications it may not be desirable to drive an output Off when an open or short is detected. For example, you may want the final element to become energized without operator intervention whenever an intermittent short clears. In this case, disable the FOP3 parameter in the output algorithm.

7.8 Choosing the Logic Solver scan rate

The default scan rate (see page 267) for SIS module execution in the Logic Solver is 50 milliseconds. You can change the scan rate to 100, 150, or 200 milliseconds from the SLS properties dialog in Ovation Explorer. Increasing the Logic Solver scan rate value impacts the execution rate of SIS modules. But diagnostic cycle times in the Logic Solver remain constant, with the exception of the main processor comparison diagnostic, which is a function of SIS module scan rate.

The recommended scan rate to use whenever possible is 50 milliseconds. This scan rate minimizes the input to output response time. The only reason to change the scan rate beyond the default 50 milliseconds is if the Logic Solver is not able to execute the SIS module or modules at the configured scan rate.

7.9 Loading to a running process

If you anticipate a need to make online changes to SIS module logic, that is, to load Logic Solvers that are protecting a running process, you should ensure the load does not disrupt the process.

Locking a Logic Solver prevents it from being loaded. Locking also prevents a user-initiated Logic Solver switchover. To be able to lock or unlock a Logic Solver you must have the SIS Can Load privilege. A Logic Solver must be unlocked before you can load to it (see page 285). If you attempt to load a locked Logic Solver, you are given the opportunity to unlock the Logic Solver and continue.

7.10 Restarting a Logic Solver after a power failure

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7.10 Restarting a Logic Solver after a power failure

A restart occurs after power is restored to a Logic Solver that had a running configuration prior to losing power for less than 10 days. During a restart the Logic Solver reapplies the last loaded configuration and restores parameters that had been saved to non-volatile memory. At the time power is lost, outputs of the Logic Solver are de-energized, which should result in the same output state as after the original load. After a restart the goal is to retain the same process state that occurred as a result of the power failure, yet to restore the parameter values that were saved to non-volatile memory, which are more current than the last loaded values.

7.11 Proof testing the Logic Solver

Logic Solvers must be proof tested periodically to ensure there are no dangerous faults present that are not being detected by continuous runtime diagnostics. A manual proof test for a Logic Solver is initiated from the Developer Studio and causes the Logic Solver to go through reset and power-up testing. Proof testing of Logic Solvers can also be done automatically.

Immediately following successful power-up testing, there are no known dangerous faults present. Choose the proof test interval for a Logic Solver based on the associated SIF requiring the shortest proof test period to achieve the required probability of dangerous failure for its Logic Solver subsystem.

The Logic Solver proof test timer automatically counts the number of days since the last reset occurred. The Logic Solver configuration dialog in Developer Studio has a Proof Testing tab for entering the required proof testing interval and a reminder time value. See Logic Solver configuration for information about the fields in this tab (see page 268).

Figure 82: SIS Logic Solvers configuration dialog (Proof Testing tab)

7.11 Proof testing the Logic Solver

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The Logic Solver provides an alert when the number of days since the last reset exceeds the configured time. A reminder alert occurs a configured number of days before the “exceeds” alert to assist maintenance personnel in the planning of manual tests.

The proof test timer for a redundant Logic Solver indicates the number of days since the last reset of the Active unit, which always occurs earlier than the last reset of the Standby.

7.11.1 Automatic proof testing

Automatic proof testing is available for redundant Logic Solvers only. The Proof Testing tab of the Logic Solver configuration dialog has an “Enable automatic proof test to run at reminder time” check box (this check box is grayed-out for simplex Logic Solvers). When checked, the Logic Solver performs the proof test when the number of days since the last reset reaches the configured time. The test begins five minutes after the Logic Solver sets the reminder alert. In this case the reminder alert informs the operator that a test will occur soon so that the "Partner Not Available" alerts can be ignored after the test begins. At the time of automatic proof test:

The Active Logic Solver starts the test by initiating a switchover to the Standby Logic Solver. If the Standby Logic Solver is not available, the Active Logic Solver tries again in five minutes.

After switchover, the Standby Logic Solver becomes Active and the new Standby Logic Solver goes through reset and begins power-up testing. There is no adverse impact to the running process.

The new Active Logic Solver still has a proof test due, so it waits for its partner to become available then initiates a switchover. When the partner has become the Active Logic Solver, the new Standby Logic Solver goes through reset and power-up testing.

7.11.2 Manual proof testing

The following procedure should be used for manual proof testing of the Logic Solver.

Simplex Logic Solver

1. Initiating a manual reset on a simplex Logic Solver results in all outputs being de-energized. If you must proof test a simplex Logic Solver online, you need to temporarily bypass or block final elements and provide manual supervision.

2. The Logic Solver must be Unlocked to initiate a manual reset. Select the Logic Solver under SIS Network in the Developer Studio. Right-click on the Logic Solver and select Unlock. Click Confirm on the SIS Write confirmation dialog.

3. Right-click on the Logic Solver and select Reboot. The Restart Wizard appears. Select Force Restart Active from the options in the Restart Wizard window (see page 307). Clicking Confirm on the confirmation dialog results in all outputs being de-energized.

4. The Logic Solver goes through power-up testing and returns to the configured state. The proof test timer resets to 0.

Redundant Logic Solver

The procedure for a redundant Logic Solver allows the proof test to be done online without adversely affecting the running process.

1. The Logic Solver must be Unlocked to initiate a manual reset. Select the Logic Solver under SIS Network in the Developer Studio. Right-click on the Logic Solver and select Unlock. Click Confirm on the SIS Write confirmation dialog.

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2. Right-click on the Logic Solver and select Reboot. The Restart Wizard appears. Select Force Restart Standby from the options in the Restart Wizard window (see page 307). Clicking Confirm on the confirmation dialog results in all outputs being de-energized.

3. Wait several minutes for the Standby Logic Solver to complete power-up tests and become configured by the Active Logic Solver. The Partner Not Available maintenance alert goes inactive when the Standby Logic Solver is fully configured.

4. Right-click on the Logic Solver and select “Switchover.” Click Confirm on the confirmation dialog.

5. The previously reset Standby Logic Solver becomes the new Active Logic Solver and the new Standby Logic Solver goes through power-up tests and is configured by the new Active Logic Solver. The proof test timer is 0.

7.12 Customizing your Ovation Control Builder frame

Every control function, control library, and control macro begins with a template or blueprint that displays on the drawing canvas. This template, called the frame, contains a standard format that can be used to enforce a consistent look for all the items in a project. The format also contains information that identifies the item (sheet, library, macro) to the system and to the user. By placing this information in the frame, you do not have to enter it every time you create a new item.

The Control Builder provides an approved frame or template file, called the frame.svg file, which is shipped with the standard release of the Ovation system. All of the elements of the frame are defined in the frame.svg file.

You many want to customize a frame in order to more easily identify SIS control sheets. The SIS Data Server, Logic Solver, and Control Module are available as Document Values under the Draw menu.

Use the following procedure to create a SIS custom frame (Frame.svg) in the unit's ControlFunctions directory.

1. Copy the default frame (C:\Ovation\CtrlBldr\Frame.svg) into the ControlFunctions Directory.

2. Add a [Document Value] for cb-sis-server in the custom frame (Frame.svg). You may wish to add items for the Logic Solver and/or the Control Module at this time.

3. Recompile all the control sheets.

4. Load the Logic Solvers and control sheets. This document value will remain hidden on NON-SIS Control Functions.

Refer to the Ovation Control Builder User Guide for more information about creating frames and sheets, and adding document values.

7.13 Upgrading SIS firmware

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Future releases of Ovation software will potentially include updated firmware for the SIS components. It may not be necessary to upgrade the firmware in SIS hardware components when the remainder of the Ovation system is upgraded to a new release. But if a new SIS firmware revision has desired features or corrects a specific issue, you can upgrade to the new revision by installing files from an Ovation workstation to flash memory in the SIS component.

The following topics provide upgrade procedures:

To initially load or upgrade an SIS Data Server (see page 319). To upgrade an SIS Logic Solver (see page 320).

7.13.1 To initially load or upgrade an SIS Data Server

When you first receive an SIS Data Server, you must perform an initial load of the firmware. Subsequent loads of the SIS Data Server are considered to be upgrades.

Emerson provides firmware for the SIS components in your Ovation system. Firmware for the upgrade to your SIS Data Server consists of four Hex files and one UDF file. Use the following procedure to initially load or upgrade your SIS Data Server.

1. Retrieve the new SIS Data Server firmware from the path:

Ovation\SIS\firmware\OvSisSDSFirmware.zip

2. Unzip the files and store the four Hex files and one UDF file in an area where they can be easily accessed; (for example, C:\temp\sis)

3. Open a Command Prompt window and go to Ovation\OvationBase.

4. Enter the following:

OvSisCtlUpgConsole <SDS> -n <path to files>

where:

<SDS> = name or IP address of SIS Data Server to be loaded or upgraded

<path to files> = absolute path to Hex and UDF files

(for example, OvSisCtlUpgConsole 192.168.1.1 -n C:\temp\sis\InstallCtlR_MD.udf)

5. Press the Enter key.

6. The upgrade system files will load. The following text is an example of what displays in the Command Prompt window when the upgrade is finished:

Percent complete 100 Upgrade system load complete.

Target will now restart in upgrade mode.

Attempting to re-establish upgrade session.

Upgrade session re-established.

Upgrading CTLPPCSTART version (MD Controller Start Vector (Debug Component does not need to be loaded)

Component CTLPPCSTART upgrade COMPLETE.

Upgrading CTLPPCRECOVER version (MD Controller Recovery (Debug))


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Component does not need to be loaded

Component CTLPPCRECOVER upgrade COMPLETE.

Upgrading CTLPPCAPP version 10.3.0 (MD Controller Application (Debug))

7. The component load will begin. When finished, the following will display

Component load complete.

Component CTLPPCAPP upgrade COMPLETE.

----------------------------------------------------------------

Upgrade Completion Summary: <Normal Completion>

8. The SIS Data Server is now upgraded.

7.13.2 To upgrade an SIS Logic Solver

Emerson provides firmware for the SIS components in your Ovation system. Use the following procedure to upgrade your SIS Logic Solver (SLS):

Note: The typical upgrade time for a single Logic Solver is about eight minutes. If during the upgrade process there is a network failure, or the workstation which is hosting the upgrade application fails, you can restart the upgrade. To do so, repeat the procedure starting at Step 4.

1. Retrieve the new Logic Solver firmware package. It consists of four files:

1340.idf

IO_Compatibility.csv

SLSApp.hex

SLSBoot.hex

2. Store the four files in an area where they can be easily accessed; (for example, C:\temp\sis)

3. Clear the target SLS in the Developer Studio (see page 263).

4. Clear the Ovation Controller to which the target Logic Solver is assigned.

5. Run the upgrade application:

Ovation.Sis.Sls.Upgrade.Console.exe [SDS ip address/hostname] [logic solver number] [logic solver redundant] [full path to idf file]

where:

[SDS ip address/hostname] = IP address or hostname of the SIS Data Server which is supervising the Logic Solver that you are upgrading.

[logic solver number] = Number (1-32) of the physical Logic Solver that you are upgrading (this is not the carrier slot number).

[logic solver redundant] = Flag indicating whether the target Logic Solver is in a redundant configuration. Accepted values of this attribute are true or false.

[full path to idf file] = Fully qualified file name of the .idf file which is part of the firmware package, (for example, d:\sls-firmware\v.10.3\1340.idf

6. Confirm that you want to proceed with the upgrade by entering y when prompted.

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7. Wait for the application to terminate. The application will periodically output messages regarding the progress of the upgrade process. In the final step, it will report the status of the entire upgrade.

Warnings! Do not shutdown your computer or interrupt the upgrade process until it is completed. Failure to comply may result in corrupting the Logic Solver's flash memory and rendering the Logic Solver unusable. You MUST complete a full function test of the Logic Solver after a firmware upgrade.

7.14 Using Fault Codes for SIS (66, 3, 8)

The Ovation system generates fault codes and messages that you can use to diagnose workstation and system problems. This section details the fault codes and messages that are generated by the Safety Instrumented System.

To research other fault codes generated by your system, access the Ovation fault information tool at:

https://www.ovationusers.com/FIT/index.asp

You can find fault information on the System Status diagram and the Drop Details diagram. You can find further information in your Error Log Viewer.

Fault Code = FC (displayed in decimal in the Drop Details diagram). Fault ID = FK (displayed in hexadecimal in the Drop Details diagram). Fault Parameter 1 = FS (displayed in hexadecimal in the Drop Details diagram). Fault Parameter 2 = FO (displayed in hexadecimal in the Drop Details diagram). Fault Parameter 3, 4, and 5 (displayed in hexadecimal in the Solaris GMD or in the Windows

Error Log Viewer).

The SIS shadow algorithms have the following values:

Fault Code = 66 which indicates a Controller fault. Fault ID = 0x0003 which indicates an algorithm fault. Fault Parameter 1 =0x0008 which indicates a problem with an SIS shadow algorithm as it

appears in the Ovation Controller.

FAU L T PAR AM ET E R 2

DE S C RI P T I O N

0x0001 Logic Solver function number (Y1 field) is invalid.

Parameter 3 = Control module ID

Parameter 4 = Control sheet number

Parameter 5 = Algorithm execution order number for the control sheet

7.15 SIS Diagnostics

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FAU L T PAR AM ET E R 2

DE S C RI P T I O N

0x0002 Value in an algorithm field (TT field) is invalid.




0x0003 Auxiliary record for the algorithm cannot be found.




0x0004 XDB lock cannot be found and the algorithm did not update parameter and output values in that loop.




0x0005 There is a module revision mismatch between algorithm point configuration and Logic Solver module configuration.





You can perform diagnostics on your SIS system by referring to the bit values of the Node (RN) record of a point.

1. Access the Ovation Operator Station.

2. Access Point Information from your Ovation Applications folder at the Operator Station to view the node record (refer to the Ovation Operator Station User Guide for more information about the Point Information function).

3. Navigate to the Value/Status tab in the node record (the value used for the node record is the A2 field).

4. Review the collected bit information about the module or node.

SIS I/O driver status (Node Record, A2 field definitions)

BI T DE S C RI P T I O N SE T RE SE T DE T AI L S

0 Configured OK NCONF I/O Driver is configured. This bit is set by the I/O driver during the first pass.

1 Communication error ERROR Ok There is a communication error. The I/O driver cannot send messages to the SIS Data Servers.


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2 Configuration error ERROR Ok There is an error in a configuration file or the configuration is inconsistent.

3 Alarm handler error ERROR Ok The alarm handler has indicated that one or more alarm files are corrupted.

4 through 15 <unused>

SIS Data Server status (Node Record, A2 field definitions)


0 Configured OK NCONF SIS Data Server is configured.

1 Primary in control PRIM BCKP The primary SIS Data Server is in control.

2 Local bus communication error

ERROR OK There is an error in the SIS Data Server communication over the backplane.

3 SIS LAN communication timeout

ERROR OK There is a timeout in the communication between a SIS Data Server and an Ovation Controller.


SIS Logic Solver status (Node Record, A2 field definitions)


0 Configured OK NCONF The Logic Solver is configured.

1 Commissioned OK DECOMD The Logic Solver has been recognized by Ovation.

2 Calibration ACTIVE NACT The logic Solver has been calibrated.

3 Configuring state ACTIVE NACT The Logic Solver is configured.

4 Communication error ERROR OK There is an error in the communication with the Logic Solver.

5 IO channel error ERROR OK There is an error in the Logic Solver's I/O channels.

6 Primary in control PRIM BCKP The primary Logic Solver is in control.

7 Locked LOCKED UNLCKD The Logic Solver is locked and cannot be loaded.

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8 Scan rate overloaded OVRLD NOVRLD The configured scan rate for the Logic Solver is exceeded by the estimated execution time.


SIS Logic Solver module status (Node Record, A2 field definitions)


0 Module not registered NREG OK The module is not registered

1 Debug mode DEBUG NORM The Debug Mode is where you can perform functional testing of safety logic by forcing input values for algorithms.



There are two types of events generated by the SIS Logic Solver. The following tables describe these events.

Module Events. Diagnostic Events.

Module events

EV E N T IN D E X ST R I NG

TM_ME_DVC_CNFRM_SUCCESS 1 Successful confirmation following a command to trip

TM_ME_DVC_CNFRM_FAILURE 2 Failed to confirm following a command to trip

TM_ME_DVC_CNFRM_OFF_WHILE_ON 3 Confirmed Off while commanded On

TM_ME_DVC_PST_STARTED 4 Partial stroke test started

TM_ME_DVC_PST_DENIED 5 Partial stroke test denied

TM_ME_DVC_PST_FAILED 6 Partial stroke test failed

TM_ME_DVC_PST_SUCCESS 7 Successful partial stroke test

TM_ME_DVC_PST_PAST_DUE 8 Partial stroke test past due

TM_ME_DO_CNFRM_SUCCESS 11 Successful confirmation following a command to trip

TM_ME_DO_CNFRM_FAILURE 12 Failed to confirm following a command to trip

TM_ME_DO_CNFRM_OFF_WHILE_ON 13 Confirmed Off while commanded On


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TM_ME_AV_BYPASS_REMOVED 21 Bypass removed on <x>

TM_ME_AV_BYPASS_PERMIT 22 Maintenance bypass permitted

TM_ME_AV_BYPASS_PERMIT_REMOVED 23 Maintenance bypass permit removed

TM_ME_AV_BYPASS_SET 24 Maintenance bypass on <x>

TM_ME_AV_BYPASS_REMOVED_TIMEOUT

25 Maintenance bypass removed by block due to timeout

TM_ME_AV_VOTE_NOT_TRIP 26 <x> voting not to trip

TM_ME_AV_VOTE_TRIP 27 <x> voting to trip

TM_ME_AV_BYPASS_VOTE_TRIP 28 A bypassed input is voting to trip

TM_ME_AV_BYPASS_VOTE_NOT_TRIP 29 No bypassed input is voting to trip

TM_ME_AV_BYPASS_VOTE_PRETRIP 30 A bypassed input is voting to pretrip

TM_ME_AV_BYPASS_VOTE_NOT_PRETRIP

31 No bypassed input is voting to pretrip

TM_ME_DV_BYPASS_REMOVED 41 Bypass removed on <x>

TM_ME_DV_BYPASS_PERMIT 42 Maintenance bypass permitted

TM_ME_DV_BYPASS_PERMIT_REMOVED 43 Maintenance bypass permit removed

TM_ME_DV_BYPASS_SET 44 Maintenance bypass on <x>

TM_ME_DV_BYPASS_REMOVED_TIMEOUT

45 Maintenance bypass removed by block due to timeout

TM_ME_DV_VOTE_NOT_TRIP 46 <x> voting not to trip

TM_ME_DV_VOTE_TRIP 47 <x> voting to trip

TM_ME_DV_BYPASS_VOTE_TRIP 48 A bypassed input is voting to trip

TM_ME_DV_BYPASS_VOTE_NOT_TRIP 49 No bypassed input is voting to trip

TM_ME_CEM_EFFECT_TRIPPED 61 Trip, first out Cause <x>

TM_ME_CEM_EFFECT_NORMAL 62 FIRST_OUT cleared

TM_ME_MISC_EVENTS_LOST 71 SLS Control subsystem lost SIF Module Events

Diagnostic events


TM_DE_SWITCHOVER 1 REDIO: Switchover Occurred; card switch x

TM_DE_POWER_FAIL 2 Power Failure Occurred for x seconds

TM_DE_PAST_ERROR 3 An error condition was present after the previous powerup

TM_DE_LOST_EVENTS 4 Logic Solver Card Lost Event(s)

TM_DE_POWER_UP_EVENT 5 Logic solver proof test and power up successful

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A Adding and configuring SIS components in

the Developer Studio • 237 Algorithm functional symbols • 71 Algorithm types • 70 Analog Input and HART Analog Input

channel specifications and wiring • 33 Automatic proof testing • 317 Auxiliary Relay Diode module • 64 Auxiliary Relay DTA-Inverting module • 59 Auxiliary Relay ETA-Direct module • 63

C Carrier extender cable part numbers • 41 Carrier extender cables • 41 Choosing the Logic Solver scan rate • 315 Configuring a Digital Input Channel • 279 Configuring a Digital Output Channel • 280 Configuring a HART Analog Input Channel •

275 Configuring a HART Two-state Output

Channel • 277 Configuring an Analog Input Channel • 273 Configuring the Logic Solver Config tab •

266 Configuring the Logic Solver General tab •

267 Configuring the Logic Solver Proof Testing

tab • 268 Configuring the Logic Solver's response to

detected faults • 309 Connecting SIS sheets • 235 Copyright Notice • 2 Customizing your Ovation Control Builder

frame • 318

D Detecting faults on input channels • 310 Detecting faults on output channels • 314 Digital Input channel specifications and

wiring • 35 Digital Output channel specifications and

wiring • 37

F Fiber-optic cable\ring • 41 Forcing an algorithm input value • 298 Functions of Ovation SIS • 2

G GSECPARAMREF • 233

H Handling BAD status on analog input

channels • 310 Handling BAD status on digital input

channels • 311 Hardware components of Ovation SIS • 11 Hardware for Ovation SIS • 11 HART two-state output channel

specifications and wiring • 34

I Initial installation SIS upgrade • 244 Installation tools • 10 Introduction to Ovation Safety Instrumented

System (SIS) • 1

L Limitations for SIS • 7 Loading Logic Solvers • 285 Loading to a running process • 315 Logic Solver redundancy • 31 Logic Solver specifications • 29 Logical network design example • 9 LSAI • 75 LSALM • 78 LSAND • 80 LSAVTR • 82 LSBDE • 100 LSBFI • 102 LSBFO • 105 LSCALC • 107 LSCEM • 113 LSCMP • 145 LSDI • 147 LSDO • 150 LSDVC • 157 LSDVTR • 169 LSLIM • 185 LSMID • 188 LSNAND • 191 LSNDE • 193 LSNOR • 195 LSNOT • 197 LSOFFD • 198 LSOND • 200 LSOR • 202

Index

Index

328 OW331_47

LSPDE • 204 LSRET • 206 LSRS • 208 LSSEQ • 210 LSSR • 215 LSSTD • 217 LSTP • 226 LSXNOR • 228 LSXOR • 229

M Manual proof testing • 317

N NONSECPARAM • 234 Nonsecured algorithm parameters • 236

O Ovation SIS accessories • 49 Ovation SIS Logic Solver algorithm table •

72 Overview of adding and configuring SIS

components • 237

P Physical network design example • 8 Planning your hardware installation • 9 Planning your Safety Instrumented System •

5 Power Supply • 44 Power supply part number • 45 Power supply specifications • 45 Proof testing the Logic Solver • 316

R Removing Ovation SIS points from SIS

control sheets • 259 Requiring a reset before outputs can

become energized • 309 Restarting a Logic Solver • 307 Restarting a Logic Solver after a power

failure • 316

S Safety Instrumented Functions (SIFs) • 6 Safety Instrumented System terminology • 2 Safety Integrity Levels (SILs) • 6 SECPARAM • 231 SECPARAMREF • 232 Secured algorithm parameters • 236 SIS Algorithms • 69 SIS Carrier part numbers • 14 SIS carriers • 14 SIS connector algorithm table • 230 SIS Current Limiter module • 56 SIS Data Server • 24

SIS Data Server LEDs • 27 SIS Data Server part number • 24 SIS Diagnostics • 322 SIS environmental specifications • 7 SIS I/O channels • 33 SIS issues to consider • 5 SIS LAN switches and routers • 49 SIS Logic Solver events • 324 SIS Logic Solver LEDs • 32 SIS Logic Solver part number • 29 SIS Logic Solvers • 28 SIS Net Distance Extender • 39 SIS Net Repeater • 38 SIS Net Repeater LEDs • 40 SIS Net Repeater part number • 38 SIS network design examples • 8 SIS Power Supply LEDs • 48 SIS Relay module • 50 SIS terminal block part numbers • 23 SIS Tuning window for the LSCALC

algorithm • 291 SIS Tuning window for the LSCEM algorithm

• 292 SIS Tuning window for the LSSEQ algorithm

• 294 SIS Tuning window for the LSSTD algorithm

• 296 SLS terminal blocks • 23 Software components of Ovation SIS • 67 Software for Ovation SIS • 67

T To access the SIS Tuning window for SIS

algorithms • 290 To add an SIS control sheet to the SIS

Ovation system • 270 To add an SIS Data Server to the Ovation

System • 241 To add an SIS I/O device number • 250 To add an SIS I/O device to the Ovation

System • 250 To add an SIS network switch to the Ovation

System • 244 To add an SIS Network to the Ovation

system • 238 To add and configure SIS Logic Solvers in

the Ovation System • 263 To assign an SIS I/O Data Server to an SIS

I/O Device • 255 To associate a Node point with an SIS I/O

device • 253 To configure an SIS I/O channel • 271 To configure SIS control modules • 280 To configure SIS digital points for alarming

with timestamps • 282 To configure SIS LAN network switches •

260

Index

OW331_47 329

To create SIS network switch configuration files • 246

To force an algorithm input value • 298 To initialize SIS network switches • 248 To initially load or upgrade an SIS Data

Server • 319 To install a simplex SIS Data Server • 24 To install carrier extender cables • 42 To install Logic Solvers • 30 To install power supplies • 45 To install SIS Net Repeaters for horizontal

mounting • 39 To install terminal blocks • 23 To install the 1-wide carrier (dual-left/right

extender cables) • 17 To install the 2-wide power/SIS Data Server

carriers • 18 To install the 4-wide Vertical (Power/SIS

Data Server) carrier • 20 To install the 8-wide I/O interface carrier

(can hold up to four simplex Logic Solvers) • 20

To install the 8-wide Vertical (left/right side) carrier (can hold up to four simplex Logic Solvers) • 21

To load an SIS Logic Solver • 285 To power up a duplex SIS Data Server • 26 To power up a simplex SIS Data Server • 25 To provide power to SISNet Distance

extenders • 47 To provide power to the Logic Solvers • 46 To provide power to the SISNet Repeaters •

46 To remove a redundant SIS Data Server •

26 To restart (reboot) a Logic Solver • 307 To terminate the local bus • 43 To upgrade an SIS Logic Solver • 320 To use Point Information to identify SIS

points • 288 To view SIS points • 284

U Upgrading SIS firmware • 319 Using algorithm reference pages • 70 Using BAD Status in SIS Modules • 312 Using Fault Codes for SIS (66, 3, 8) • 321 Using Ovation SIS • 285 Using Point Information (PI) to identify SIS

points • 287

V Vertical carriers • 15 Viewing SIS points in the Developer Studio

hierarchy • 258 Viewing SIS Tuning windows for SIS

algorithms • 290

Voltage Monitor module • 54

W What is a Safety Instrumented System? • 1

OW331_47-SIS User Guide

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Transcript of OW331_47-SIS User Guide