OS Processes
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Transcript of OS Processes
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Understanding OS Processes
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Evolution of OS Serial Processing Simple Batch System Multiprogrammed Batch
Systems Multitasking/Time
Sharing Design
Monolithic Layered systems Microkernel
Concept of Mechanisms (what/how to do?) And Policies (which?)
Process treats an OS as a set of APIs
CPU Virtualization an illusion by the OS
Process Process Control Block Role of Dispatcher 2-state process model
Creation/Termination 5-state process model
New, Ready, Run, Blocked/Waiting, Exit Trace and dispatcher Queuing model
Suspended Process Need for Swapping 6/7-state process model
Few other concepts Process preemption Process/Context
switching kernel, trap tables System/User level CPU / I/O-bound Cooperative / NC
OS Ctrl structures OS Ctrl Tables
Process Ctrl Structures Elements of Process Image PCB Process List Structures
PCB List based on states Process Control
Modes of Execution Protect sys. structures
Steps - Process Creation Process Switching Role of schedulers
Types of schedulers Mix of CPU and I/O
bound jobs
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Evolution of OS Serial Processing Simple Batch System Multiprogrammed Batch
Systems Multitasking/Time
Sharing
Design Monolithic Layered systems Microkernel
Process Process Control Block Role of Dispatcher 2-state process model
Creation/Termination 5-state process model
New, Ready, Run, Blocked/Waiting, Exit Trace and dispatcher Queuing model
Suspended Process Need for Swapping 6/7-state process model
Few other concepts Process preemption Process/Context
switching System/User level CPU / I/O-bound Cooperative
OS Ctrl structures OS Ctrl Tables
Process Ctrl Structures Elements of Process Image PCB Process List Structures
PCB List based on states Process Control
Modes of Execution Protect sys. structures
Steps - Process Creation Process Switching Role of schedulers
Types of schedulers Mix of CPU and I/O
bound jobs
New jobInteractive logon
Created for OS serviceSpawn by existing process
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Evolution of OS Serial Processing Simple Batch System Multiprogrammed Batch
Systems Multitasking/Time
Sharing
Design Monolithic Layered systems Microkernel
Process Process Control Block Role of Dispatcher 2-state process model
Creation/Termination 5-state process model
New, Ready, Run, Blocked/Waiting, Exit Trace and dispatcher Queuing model
Suspended Process Need for Swapping 6/7-state process model
Few other concepts Process preemption Process/Context
switching System/User level CPU / I/O-bound Cooperative
OS Ctrl structures OS Ctrl Tables
Process Ctrl Structures Elements of Process Image PCB Process List Structures
PCB List based on states Process Control
Modes of Execution Protect sys. structures
Steps - Process Creation Process Switching Role of schedulers
Types of schedulers Mix of CPU and I/O
bound jobs
Normal completionTime limit exceeded
Mem unavailableProtection errorArithmetic error
Time overrun (wait)I/O failure
Privileged instructionOS intervention
Parent terminationParent request
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Evolution of OS Serial Processing Simple Batch System Multiprogrammed Batch
Systems Multitasking/Time
Sharing
Design Monolithic Layered systems Microkernel
Process Process Control Block Role of Dispatcher 2-state process model
Creation/Termination 5-state process model
New, Ready, Run, Blocked/Waiting, Exit Trace and dispatcher Queuing model
Suspended Process Need for Swapping 6/7-state process model
Few other concepts Process preemption Process/Context
switching System/User level CPU / I/O-bound Cooperative
OS Ctrl structures OS Ctrl Tables
Process Ctrl Structures Elements of Process Image PCB Process List Structures
PCB List based on states Process Control
Modes of Execution Protect sys. structures
Steps - Process Creation Process Switching Role of schedulers
Types of schedulers Mix of CPU and I/O
bound jobs
Can affect the execution of other processes
Can be affected by other processes
Share data with other processes
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Evolution of OS Serial Processing Simple Batch System Multiprogrammed Batch
Systems Multitasking/Time
Sharing
Design Monolithic Layered systems Microkernel
Process Process Control Block Role of Dispatcher 2-state process model
Creation/Termination 5-state process model
New, Ready, Run, Blocked/Waiting, Exit Trace and dispatcher Queuing model
Suspended Process Need for Swapping 6/7-state process model
Few other concepts Process preemption Process/Context
switching System/User level CPU / I/O-bound Cooperative
OS Ctrl structures OS Ctrl Tables
Process Ctrl Structures Elements of Process Image PCB Process List Structures
PCB List based on states Process Control
Modes of Execution Protect sys. structures
Steps - Process Creation Process Switching Role of schedulers
Types of schedulers Mix of CPU and I/O
bound jobs
User Data program data, user stack etc.User Program Program to be executedStack call parameters, addressesPCB Data needed by OS to control the process
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Evolution of OS Serial Processing Simple Batch System Multiprogrammed Batch
Systems Multitasking/Time
Sharing
Design Monolithic Layered systems Microkernel
Process Process Control Block Role of Dispatcher 2-state process model
Creation/Termination 5-state process model
New, Ready, Run, Blocked/Waiting, Exit Trace and dispatcher Queuing model
Suspended Process Need for Swapping 6/7-state process model
Few other concepts Process preemption Process/Context
switching System/User level CPU / I/O-bound Cooperative
OS Ctrl structures OS Ctrl Tables
Process Ctrl Structures Elements of Process Image PCB Process List Structures
PCB List based on states Process Control
Modes of Execution Protect sys. structures
Steps - Process Creation Process Switching Role of schedulers
Types of schedulers Mix of CPU and I/O
bound jobs
PCBProcess Identification
(pid, ppid, uid)
Processor State Info.(user-visible registers,
Control/Status registers,Stack pointers)
Process Control Info.(scheduling and state info.,Process data structuring,
Inter-process comm.,Process privileges,
Memory mgmt.,Resource ownership
And utilization)
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Evolution of OS Serial Processing Simple Batch System Multiprogrammed Batch
Systems Multitasking/Time
Sharing
Design Monolithic Layered systems Microkernel
Process Process Control Block Role of Dispatcher 2-state process model
Creation/Termination 5-state process model
New, Ready, Run, Blocked/Waiting, Exit Trace and dispatcher Queuing model
Suspended Process Need for Swapping 6/7-state process model
Few other concepts Process preemption Process/Context
switching System/User level CPU / I/O-bound Cooperative
OS Ctrl structures OS Ctrl Tables
Process Ctrl Structures Elements of Process Image PCB Process List Structures
PCB List based on states Process Control
Modes of Execution Protect sys. structures
Steps - Process Creation Process Switching Role of schedulers
Types of schedulers Mix of CPU and I/O
bound jobsAssign a unique pidAllocate space for the process
Initialize the PCBSet the appropriate linkages
Create/expand system data structures
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With Suspend State
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7-State Process Model
Ready: Process is in Main Memory and ready for execution.Blocked: Process is in Main Memory and awaiting an event I/O.Blocked, Suspended: Process is in Secondary Memory and awaiting an event I/O.Ready, Suspended: Process is in Secondary memory and available for execution as soon as loaded in main memory
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Process state-based Queuing Models
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Process state-based Queuing Models
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Process / CPU Scheduling Policies
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Scheduling Goals
Scheduling Goals
Performance
Throughput Response Time
Many context switch not good for high throughput, but may be necessary for quick response time.
Throughput - Rate at which useful work is accomplished, e.g, search transaction on Google.
Remember: It is not only CPU, efficientuse of I/O, memory efficiently, a scheduler can maximize throughput.
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Scheduling MechanismNon-preemptive vs. Preemptive
Process Parameters for SchedulingArrival Time (AT)
Service Time (ST) / Execution Time (ET) / Burst Time (BT)
Priority Static vs. Dynamic (No., reverse)
Finish Time (FT)
Turnaround time (TAT) and Mean TAT
Waiting Time (WT) and Mean WT
Exact Schedule (run order) of processes
Visualization Gantt Charts (or Time scale diagram)
Uniprocessor Scheduling
Focus: State
of Ready Queue
Policy dependent
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Process / CPU Scheduling Policies
First Come First Serve (FCFS) / First In First Out (FIFO)
Shortest Process Next (SPN) / Shortest Job First (SJF)
Highest Response Ratio Next (HRRN)
Priority-based
Round Robin (RR)
Shortest Remaining Time Next (SRTN) / Preemptive Shortest Process Next (P-SPN)
Multi-level Queue (MLQ)
Multi-level Feedback Queue (MLFQ) (sometimes called Feedback scheduling)
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Multi-level Queue (MLQ) Scheduling Multiple queues, No feedback Every queue can have a separate scheduling function
3 queues : RR (q=2), RR(q=3), RR(q=5) 3 queues : FCFS, SPN, SRTN (possible ordering: SPN, SRTN, FCFS).
It is important to consider the queue ordering.
Unless the first queue is empty, the next queue will not be considered in scheduling other processes.
In case of 3 queues, queue 2 not processed until queue 1 gets empty, queue 3 not processed until queues 1 and 2 get empty.
It is possible to place a process in one or more queues depending on the criteria (for e.g., execution time, memory usage, ratio of CPU and I/O usage) to assign a queue. However, there should be a policy to resolve any such conflict.
For e.g., FCFS (t > 10), SPN(t < 5), SRTN(5 < t < 10) In case different queue ordering is considered, it is possible to reach to
different schedules suggesting multiple ways to schedule a given set of processes.
Scheduler scans all queues based on queue ordering.
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Example 1 : Schedule Processes
FCFS,
RR (q=1), RR(q=4),
SPN/SJF,
Priority-based
SRT/SRTN,
HRRN,
Multi-level Queue (q=1,2,3)
Feedback (q=1), (q=2^n)
Process priority
A (3), B(1), C(0), D(1), E(2)
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Solution Example 1: Schedule of Processes
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Example 2
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Example 3FCFS,
RR (q=1),
RR(q=4),
SPN/SJF,
SRT/SRTN,
HRRN,
Multi-level Feedback (q=2),
Multi-level Feedback (RR=1,SRT, HRRN)
Remember:For HRRN (is preemptive when time quantum is given) when used in MLFQ schedulingResponse Ratio = (WT + RST) / RST, where WT indicates waiting time w.r.to arrival time, andRST indicates remaining service time based on status of a process in a particular queue. RST = Total service time time for which CPU has already been assigned to that process.
When policies like SJF, SRT, HRRN are used in context of feedback scheduling, each of these policies are only used for process selection from the queue. However, CPU time is given only for a given/assumed time slot, and then the process is moved to next queue if it is not yet completed.
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Example 4
b) Draw a chart showing execution of processes using SRTN. For each process, calculate the total time spent in the Ready queue.
c) Draw a chart showing execution of processes using HRRN.
d) Draw charts for the MLFQ (4 queues, q=2n+1, n=0,1,2,3)
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Example 5
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Example 6
FCFSRR(q=1,2,4)SPN(Shortest Process Next, Non-preemptive)SRTN (a.k.a. PSPN(Shortest Process Next, preemptive))HRRNPreemptive HRRNMLFQ (q=2n+1, n={0,0.5,1,1.5})
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Solution 6
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Solution 6 ...cont'd
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RR (q = 1)
Solution 6...cont'd
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Example 7
(a) The system uses RR scheduling with q=10 ms and q=5 ms.(b) The system uses MLFQ scheduling with 4 queues, q=2n-1, where n=1,2,3,4
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Solution 7 (a)
Blocked (I/O) QueueCPU UseTime Ready Queue(end of time slot)
I/O Use
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Example 8Consider the following three processes. Each process makes a CPU burst
then an I/O burst, another CPU burst, another I/O burst and terminates with a CPU burst. The lengths of the CPU burst and I/O burst times in milliseconds are given in the following table:
Process CPU-burst1 I/O-burst1 CPU-burst2 I/O-burst2 CPU-burst3 Arrival
P1 2 4 2 2 2 0
P2 2 2 3 3 1 1
P3 1 2 1 1 1 1
The processes are assumed to arrive as indicated.
Draw charts that illustrate the execution of theses processes using the (1) FCFS (2) RR (q = 1) (3) RR ( q = 2) (4) SJF (5) HRRN (6) SRTN (7) MLFQ (4 queues, q=2k, k=1,1.5,2,2.5).
Clearly indicate the queue state, and use the charts to compute FT,WT and its WT, TAT and its mean. Give your conclusion about the comparative performance of the above listed policies.
If an I/O completion and a CPU timeout of two processes occur at the same time, we treat the I/O completion first.
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Soluiton 8
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Solution 8 ... cont'd
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Solution 8 ... cont'd
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Example 9 (typical objective type questions)
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CPU Scheduling Algorithms
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